| /Zephyr-latest/drivers/adc/ |
| D | Kconfig | 1 # ADC configuration options
7 # ADC options
9 menuconfig ADC config
10 bool "Analog-to-Digital Converter (ADC) drivers"
11 # All platforms that implement the ADC driver are now required to
14 Enable ADC (Analog to Digital Converter) driver configuration.
16 if ADC
19 bool "ADC Shell"
22 Enable ADC Shell for testing.
24 # By selecting or not this option particular ADC drivers indicate if it is
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| D | adc_shell.c | 9 #include <zephyr/drivers/adc.h>
25 "Configure ADC channel\n" \
44 "Read adc value\n" \
156 /* This will never happen because ADC was prompted by shell */ in get_adc()
163 /* -2: index of ADC label name */ in cmd_adc_ch_id()
164 struct adc_hdl *adc = get_adc(argv[-2]); in cmd_adc_ch_id() local
167 if (!device_is_ready(adc->dev)) { in cmd_adc_ch_id()
168 shell_error(sh, "ADC device not ready"); in cmd_adc_ch_id()
177 adc->channel_config.channel_id = (uint8_t)strtol(argv[1], NULL, 10); in cmd_adc_ch_id()
178 retval = adc_channel_setup(adc->dev, &adc->channel_config); in cmd_adc_ch_id()
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| D | Kconfig.mcux | 1 # ADC configuration options
23 bool "MCUX 12B1MSPS SAR ADC driver"
28 Enable the MCUX 12B1MSPS SAR ADC driver.
42 bool "MCUX ADC ETC driver"
45 Enable the MCUX ADC ETC driver.
49 bool "MCUX GAU ADC driver"
54 Enable the GAU ADC driver
89 bool "EDMA for adc driver"
97 bool "ADC HW TRIGGER"
100 Support HW Trigger ADC
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| D | Kconfig.npcx | 1 # NPCX ADC driver configuration options
7 bool "Nuvoton NPCX embedded controller (EC) ADC driver"
12 This option enables the ADC driver for NPCX family of
14 Say y if you wish to use ADC channels on NPCX MCU.
19 bool "ADC comparator version 1 support"
22 This option enables ADC comparator V1 support.
25 bool "ADC comparator version 2 support"
28 This option enables ADC comparator V2 support.
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| D | Kconfig.adc_emul | 5 bool "ADC emulator"
9 Enable the ADC emulator driver. This is a fake driver in that it
10 does not talk to real hardware. It pretends to be actual ADC. It
11 is used for testing higher-level API for ADC devices.
16 int "Stack size for the ADC data acquisition thread"
21 emulated ADC require a lot of memory.
24 int "Priority for the ADC data acquisition thread"
27 Priority level for the internal ADC data acquisition thread.
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| D | Kconfig.smartbond | 1 # ADC configuration options
7 bool "Renesas SmartBond(tm) ADC driver for ADC"
12 Enable support for ADC driver for Renesas SmartBond(tm) MCU series.
15 bool "Renesas SmartBond(tm) ADC driver for Sigma-Delta ADC"
20 Enable support for ADC driver for Renesas SmartBond(tm) MCU series.
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| D | adc_sam.c | 10 #include <zephyr/drivers/adc.h>
25 Adc *regs;
70 Adc *const adc = cfg->regs; in adc_sam_channel_setup() local
77 LOG_ERR("Invalid ADC differential input for channel %u", channel_id); in adc_sam_channel_setup()
82 LOG_ERR("Invalid ADC single-ended input for channel %u", channel_id); in adc_sam_channel_setup()
88 LOG_ERR("Invalid ADC channel acquisition time"); in adc_sam_channel_setup()
93 LOG_ERR("Invalid ADC channel reference (%d)", channel_cfg->reference); in adc_sam_channel_setup()
99 adc->ADC_ACR |= ADC_ACR_TSON; in adc_sam_channel_setup()
104 adc->ADC_COR |= (ADC_COR_DIFF0 | ADC_COR_DIFF1) << (channel_id * 2U); in adc_sam_channel_setup()
106 adc->ADC_COR &= ~((ADC_COR_DIFF0 | ADC_COR_DIFF1) << (channel_id * 2U)); in adc_sam_channel_setup()
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| D | adc_sam0.c | 10 #include <zephyr/drivers/adc.h>
47 Adc *regs;
64 static void wait_synchronization(Adc *const adc) in wait_synchronization() argument
66 while ((ADC_SYNC(adc) & ADC_SYNC_MASK) != 0) { in wait_synchronization()
119 Adc *const adc = cfg->regs; in adc_sam0_channel_setup() local
127 LOG_ERR("Selected ADC acquisition time is not valid"); in adc_sam0_channel_setup()
134 adc->SAMPCTRL.reg = sampctrl; in adc_sam0_channel_setup()
135 wait_synchronization(adc); in adc_sam0_channel_setup()
165 if (adc->REFCTRL.reg != refctrl) { in adc_sam0_channel_setup()
167 adc->CTRLA.bit.ENABLE = 0; in adc_sam0_channel_setup()
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| D | Kconfig.stm32 | 1 # ADC configuration options
12 bool "STM32 ADC driver"
17 Enable the driver implementation for the stm32xx ADC
20 bool "STM32WB0 ADC driver"
25 Enable the driver implementation for the STM32WB0 series ADC
30 bool "STM32 MCU ADC DMA Support"
33 Enable the ADC DMA mode for ADC instances
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| D | adc_ene_kb1200.c | 10 #include <zephyr/drivers/adc.h>
13 #include <reg/adc.h>
22 /* ADC Register base address */
23 struct adc_regs *adc; member
36 /* ADC local functions */
61 /* ADC Sample Flow (by using adc_context.h api function)
62 * 1. Start ADC sampling (set up flag ctx->sync)
64 * 2. Wait ADC sample finish (by monitor flag ctx->sync)
66 * 3. Finish ADC sample (isr clear flag ctx->sync)
76 LOG_ERR("Invalid ADC channels."); in adc_kb1200_start_read()
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| D | adc_stm32.c | 16 #include <zephyr/drivers/adc.h>
46 #include <zephyr/dt-bindings/adc/stm32_adc.h>
62 /* Here are some redefinitions of ADC versions for better readability */
80 * Other ADC versions:
119 /* reference voltage for the ADC */
194 static void adc_stm32_enable_dma_support(ADC_TypeDef *adc) in adc_stm32_enable_dma_support() argument
196 /* Allow ADC to create DMA request and set to one-shot mode as implemented in HAL drivers */ in adc_stm32_enable_dma_support()
198 LL_ADC_REG_SetDMATransfer(adc, LL_ADC_REG_DMA_TRANSFER_UNLIMITED); in adc_stm32_enable_dma_support()
203 LL_ADC_REG_SetDataTransferMode(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED); in adc_stm32_enable_dma_support()
206 LL_ADC_REG_SetDMATransfer(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED); in adc_stm32_enable_dma_support()
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| /Zephyr-latest/tests/drivers/build_all/adc/ |
| D | testcase.yaml | 5 - adc
7 drivers.adc.build:
13 drivers.adc.cc32xx.build:
15 drivers.adc.ite.it8xxx2.build:
17 drivers.adc.mcux.adc12.build:
19 drivers.adc.mcux.adc16.build:
21 drivers.adc.mcux.lpadc.build:
23 drivers.adc.mcp320x.build:
26 drivers.adc.npcx.build:
28 drivers.adc.nrf.build:
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| /Zephyr-latest/dts/bindings/adc/ |
| D | st,stm32f1-adc.yaml | 6 ST STM32F1 family ADC
7 This compatible stands for all ADC blocks similar to the one on STM32F1,
9 Remove the st,adc-clock-source and st,adc-prescaler property.
10 See adc-prescaler property in st,stm32f1-rcc binding to configure ADC
13 compatible: "st,stm32f1-adc"
16 - name: st,stm32-adc.yaml
18 - st,adc-clock-source
19 - st,adc-prescaler
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| D | atmel,sam-adc.yaml | 4 description: Atmel SAM family ADC
6 compatible: "atmel,sam-adc"
8 include: [adc-controller.yaml, pinctrl-device.yaml]
23 description: CPU clock prescaler applied to get the ADC clock.
29 ADC startup time in ADC clock cycles.
36 ADC settling time in ADC clock cycles. When the gain, offset
46 ADC tracking time in ADC clock cycles. A minimal tracking time
47 is necessary for the ADC to guarantee the best converted final
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| D | st,stm32-adc.yaml | 5 description: ST STM32 family ADC
7 compatible: "st,stm32-adc"
9 include: [adc-controller.yaml, pinctrl-device.yaml]
24 st,adc-clock-source:
31 Type of ADC clock source :
38 st,adc-prescaler:
55 Clock prescaler at the input of the ADC:
57 st,adc-clock-source.
67 description: Indicates the reference voltage of the ADC in mV (on the target board).
73 List of the resolutions supported by the ADC instance. They should be
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| D | gd,gd32-adc.yaml | 4 description: GigaDevice GD32 ADC
6 # gd32 adc irq have some special cases as below:
7 # 1. adc number no larger than 3.
12 # 'adc2' to handle gd32 adc irq config directly.
14 # Sorry for the restriction, But new added gd32 adc node-label must be 'adc0',
17 compatible: "gd,gd32-adc"
19 include: [adc-controller.yaml, reset-device.yaml, pinctrl-device.yaml]
34 Some GD32 ADC have additional clock source, like IRC14M or IRC28M.
36 values defined at 'dts-bindings/adc/gd32xxx.h' headers.
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| D | renesas,ra-adc.yaml | 4 description: Renesas RA ADC node
6 compatible: "renesas,ra-adc"
8 include: [adc-controller.yaml, pinctrl-device.yaml]
17 description: ADC reference voltage (Unit:mV)
22 description: The number of ADC channels
30 description: Mask for ADC channels existed in each board
37 The ADC module will take multiple samples of an analog signal
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| /Zephyr-latest/include/zephyr/drivers/adc/ |
| D | adc_emul.h | 4 * @brief Backend API for emulated ADC
16 #include <zephyr/drivers/adc.h>
23 * @brief Emulated ADC backend API
24 * @defgroup adc_emul Emulated ADC
28 * Behaviour of emulated ADC is application-defined. As-such, each
31 * - define a Device Tree overlay file to indicate the number of ADC
36 * constant mV value on emulated ADC input
38 * function which will be used to obtain voltage on emulated ADC input
41 * tests/drivers/adc/adc_api/boards/native_sim.overlay
43 * An example of using emulated ADC backend API is in the file
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| /Zephyr-latest/tests/drivers/adc/adc_api/ |
| D | testcase.yaml | 3 - adc
7 drivers.adc:
8 depends_on: adc
12 drivers.adc.b_u585i_iot02a_adc4:
17 drivers.adc.nucleo_f103rb_dma:
23 drivers.adc.dma_st_stm32:
27 - adc
55 drivers.adc.dma_nxp_kinetis:
59 - adc
67 drivers.adc.dma_espressif:
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| /Zephyr-latest/soc/atmel/sam0/common/ |
| D | adc_fixup_sam0.h | 11 #define ADC_SYNC(adc) ((adc)->SYNCBUSY.reg) argument
14 #define ADC_SYNC(adc) ((adc)->STATUS.reg) argument
17 #error ADC not supported...
21 #define ADC_DIFF(adc) (inputctrl) argument
24 #define ADC_DIFF(adc) ((adc)->CTRLB.reg) argument
27 #define ADC_DIFF(adc) ((adc)->CTRLC.reg) argument
30 #error ADC not supported...
34 #define ADC_RESSEL(adc) ((adc)->CTRLB.bit.RESSEL) argument
40 #define ADC_RESSEL(adc) ((adc)->CTRLC.bit.RESSEL) argument
46 #error ADC not supported...
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| /Zephyr-latest/tests/drivers/adc/adc_accuracy_test/ |
| D | README.txt | 1 ADC accuracy test
3 This test checks that ADC readings match an expected value. It is
7 read on an ADC one. If they match, the test passes.
9 - Reference voltage: an ADC channel is read and compared to an expected
12 For the DAC source, it is expected that DAC and ADC are connected. This
14 The test then sets DAC to half its resolution and reads the ADC to see
15 if they match. Note that DAC and ADC are expected to generate/read
18 In the reference voltage case, the ADC is expected to be connected to a
20 property "reference_mv" from "zephyr,user" node. The test reads the ADC
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| /Zephyr-latest/samples/drivers/adc/adc_dt/ |
| D | README.rst | 2 :name: Analog-to-Digital Converter (ADC) with devicetree
5 Read analog inputs from ADC channels.
10 This sample demonstrates how to use the :ref:`ADC driver API <adc_api>`.
12 Depending on the target board, it reads ADC samples from one or more channels
16 The pins of the ADC channels are board-specific. Please refer to the board
22 The ADC peripheral and pinmux is configured in the board's ``.dts`` file. Make
23 sure that the ADC is enabled (``status = "okay";``).
25 In addition to that, this sample requires an ADC channel specified in the
31 also needs to be specified in devicetree, in ADC controller child nodes. Also
32 the ADC resolution and oversampling setting (if used) need to be specified
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| /Zephyr-latest/drivers/sensor/nxp/nxp_kinetis_temp/ |
| D | Kconfig | 10 select ADC
17 int "ADC resolution"
21 ADC resolution to use for the temperature sensor and bandgap
25 int "ADC oversampling"
29 ADC oversampling to use for the temperature sensor and
34 bool "Digital filtering of ADC readings"
36 Enable weighted average digital filtering of the ADC
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| /Zephyr-latest/drivers/sensor/nuvoton/nuvoton_adc_cmp_npcx/ |
| D | Kconfig | 1 # ADC CMP NPCX driver configuration options
9 bool "Nuvoton NPCX ADC threshold detection interruption"
19 bool "NPCX ADC threshold detection uses internal work queue"
27 int "Nuvoton NPCX ADC trheshold detection work queue priority"
30 This option sets internal ADC NPCX threshold detection workqueue
34 int "Nuvoton NPCX ADC trheshold detection work queue stack size"
37 This option sets internal ADC NPCX threshold detection workqueue
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| /Zephyr-latest/samples/drivers/adc/adc_sequence/src/ |
| D | main.c | 7 #include <zephyr/drivers/adc.h>
10 /* ADC node from the devicetree. */
16 /* Data of ADC device specified in devicetree. */
17 static const struct device *adc = DEVICE_DT_GET(ADC_NODE); variable
19 /* Data array of ADC channels for the specified ADC. */
23 /* Data array of ADC channel voltage references. */
50 if (!device_is_ready(adc)) {
51 printf("ADC controller device %s not ready\n", adc->name);
58 err = adc_channel_setup(adc, &channel_cfgs[i]);
64 vrefs_mv[i] = adc_ref_internal(adc);
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