| /Zephyr-Core-3.5.0/drivers/adc/ |
| D | Kconfig | 1 # ADC configuration options
7 # ADC options
9 menuconfig ADC config
10 bool "Analog-to-Digital Converter (ADC) drivers"
11 # All platforms that implement the ADC driver are now required to
14 Enable ADC (Analog to Digital Converter) driver configuration.
16 if ADC
19 bool "ADC Shell"
23 Enable ADC Shell for testing.
25 # By selecting or not this option particular ADC drivers indicate if it is
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| D | adc_shell.c | 9 #include <zephyr/drivers/adc.h>
25 "Configure ADC channel\n" \
44 "Read adc value\n" \
117 /* This will never happen because ADC was prompted by shell */ in get_adc()
124 /* -2: index of ADC label name */ in cmd_adc_ch_id()
125 struct adc_hdl *adc = get_adc(argv[-2]); in cmd_adc_ch_id() local
128 if (!device_is_ready(adc->dev)) { in cmd_adc_ch_id()
129 shell_error(sh, "ADC device not ready"); in cmd_adc_ch_id()
138 adc->channel_config.channel_id = (uint8_t)strtol(argv[1], NULL, 10); in cmd_adc_ch_id()
139 retval = adc_channel_setup(adc->dev, &adc->channel_config); in cmd_adc_ch_id()
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| D | Kconfig.adc_emul | 5 bool "ADC emulator"
9 Enable the ADC emulator driver. This is a fake driver in that it
10 does not talk to real hardware. It pretends to be actual ADC. It
11 is used for testing higher-level API for ADC devices.
16 int "Stack size for the ADC data acquisition thread"
21 emulated ADC require a lot of memory.
24 int "Priority for the ADC data acquisition thread"
27 Priority level for the internal ADC data acquisition thread.
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| D | adc_sam.c | 10 #include <zephyr/drivers/adc.h>
25 Adc *regs;
70 Adc *const adc = cfg->regs; in adc_sam_channel_setup() local
77 LOG_ERR("Invalid ADC differential input for channel %u", channel_id); in adc_sam_channel_setup()
82 LOG_ERR("Invalid ADC single-ended input for channel %u", channel_id); in adc_sam_channel_setup()
88 LOG_ERR("Invalid ADC channel acquisition time"); in adc_sam_channel_setup()
93 LOG_ERR("Invalid ADC channel reference (%d)", channel_cfg->reference); in adc_sam_channel_setup()
99 adc->ADC_ACR |= ADC_ACR_TSON; in adc_sam_channel_setup()
104 adc->ADC_COR |= (ADC_COR_DIFF0 | ADC_COR_DIFF1) << (channel_id * 2U); in adc_sam_channel_setup()
106 adc->ADC_COR &= ~((ADC_COR_DIFF0 | ADC_COR_DIFF1) << (channel_id * 2U)); in adc_sam_channel_setup()
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| D | Kconfig.smartbond | 1 # ADC configuration options
7 bool "Renesas SmartBond(tm) ADC driver for ADC"
12 Enable support for ADC driver for Renesas SmartBond(tm) MCU series.
15 bool "Renesas SmartBond(tm) ADC driver for Sigma-Delta ADC"
20 Enable support for ADC driver for Renesas SmartBond(tm) MCU series.
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| D | adc_sam0.c | 10 #include <zephyr/drivers/adc.h>
47 Adc *regs;
64 static void wait_synchronization(Adc *const adc) in wait_synchronization() argument
66 while ((ADC_SYNC(adc) & ADC_SYNC_MASK) != 0) { in wait_synchronization()
119 Adc *const adc = cfg->regs; in adc_sam0_channel_setup() local
127 LOG_ERR("Selected ADC acquisition time is not valid"); in adc_sam0_channel_setup()
134 adc->SAMPCTRL.reg = sampctrl; in adc_sam0_channel_setup()
135 wait_synchronization(adc); in adc_sam0_channel_setup()
165 if (adc->REFCTRL.reg != refctrl) { in adc_sam0_channel_setup()
167 adc->CTRLA.bit.ENABLE = 0; in adc_sam0_channel_setup()
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| D | adc_stm32.c | 16 #include <zephyr/drivers/adc.h>
43 #include <zephyr/dt-bindings/adc/stm32_adc.h>
59 /* ADC1_V2_5 is the ADC version for STM32F37x */
62 /* ADC5_V1_1 is the ADC version for other STM32F3x */
67 * Other ADC versions:
88 /* reference voltage for the ADC */
222 ADC_TypeDef *adc = (ADC_TypeDef *)config->base; in adc_stm32_dma_start() local
235 blk_cfg->source_address = (uint32_t)LL_ADC_DMA_GetRegAddr(adc, LL_ADC_DMA_REG_REGULAR_DATA); in adc_stm32_dma_start()
259 /* Allow ADC to create DMA request and set to one-shot mode, in adc_stm32_dma_start()
263 if (adc == ADC3) { in adc_stm32_dma_start()
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| D | Kconfig.mcux | 1 # ADC configuration options
23 bool "MCUX 12B1MSPS SAR ADC driver"
27 Enable the MCUX 12B1MSPS SAR ADC driver.
39 bool "MCUX ADC ETC driver"
42 Enable the MCUX ADC ETC driver.
77 bool "EDMA for adc driver"
85 bool "ADC HW TRIGGER"
88 Support HW Trigger ADC
109 15 ADC channels. This value corresponds to how many of the CMD
110 registers can be configured within the ADC.
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| D | Kconfig.stm32 | 1 # ADC configuration options
11 bool "STM32 ADC driver"
15 Enable the driver implementation for the stm32xx ADC
20 bool "STM32 MCU ADC DMA Support"
23 Enable the ADC DMA mode for ADC instances
29 bool "STM32 ADC shared interrupts"
33 Enable the use of shared interrupts for families that only have a single interrupt for all ADC's
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| D | Kconfig.nrfx | 1 # ADC configuration options
7 bool "nRF ADC nrfx driver"
13 Enable support for nrfx ADC driver for nRF51 MCU series.
16 int "Number of ADC channels"
21 Number of ADC channels to be supported by the driver. Each channel
22 needs a dedicated structure in RAM that stores the ADC settings
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| D | Kconfig.ads1x1x | 1 # ADS1X1X ADC configuration options
17 Enable ADS1X1X ADC driver.
25 ADS1X1X ADC device driver initialization priority.
28 int "Priority for the ADC data acquisition thread"
31 Priority level for the internal ADC data acquisition thread.
34 int "Stack size for the ADC data acquisition thread"
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| D | Kconfig.max1125x | 1 # MAX1125X ADC configuration options
21 ADS1X1X ADC device driver initialization priority.
24 int "ADC MAX1125X async thread priority"
28 int "Priority for the ADC data acquisition thread"
31 Priority level for the internal ADC data acquisition thread.
34 int "Stack size for the ADC data acquisition thread"
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| /Zephyr-Core-3.5.0/tests/drivers/build_all/adc/ |
| D | testcase.yaml | 5 - adc
7 drivers.adc.build:
22 drivers.adc.cc32xx.build:
25 drivers.adc.ite.it8xxx2.build:
28 drivers.adc.mcux.adc12.build:
31 drivers.adc.mcux.adc16.build:
34 drivers.adc.mcux.lpadc.build:
37 drivers.adc.npcx.build:
40 drivers.adc.nrf.build:
43 drivers.adc.nrf.saadc.build:
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| /Zephyr-Core-3.5.0/dts/bindings/adc/ |
| D | st,stm32f1-adc.yaml | 6 ST STM32F1 family ADC
7 This compatible stands for all ADC blocks similar to the one on STM32F1,
9 Remove the st,adc-clock-source and st,adc-prescaler property.
10 See adc-prescaler property in st,stm32f1-rcc binding to configure ADC
13 compatible: "st,stm32f1-adc"
16 - name: st,stm32-adc.yaml
18 - st,adc-clock-source
19 - st,adc-prescaler
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| D | st,stm32-adc.yaml | 5 description: ST STM32 family ADC
7 compatible: "st,stm32-adc"
9 include: [adc-controller.yaml, pinctrl-device.yaml]
30 st,adc-clock-source:
34 - 1 # SYNC for synchronous ADC clock source
35 - 2 # ASYNC for asynchronous ADC clock source
37 Type of ADC clock source :
42 st,adc-prescaler:
59 Clock prescaler at the input of the ADC:
61 st,adc-clock-source.
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| D | atmel,sam-adc.yaml | 4 description: Atmel SAM family ADC
6 compatible: "atmel,sam-adc"
8 include: [adc-controller.yaml, pinctrl-device.yaml]
23 description: CPU clock prescaler applied to get the ADC clock.
29 ADC startup time in ADC clock cycles.
36 ADC settling time in ADC clock cycles. When the gain, offset
46 ADC tracking time in ADC clock cycles. A minimal tracking time
47 is necessary for the ADC to guarantee the best converted final
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| D | gd,gd32-adc.yaml | 4 description: GigaDevice GD32 ADC
6 # gd32 adc irq have some special cases as below:
7 # 1. adc number no larger than 3.
12 # 'adc2' to handle gd32 adc irq config directly.
14 # Sorry for the restriction, But new added gd32 adc node-label must be 'adc0',
17 compatible: "gd,gd32-adc"
19 include: [adc-controller.yaml, reset-device.yaml, pinctrl-device.yaml]
34 Some GD32 ADC have additional clock source, like IRC14M or IRC28M.
36 values defined at 'dts-bindings/adc/gd32xxx.h' headers.
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| D | nuvoton,npcx-adc.yaml | 4 description: Nuvoton, NPCX-ADC node
6 compatible: "nuvoton,npcx-adc"
8 include: [adc-controller.yaml, pinctrl-device.yaml]
22 description: ADC reference voltage (Unit:mV)
26 description: the number of ADC channels
30 description: the number of threshold detectors adc supports
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| /Zephyr-Core-3.5.0/include/zephyr/drivers/adc/ |
| D | adc_emul.h | 4 * @brief Backend API for emulated ADC
16 #include <zephyr/drivers/adc.h>
23 * @brief Emulated ADC backend API
24 * @defgroup adc_emul Emulated ADC
28 * Behaviour of emulated ADC is application-defined. As-such, each
31 * - define a Device Tree overlay file to indicate the number of ADC
36 * constant mV value on emulated ADC input
38 * function which will be used to obtain voltage on emulated ADC input
41 * tests/drivers/adc/adc_api/boards/native_posix.overlay
43 * An example of using emulated ADC backend API is in the file
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| /Zephyr-Core-3.5.0/soc/arm/atmel_sam0/common/ |
| D | adc_fixup_sam0.h | 11 #define ADC_SYNC(adc) ((adc)->SYNCBUSY.reg) argument
14 #define ADC_SYNC(adc) ((adc)->STATUS.reg) argument
17 #error ADC not supported...
21 #define ADC_DIFF(adc) (inputctrl) argument
24 #define ADC_DIFF(adc) ((adc)->CTRLB.reg) argument
27 #define ADC_DIFF(adc) ((adc)->CTRLC.reg) argument
30 #error ADC not supported...
34 #define ADC_RESSEL(adc) ((adc)->CTRLB.bit.RESSEL) argument
40 #define ADC_RESSEL(adc) ((adc)->CTRLC.bit.RESSEL) argument
46 #error ADC not supported...
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| /Zephyr-Core-3.5.0/samples/drivers/adc/ |
| D | README.rst | 1 .. zephyr:code-sample:: adc
2 :name: Analog-to-Digital Converter (ADC)
5 Read analog inputs from ADC channels.
10 This sample demonstrates how to use the :ref:`ADC driver API <adc_api>`.
12 Depending on the target board, it reads ADC samples from one or more channels
16 The pins of the ADC channels are board-specific. Please refer to the board
22 The ADC peripheral and pinmux is configured in the board's ``.dts`` file. Make
23 sure that the ADC is enabled (``status = "okay";``).
25 In addition to that, this sample requires an ADC channel specified in the
31 also needs to be specified in devicetree, in ADC controller child nodes. Also
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| /Zephyr-Core-3.5.0/drivers/sensor/nxp_kinetis_temp/ |
| D | Kconfig | 10 depends on (ADC && SOC_FAMILY_KINETIS)
17 int "ADC resolution"
21 ADC resolution to use for the temperature sensor and bandgap
25 int "ADC oversampling"
29 ADC oversampling to use for the temperature sensor and
34 bool "Digital filtering of ADC readings"
36 Enable weighted average digital filtering of the ADC
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| /Zephyr-Core-3.5.0/drivers/sensor/nuvoton_adc_cmp_npcx/ |
| D | Kconfig | 1 # ADC CMP NPCX driver configuration options
9 bool "Nuvoton NPCX ADC threshold detection interruption"
19 bool "NPCX ADC threshold detection uses internal work queue"
27 int "Nuvoton NPCX ADC trheshold detection work queue priority"
30 This option sets internal ADC NPCX threshold detection workqueue
34 int "Nuvoton NPCX ADC trheshold detection work queue stack size"
37 This option sets internal ADC NPCX threshold detection workqueue
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| /Zephyr-Core-3.5.0/boards/shields/mikroe_adc_click/doc/ |
| D | index.rst | 3 MikroElektronika ADC Click
9 The MikroElektronika ADC Click carries the `MCP3204`_ 12-bit
12 .. figure:: adc-click.jpg
14 :alt: MikroElektronika ADC Click
16 MikroElektronika ADC Click (Credit: MikroElektronika)
25 For more information about interfacing the MCP3204 and the ADC Click,
29 - `ADC Click`_
53 https://www.mikroe.com/adc-click
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| /Zephyr-Core-3.5.0/samples/sensor/adc_cmp_npcx/ |
| D | sample.yaml | 2 description: Demonstration of nuvoton NPCX ADC comparator driver
3 name: NPCX ADC comparator sample
10 - adc
18 - "ADC CMP: Set Upper threshold"
19 - "ADC CMP: Upper threshold detected"
|
