16 #include <zephyr/drivers/adc.h>
43 #include <zephyr/dt-bindings/adc/stm32_adc.h>
59 /* ADC1_V2_5 is the ADC version for STM32F37x */
62 /* ADC5_V1_1 is the ADC version for other STM32F3x */
67  * Other ADC versions:
88 /* reference voltage for the ADC */
222 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  in adc_stm32_dma_start()  local
235 	blk_cfg->source_address = (uint32_t)LL_ADC_DMA_GetRegAddr(adc, LL_ADC_DMA_REG_REGULAR_DATA);  in adc_stm32_dma_start()
259 	/* Allow ADC to create DMA request and set to one-shot mode,  in adc_stm32_dma_start()
263 	if (adc == ADC3) {  in adc_stm32_dma_start()
264 		LL_ADC_REG_SetDMATransferMode(adc,  in adc_stm32_dma_start()
266 		LL_ADC_EnableDMAReq(adc);  in adc_stm32_dma_start()
268 		LL_ADC_REG_SetDataTransferMode(adc,  in adc_stm32_dma_start()
272 	LL_ADC_REG_SetDataTransferMode(adc, LL_ADC_REG_DMA_TRANSFER_LIMITED);  in adc_stm32_dma_start()
347 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  in adc_stm32_start_conversion()  local
353 	LL_ADC_REG_StartConversion(adc);  in adc_stm32_start_conversion()
355 	LL_ADC_REG_StartConversionSWStart(adc);  in adc_stm32_start_conversion()
363 /* Number of ADC clock cycles to wait before of after starting calibration */
377 	 * Other ADC modules have to wait for some cycles after calibration to  in adc_stm32_calib_delay()
386 		LOG_ERR("ADC clock rate get error.");  in adc_stm32_calib_delay()
390 		LOG_ERR("ADC Clock rate null");  in adc_stm32_calib_delay()
404 	ADC_TypeDef *adc = config->base;  in adc_stm32_calib()  local
412 	LL_ADC_StartCalibration(adc, LL_ADC_SINGLE_ENDED);  in adc_stm32_calib()
420 	LL_ADC_StartCalibration(adc);  in adc_stm32_calib()
422 	LL_ADC_StartCalibration(adc, LL_ADC_CALIB_OFFSET);  in adc_stm32_calib()
424 	LL_ADC_StartCalibration(adc, LL_ADC_CALIB_OFFSET, LL_ADC_SINGLE_ENDED);  in adc_stm32_calib()
427 	 * on the ADC control register, for enabling the peripheral for example  in adc_stm32_calib()
429 	while (LL_ADC_IsCalibrationOnGoing(adc)) {  in adc_stm32_calib()
435  * Disable ADC peripheral, and wait until it is disabled
437 static void adc_stm32_disable(ADC_TypeDef *adc)  in adc_stm32_disable()  argument
439 	if (LL_ADC_IsEnabled(adc) != 1UL) {  in adc_stm32_disable()
445 	 * the ADC is completely stopped.  in adc_stm32_disable()
450 	if (LL_ADC_REG_IsConversionOngoing(adc)) {  in adc_stm32_disable()
451 		LL_ADC_REG_StopConversion(adc);  in adc_stm32_disable()
452 		while (LL_ADC_REG_IsConversionOngoing(adc)) {  in adc_stm32_disable()
465 	if (LL_ADC_INJ_IsConversionOngoing(adc)) {  in adc_stm32_disable()
466 		LL_ADC_INJ_StopConversion(adc);  in adc_stm32_disable()
467 		while (LL_ADC_INJ_IsConversionOngoing(adc)) {  in adc_stm32_disable()
472 	LL_ADC_Disable(adc);  in adc_stm32_disable()
474 	/* Wait ADC is fully disabled so that we don't leave the driver into intermediate state  in adc_stm32_disable()
477 	while (LL_ADC_IsEnabled(adc) == 1UL) {  in adc_stm32_disable()
523  * LL_ADC_SetOverSamplingScope() which in addition stops the ADC if needed.
525 static void adc_stm32_oversampling_scope(ADC_TypeDef *adc, uint32_t ovs_scope)  in adc_stm32_oversampling_scope()  argument
530 	 * setting OVS bits is conditioned to ADC state: ADC must be disabled  in adc_stm32_oversampling_scope()
533 	if (LL_ADC_GetOverSamplingScope(adc) == ovs_scope) {  in adc_stm32_oversampling_scope()
536 	adc_stm32_disable(adc);  in adc_stm32_oversampling_scope()
538 	LL_ADC_SetOverSamplingScope(adc, ovs_scope);  in adc_stm32_oversampling_scope()
544  * ADC if needed.
546 static void adc_stm32_oversampling_ratioshift(ADC_TypeDef *adc, uint32_t ratio, uint32_t shift)  in adc_stm32_oversampling_ratioshift()  argument
549 	 * setting OVS bits is conditioned to ADC state: ADC must be disabled  in adc_stm32_oversampling_ratioshift()
552 	if ((LL_ADC_GetOverSamplingRatio(adc) == ratio)  in adc_stm32_oversampling_ratioshift()
553 	    && (LL_ADC_GetOverSamplingShift(adc) == shift)) {  in adc_stm32_oversampling_ratioshift()
556 	adc_stm32_disable(adc);  in adc_stm32_oversampling_ratioshift()
558 	LL_ADC_ConfigOverSamplingRatioShift(adc, ratio, shift);  in adc_stm32_oversampling_ratioshift()
566 static int adc_stm32_oversampling(ADC_TypeDef *adc, uint8_t ratio)  in adc_stm32_oversampling()  argument
569 		adc_stm32_oversampling_scope(adc, LL_ADC_OVS_DISABLE);  in adc_stm32_oversampling()
572 		adc_stm32_oversampling_scope(adc, LL_ADC_OVS_GRP_REGULAR_CONTINUED);  in adc_stm32_oversampling()
585 	if (adc != ADC3) {  in adc_stm32_oversampling()
587 		adc_stm32_oversampling_ratioshift(adc, 1 << ratio, shift);  in adc_stm32_oversampling()
590 		adc_stm32_oversampling_ratioshift(adc, table_oversampling_ratio[ratio], shift);  in adc_stm32_oversampling()
594 	adc_stm32_oversampling_ratioshift(adc, 1 << ratio, shift);  in adc_stm32_oversampling()
597 	if (adc != ADC4) {  in adc_stm32_oversampling()
599 		adc_stm32_oversampling_ratioshift(adc, (1 << ratio), shift);  in adc_stm32_oversampling()
602 		adc_stm32_oversampling_ratioshift(adc, table_oversampling_ratio[ratio], shift);  in adc_stm32_oversampling()
605 	adc_stm32_oversampling_ratioshift(adc, table_oversampling_ratio[ratio], shift);  in adc_stm32_oversampling()
613  * Enable ADC peripheral, and wait until ready if required by SOC.
615 static int adc_stm32_enable(ADC_TypeDef *adc)  in adc_stm32_enable()  argument
617 	if (LL_ADC_IsEnabled(adc) == 1UL) {  in adc_stm32_enable()
623 	LL_ADC_ClearFlag_ADRDY(adc);  in adc_stm32_enable()
624 	LL_ADC_Enable(adc);  in adc_stm32_enable()
627 	 * Enabling ADC modules in many series may fail if they are  in adc_stm32_enable()
629 	 * to ensure ADC modules are properly enabled.  in adc_stm32_enable()
633 	while (LL_ADC_IsActiveFlag_ADRDY(adc) == 0) {  in adc_stm32_enable()
636 		if (LL_ADC_IsEnabled(adc) == 0UL) {  in adc_stm32_enable()
637 			LL_ADC_Enable(adc);  in adc_stm32_enable()
648 	 * On STM32F1, F2, F37x, F4, F7 and L1, do not re-enable the ADC.  in adc_stm32_enable()
652 	LL_ADC_Enable(adc);  in adc_stm32_enable()
662 	/* user_data directly holds the adc device */
665 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
671 		if (LL_ADC_IsActiveFlag_OVR(adc) || (status >= 0)) {
684 			LL_ADC_ClearFlag_OVR(adc);
693 			LL_ADC_REG_StopConversion(adc);
705 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
707 	uintptr_t addr = (uintptr_t)adc + reg;
716 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
718 	uintptr_t addr = (uintptr_t)adc + reg;
727 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
765 			 * resets RES[1:0] bitfield. We need to disable and enable adc.
767 			adc_stm32_disable(adc);
779 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
804 			LL_ADC_SetChannelPreselection(adc, channel);
806 			LL_ADC_REG_SetSequencerRanks(adc, table_rank[channel_index], channel);
807 			LL_ADC_REG_SetSequencerLength(adc, table_seq_len[channel_index]);
814 		LL_ADC_REG_SetSequencerChannels(adc, channels_mask);
824 		while (LL_ADC_IsActiveFlag_CCRDY(adc) == 0) {
826 		LL_ADC_ClearFlag_CCRDY(adc);
833 	LL_ADC_SetSequencersScanMode(adc, LL_ADC_SEQ_SCAN_ENABLE);
844 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
890 	err = adc_stm32_oversampling(adc, sequence->oversampling);
905 		/* we cannot calibrate the ADC while the ADC is enabled */
906 		adc_stm32_disable(adc);
915 	 * Make sure the ADC is enabled as it might have been disabled earlier
919 	adc_stm32_enable(adc);
922 	LL_ADC_ClearFlag_OVR(adc);
928 	LL_ADC_REG_SetFlagEndOfConversion(adc, LL_ADC_REG_FLAG_EOC_UNITARY_CONV);
929 	LL_ADC_EnableIT_EOCS(adc);
931 	LL_ADC_EnableIT_EOS(adc);
933 	LL_ADC_EnableIT_EOC(adc);
980 	ADC_TypeDef *adc = config->base;  local
983 	if (LL_ADC_IsActiveFlag_EOS(adc) == 1) {
985 	if (LL_ADC_IsActiveFlag_EOCS(adc) == 1) {
987 	if (LL_ADC_IsActiveFlag_EOC(adc) == 1) {
989 		*data->buffer++ = LL_ADC_REG_ReadConversionData32(adc);
1006 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
1010 	adc_stm32_disable(adc);
1016 	LL_ADC_SetCommonPathInternalCh(__LL_ADC_COMMON_INSTANCE(adc),
1021 	LL_ADC_SetChannelPreselection(adc, 0);
1083 	ADC_TypeDef *adc = config->base;  local
1094 		LL_ADC_SetChannelSamplingTime(adc,
1101 		LL_ADC_SetSamplingTimeCommonChannels(adc,
1107 		LL_ADC_SetChannelSamplingTime(adc,
1110 		LL_ADC_SetSamplingTimeCommonChannels(adc,
1189 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
1191 	ARG_UNUSED(adc); /* Necessary to avoid warnings on some series */
1199 		/* Enable ADC clock source */
1208 	LL_ADC_SetClock(adc, config->clk_prescaler);
1217 		LL_ADC_SetClock(adc, config->clk_prescaler);
1219 		LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(adc),
1221 		LL_ADC_SetClock(adc, LL_ADC_CLOCK_ASYNC);
1224 	LL_ADC_SetCommonClock(__LL_ADC_COMMON_INSTANCE(adc),
1236 	ADC_TypeDef *adc = (ADC_TypeDef *)config->base;  local
1250 	 * conversion time for all channels on one ADC instance has to
1255 	 * selection of all channels on one ADC instance is the same.
1264 		LOG_ERR("ADC pinctrl setup failed (%d)", err);
1293 	LL_ADC_DisableDeepPowerDown(adc);
1295 	/* The ADC clock must be disabled by clock gating during CPU1 sleep/stop */
1299 	 * Many ADC modules need some time to be stabilized before performing
1305 	LL_ADC_EnableInternalRegulator(adc);
1310 	adc_stm32_disable(adc);
1315 	err = adc_stm32_enable(adc);
1325 	LL_ADC_REG_SetTriggerSource(adc, LL_ADC_REG_TRIG_SOFTWARE);
1336 	if (adc == ADC1) {
1338 	} else if (adc == ADC2) {
1349 			adc, LL_ADC_CALIB_LINEARITY_WORD1 << count,
1383 /* Concat prefix (1st element) and DIV value (2nd element) of st,adc-prescaler */
1393 bool adc_stm32_is_irq_active(ADC_TypeDef *adc)  argument
1396 	return LL_ADC_IsActiveFlag_EOCS(adc) ||
1398 	return LL_ADC_IsActiveFlag_EOC(adc) ||
1400 	       LL_ADC_IsActiveFlag_OVR(adc) ||
1401 	       LL_ADC_IsActiveFlag_JEOS(adc) ||
1402 	       LL_ADC_IsActiveFlag_AWD1(adc);