| /Zephyr-latest/soc/microchip/mec/ |
| D | Kconfig | 5 # SPDX-License-Identifier: Apache-2.0
18 Boot-ROM. Use the full Microchip SPI image generator program for
19 authentication and all other Boot-ROM loader features. Refer to the MCHP
43 bool "SPI flash clock rate of 24 MHz"
54 default 24 if MCHP_MEC_HEADER_SPI_FREQ_MHZ_24
65 bool "SPI flash operates full-duplex with frequency (< 25 MHz)"
68 bool "SPI flash operates full-duplex with fast reading mode"
92 bool "SPI flash size 256K Bytes"
94 The SPI flash size is 256K Bytes.
97 bool "SPI flash size 512K Bytes"
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| /Zephyr-latest/drivers/dma/ |
| D | dma_iproc_pax_v1.h | 4 * SPDX-License-Identifier: Apache-2.0
22 #define RM_COMM_CONTROL_AE_TIMEOUT_EN_SHIFT 5
23 #define RM_COMM_CONTROL_AE_TIMEOUT_EN BIT(5)
36 /* ascii signature 'V' 'K' */
43 /* Bits 0:1 ignored by PAX DMA, i.e. 4-byte address alignment */
51 * Per-ring memory, with 8K & 4K alignment
53 * s/w need to allocate extra upto 8K to
65 uint64_t bdcount : 5; /*bdcount 40:36*/
77 uint64_t length : 25; /*transfer length in bytes 24:0*/
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| D | dma_iproc_pax.h | 4 * SPDX-License-Identifier: Apache-2.0
10 /* Broadcom PAX-DMA RM register defines */
14 /* Per-Ring register offsets */
215 #define RING_CONTROL_FLUSH BIT(5)
239 * AE_TIMEOUT is (2^AE_TIMEOUT_BITS) - (2 * NumOfAEs * 2^FIFO_DEPTH_BITS)
240 * AE_TIMEOUT_BITS=32, NumOfAEs=2, FIFO_DEPTH_BITS=5
241 * timeout val = 2^32 - 2*2*2^5
261 #define RM_COMM_AXI_CONTROL_RD_CH_EN_SHIFT 24
268 /* Register Per-ring RING_COMMON_CONTROL fields */
304 #define PAX_DMA_STATUS_PCIE_RX_POISON BIT(5)
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| /Zephyr-latest/boards/snps/nsim/arc_classic/support/ |
| D | mdb_hs6x.args | 1 -nogoifmain
2 -noprofile
3 -arc64
4 -core0
5 -Xdual_issue
6 -uarch_rev=0:0
7 -rgf_num_banks=1
8 -rgf_num_wr_ports=2
9 -Xm128
10 -Xatomic=2
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| D | nsim_hs6x.props | 31 nsim_bpu_tosq_entries=5
34 nsim_isa_smart_version=5
41 mmu_pagesize=4K
48 nsim_isa_dc_version=5
59 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
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| D | mdb_hs5x.args | 1 -arcv3hs
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -lpc_width=0
8 -Xatomic=2
9 -Xll64
10 -Xunaligned
[all …]
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| D | nsim_hs5x.props | 32 nsim_bpu_tosq_entries=5
42 mmu_pagesize=4K
49 nsim_isa_dc_version=5
60 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=24
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| D | mdb_hs6x_smp.args | 1 -nogoifmain
2 -noprofile
3 -arc64
4 -core0
5 -Xdual_issue
6 -uarch_rev=0:0
7 -rgf_num_banks=1
8 -rgf_num_wr_ports=2
9 -Xm128
10 -Xatomic=2
[all …]
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| D | mdb_hs6x_smp_12cores.args | 1 -arc64
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -Xm128
8 -Xatomic=2
9 -Xunaligned
10 -Xmpy_cycles=3
[all …]
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| D | mdb_vpx5.args | 1 -arcv2hs
2 -core4
3 -uarch_rev=1:4
4 -Xcode_density
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -Xatomic
8 -Xll64
9 -Xunaligned
10 -Xdiv_rem=radix4
[all …]
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| D | mdb_hs5x_smp.args | 1 -arcv3hs
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -lpc_width=0
8 -Xatomic=2
9 -Xll64
10 -Xunaligned
[all …]
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| D | mdb_hs5x_smp_12cores.args | 1 -arcv3hs
2 -core0
3 -Xdual_issue
4 -uarch_rev=0:0
5 -rgf_num_banks=1
6 -rgf_num_wr_ports=2
7 -lpc_width=0
8 -Xatomic=2
9 -Xll64
10 -Xunaligned
[all …]
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| D | nsim_vpx5.props | 43 nsim_bpu_tosq_entries=5
45 nsim_isa_number_of_interrupts=24
51 nsim_isa_dc_version=5
82 vec_mem_size=256k
99 nsim_cluster_version=5
105 nsim_mem-dev=uart0,kind=dwuart,base=0xf0000000,irq=23
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| /Zephyr-latest/boards/st/stm32l1_disco/doc/ |
| D | index.rst | 7 an integrated ST-LINK/V2 debugger and programmer. The boards have a
8 24-segment LCD and a touch slider, along with two user LEDs and a user button.
16 - STM32LDISCOVERY targets STM32L152RBT6, with 128K flash, 16K RAM, 4K EEPROM
17 - STM32L152CDISCOVERY targets STM32L152RCT6, with 256K flash, 32K RAM, 8K EEPROM
31 - On-board ST-LINK/V2 with selection mode switch to use the kit as a standalone
32 ST-LINK/V2 (with SWD connector for programming and debugging)
33 - Board power supply: through USB bus or from an external 5 V supply voltage
34 - External application power supply: 3 V and 5 V
35 - Four LEDs:
37 - LD1 (red) for 3.3 V power on
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| /Zephyr-latest/boards/shields/x_nucleo_eeprma2/ |
| D | x_nucleo_eeprma2.overlay | 4 * SPDX-License-Identifier: Apache-2.0
12 eeprom-0 = &eeprom0_x_nucleo_eeprma2;
13 eeprom-1 = &eeprom4_x_nucleo_eeprma2;
19 clock-frequency = <I2C_BITRATE_FAST>;
22 /* M24C02-FMC6TG aka U1 (2 kbit eeprom in DFN8 package) */
27 address-width = <8>;
28 timeout = <5>;
30 /* if solder-bridge closed: arduino A1 pin on CN8 can wp */
31 /* wp-gpios = <&arduino_header 1 GPIO_ACTIVE_LOW>; */
35 /* M24256-DFDW6TP aka U2 (256 kbit eeprom in TSSOP package) */
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| /Zephyr-latest/boards/pjrc/teensy4/ |
| D | teensy4-pinctrl.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
10 #include <nxp/nxp_imx/rt/mimxrt1062dvl6a-pinctrl.dtsi>
17 bias-disable;
18 drive-strength = "r0-6";
19 slew-rate = "slow";
20 nxp,speed = "100-mhz";
21 input-enable;
31 drive-strength = "r0-5";
32 bias-pull-up;
33 bias-pull-up-value = "100k";
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| /Zephyr-latest/boards/ezurio/bt610/ |
| D | bt610.dts | 5 * SPDX-License-Identifier: Apache-2.0
8 /dts-v1/;
10 #include "bt610-pinctrl.dtsi"
11 #include <zephyr/dt-bindings/input/input-event-codes.h>
19 zephyr,shell-uart = &uart0;
20 zephyr,uart-mcumgr = &uart0;
21 zephyr,bt-mon-uart = &uart0;
22 zephyr,bt-c2h-uart = &uart0;
25 zephyr,code-partition = &slot0_partition;
30 compatible = "gpio-leds";
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| /Zephyr-latest/boards/96boards/nitrogen/ |
| D | 96b_lscon.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
9 compatible = "linaro,96b-lscon-1v8";
10 #gpio-cells = <2>;
11 gpio-map-mask = <0xffffffff 0xffffffc0>;
12 gpio-map-pass-thru = <0 0x3f>;
13 gpio-map = <23 0 &gpio0 2 0>, /* GPIO-A */
14 <24 0 &gpio0 3 0>, /* GPIO-B */
15 <25 0 &gpio0 4 0>, /* GPIO-C */
16 <26 0 &gpio0 5 0>, /* GPIO-D */
17 <27 0 &gpio0 6 0>, /* GPIO-E */
[all …]
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| /Zephyr-latest/subsys/net/lib/lwm2m/ |
| D | lwm2m_util.c | 4 * SPDX-License-Identifier: Apache-2.0
26 int32_t e = -1, v, f = 0; in lwm2m_float_to_b32()
28 int32_t val2 = (*in - (int32_t)*in) * PRECISION32; in lwm2m_float_to_b32()
32 return -EINVAL; in lwm2m_float_to_b32()
64 /* handle -e */ in lwm2m_float_to_b32()
65 e--; in lwm2m_float_to_b32()
68 v -= PRECISION32; in lwm2m_float_to_b32()
69 f |= 1 << (22 - i); in lwm2m_float_to_b32()
91 /* exponent: bits 30-23 */ in lwm2m_float_to_b32()
95 /* fraction: bits 22-0 */ in lwm2m_float_to_b32()
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| /Zephyr-latest/drivers/counter/ |
| D | counter_cmos.c | 3 * SPDX-License-Identifier: Apache-2.0
5 * This barebones driver enables the use of the PC AT-style RTC
6 * (the so-called "CMOS" clock) as a primitive, 1Hz monotonic counter.
33 * type-punning to compare states will break.
49 * values in 'struct state' are BCD-encoded.
65 #define STATUS_B_24HR 0x02 /* 24-hour (vs 12-hour) mode */
77 k_spinlock_key_t k; in read_register() local
80 k = k_spin_lock(&lock); in read_register()
83 k_spin_unlock(&lock, k); in read_register()
101 /* Convert 8-bit (2-digit) BCD to binary equivalent. */
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| /Zephyr-latest/boards/ezurio/bl5340_dvk/ |
| D | bl5340_dvk_nrf5340_cpuapp_common.dtsi | 2 * Copyright (c) 2019-2023 Nordic Semiconductor ASA
3 * Copyright (c) 2021-2023 Laird Connectivity
5 * SPDX-License-Identifier: Apache-2.0
7 #include "bl5340_dvk_nrf5340_cpuapp_common-pinctrl.dtsi"
8 #include <zephyr/dt-bindings/input/input-event-codes.h>
13 zephyr,shell-uart = &uart0;
14 zephyr,uart-mcumgr = &uart0;
15 zephyr,bt-mon-uart = &uart0;
16 zephyr,bt-c2h-uart = &uart0;
18 zephyr,bt-hci = &bt_hci_ipc0;
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| /Zephyr-latest/dts/bindings/pinctrl/ |
| D | ambiq,apollo3-pinctrl.yaml | 2 # SPDX-License-Identifier: Apache-2.0
19 /* You can put this in places like a board-pinctrl.dtsi file in
23 /* include pre-defined combinations for the SoC variant used by the board */
24 #include <dt-bindings/pinctrl/ambiq-apollo3-pinctrl.h>
33 input-enable;
47 pins, such as the 'input-enable' property in group 2.
49 compatible: "ambiq,apollo3-pinctrl"
53 child-binding:
56 child-binding:
59 - name: pincfg-node.yaml
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| /Zephyr-latest/boards/sifive/hifive_unleashed/ |
| D | hifive_unleashed.dtsi | 4 * SPDX-License-Identifier: Apache-2.0
7 /dts-v1/;
9 #include <sifive/riscv64-fu540.dtsi>
14 zephyr,shell-uart = &uart0;
21 reg-names = "mem";
25 compatible = "linaro,96b-lscon-1v8";
26 #gpio-cells = <2>;
27 gpio-map-mask = <0xffffffff 0xffffffc0>;
28 gpio-map-pass-thru = <0 0x3f>;
29 gpio-map = <22 0 &gpio0 0 0>, /* GPIO-A */
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| /Zephyr-latest/subsys/bluetooth/crypto/ |
| D | bt_crypto.h | 2 * SPDX-License-Identifier: Apache-2.0
16 * Defined in Core Vol. 3, part H 2.2.5.
18 * @param[in] key 128-bit key
24 * @retval -EIO Computation failed.
33 * @param[in] u 256-bit
34 * @param[in] v 256-bit
35 * @param[in] x 128-bit key
36 * @param[in] z 8-bit
40 * @retval -EIO Computation failed.
49 * @param[in] w 256-bit
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| /Zephyr-latest/dts/arm/nxp/ |
| D | nxp_lpc55S6x_common.dtsi | 5 * SPDX-License-Identifier: Apache-2.0
9 #include <zephyr/dt-bindings/adc/adc.h>
10 #include <zephyr/dt-bindings/clock/mcux_lpc_syscon_clock.h>
11 #include <zephyr/dt-bindings/gpio/gpio.h>
12 #include <zephyr/dt-bindings/i2c/i2c.h>
13 #include <zephyr/dt-bindings/inputmux/inputmux_trigger_ports.h>
14 #include <zephyr/dt-bindings/memory-attr/memory-attr-arm.h>
15 #include <arm/armv8-m.dtsi>
16 #include <zephyr/dt-bindings/reset/nxp_syscon_reset_common.h>
24 zephyr,flash-controller = &iap;
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