Searched full:170 (Results 1 – 25 of 61) sorted by relevance
123
| /Zephyr-latest/boards/st/nucleo_g431kb/ |
| D | nucleo_g431kb.dts | 61 /* Adjust the pll for a SYSTEM Clock of 170MHz */
74 clock-frequency = <DT_FREQ_M(170)>;
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| /Zephyr-latest/tests/drivers/clock_control/stm32_clock_configuration/stm32_common_core/boards/ |
| D | pll_170_hse_24.overlay | 29 clock-frequency = <DT_FREQ_M(170)>;
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| /Zephyr-latest/soc/xlnx/zynq7000/xc7zxxxs/ |
| D | Kconfig.soc | 36 65k logic cells, 3.8Mb block RAM, 170 DSP slices, up to 200 I/O pins.
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| /Zephyr-latest/samples/subsys/debug/fuzz/ |
| D | README.rst | 66 …#579432 NEW cov: 170 ft: 171 corp: 17/414b lim: 4096 exec/s: 38628 rss: 31Mb L: 8/256 MS: 1 Per…
67 …#579948 REDUCE cov: 170 ft: 171 corp: 17/413b lim: 4096 exec/s: 38663 rss: 31Mb L: 7/256 MS: 1 Era…
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| /Zephyr-latest/dts/bindings/clock/ |
| D | st,stm32g4-pll-clock.yaml | 20 The PLL output frequency must not exceed 170 MHz.
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| /Zephyr-latest/boards/shields/st7789v_generic/ |
| D | st7789v_tl019fqv01.overlay | 27 height = <170>;
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| /Zephyr-latest/include/zephyr/dt-bindings/pinctrl/ |
| D | esp32s2-gpio-sigmap.h | 255 #define ESP_SUBSPID7_IN 170
256 #define ESP_SUBSPID7_OUT 170
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| D | esp32-gpio-sigmap.h | 334 #define ESP_I2S1I_DATA_IN4 170
335 #define ESP_I2S1O_DATA_OUT4 170
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| D | esp32s3-gpio-sigmap.h | 310 #define ESP_PWM1_SYNC1_IN 170
311 #define ESP_PWM1_OUT2A 170
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| /Zephyr-latest/samples/drivers/misc/ft800/src/ |
| D | main.c | 68 ft8xx_copro_cmd_number(80, 170, 29, in main()
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| /Zephyr-latest/include/zephyr/dt-bindings/reset/ |
| D | intel_socfpga_reset.h | 57 #define RSTMGR_SOC2FPGA_FLUSH_REQ_RSTLINE 170
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| /Zephyr-latest/scripts/coredump/gdbstubs/arch/ |
| D | xtensa.py | 331 A13 = 170
365 A15 = 170
433 A12 = 170
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| /Zephyr-latest/doc/hardware/emulator/img/ |
| D | device_class_emulator.svg | 4 …170px; margin-left: 19px;"><div data-drawio-colors="color: rgb(0, 0, 0); " style="box-sizing: bord…
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| /Zephyr-latest/doc/project/ |
| D | lts.svg | 4 …<text x="170" y="39" fill="#330000" font-family="Helvetica" font-size="13px" text-anchor="middle">…
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| /Zephyr-latest/boards/st/nucleo_g431rb/ |
| D | nucleo_g431rb.dts | 89 clock-frequency = <DT_FREQ_M(170)>;
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| /Zephyr-latest/dts/arm/broadcom/ |
| D | valkyrie-irq.h | 78 #define DMAC_IRQ2 170
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| /Zephyr-latest/boards/st/nucleo_g431rb/doc/ |
| D | index.rst | 30 - Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 170 MHz
165 driven by 16MHz high speed internal oscillator. The clock can be boosted to 170MHz if boost mode
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| /Zephyr-latest/doc/connectivity/bluetooth/api/mesh/images/ |
| D | blob_srv.svg | 3 …170 160 180 160 L 202.76 160" fill="none" stroke="#000000" stroke-miterlimit="10" pointer-events="…
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| /Zephyr-latest/boards/st/nucleo_g474re/ |
| D | nucleo_g474re.dts | 88 clock-frequency = <DT_FREQ_M(170)>;
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| /Zephyr-latest/doc/build/dts/ |
| D | zephyr_dt_build_flow.svg | 84 x="170" />
95 d="m 170,20 h -25 v 60 h 25" />
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| /Zephyr-latest/soc/brcm/bcmvk/valkyrie/ |
| D | soc.h | 199 M7_DMAC_IRQ2 = 170,
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| /Zephyr-latest/doc/services/zbus/images/ |
| D | zbus_publishing_process_example.svg | 32 …170L77.224 152.72H80.488L82.9413 164.688L85.5013 152.72H88.6587L88.9787 170H86.632L86.376 157.989L…
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| /Zephyr-latest/boards/st/nucleo_g474re/doc/ |
| D | index.rst | 30 - Core: ARM |reg| 32-bit Cortex |reg| -M4 CPU with FPU, frequency up to 170 MHz
179 driven by 16MHz high speed internal oscillator. The clock can be boosted to 170MHz if boost mode
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| /Zephyr-latest/drivers/memc/ |
| D | sifive_ddr.c | 152 DDR_CTL_REG(ddr_ctrl, 170) |= WRLVL_EN | DFI_PHY_WRLELV_MODE; in ddr_init()
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| /Zephyr-latest/soc/brcm/bcmvk/viper/m7/ |
| D | soc.h | 200 M7_DMAC_IRQ2 = 170,
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