1/*
2 * Copyright (c) 2024 Klaus Nagel, <nagelkl01@gmail.com>
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7/dts-v1/;
8#include <st/g4/stm32g431Xb.dtsi>
9#include <st/g4/stm32g431k(6-8-b)tx-pinctrl.dtsi>
10
11/ {
12	model = "STMicroelectronics STM32G431KB-NUCLEO board";
13	compatible = "st,stm32g431kb-nucleo";
14
15	chosen {
16		zephyr,console = &lpuart1;
17		zephyr,shell-uart = &lpuart1;
18		zephyr,sram = &sram0;
19		zephyr,flash = &flash0;
20	};
21
22	leds: leds {
23		compatible = "gpio-leds";
24		green_led: led_0 {
25			gpios = <&gpiob 8 GPIO_ACTIVE_HIGH>;
26			label = "User LD2";
27		};
28
29	};
30
31	pwmleds {
32		compatible = "pwm-leds";
33
34		green_pwm_led: green_pwm_led {
35			pwms = <&pwm4 3 PWM_MSEC(20) PWM_POLARITY_NORMAL>;
36		};
37	};
38
39
40	aliases {
41		led0 = &green_led;
42		pwm-led0 = &green_pwm_led;
43		watchdog0 = &iwdg;
44	};
45};
46
47&clk_hsi {
48	status = "okay";
49};
50
51&clk_lsi {
52	status = "okay";
53};
54
55stm32_lp_tick_source: &lptim1 {
56	clocks = <&rcc STM32_CLOCK_BUS_APB1 0x80000000>,
57			 <&rcc STM32_SRC_LSI LPTIM1_SEL(3)>;
58	status = "okay";
59};
60
61/* Adjust the pll for a SYSTEM Clock of 170MHz  */
62&pll {
63	div-m = <4>;
64	mul-n = <85>;
65	div-p = <7>;
66	div-q = <2>;
67	div-r = <2>;
68	clocks = <&clk_hsi>;
69	status = "okay";
70};
71
72&rcc {
73	clocks = <&pll>;
74	clock-frequency = <DT_FREQ_M(170)>;
75	ahb-prescaler = <1>;
76	apb1-prescaler = <1>;
77	apb2-prescaler = <1>;
78};
79
80&lpuart1 {
81	pinctrl-0 = <&lpuart1_tx_pa2 &lpuart1_rx_pa3>;
82	pinctrl-names = "default";
83	current-speed = <115200>;
84	status = "okay";
85};
86
87&timers4 {
88	st,prescaler = <10000>;
89	status = "okay";
90
91	pwm4: pwm {
92		status = "okay";
93		pinctrl-0 = <&tim4_ch3_pb8>;
94		pinctrl-names = "default";
95	};
96};
97
98&i2c2 {
99	pinctrl-0 = <&i2c2_scl_pa9 &i2c2_sda_pa8>;
100	pinctrl-names = "default";
101	status = "okay";
102};
103
104&flash0 {
105
106	partitions {
107		compatible = "fixed-partitions";
108		#address-cells = <1>;
109		#size-cells = <1>;
110
111		/* Set 4Kb of storage at the end of the 128Kb of flash */
112		storage_partition: partition@1f000 {
113			label = "storage";
114			reg = <0x0001f000 DT_SIZE_K(4)>;
115		};
116	};
117};
118