/Zephyr-latest/samples/subsys/zbus/priority_boost/ |
D | sample.yaml | 10 - "I: 0 -> T1: prio before 5" 11 - "I: 0 ---> L1: T1 prio 5" 12 - "I: 0 ---> L2: T1 prio 5" 13 - "I: 0 -> T1: prio after 5" 14 - "I: 1 -> T1: prio before 5" 15 - "I: 1 ---> L1: T1 prio 5" 16 - "I: 1 ---> L2: T1 prio 5" 17 - "I: 1 -> T1: prio after 5" 18 - "I: 2 -> T1: prio before 5" 19 - "I: 2 ---> L1: T1 prio 5" [all …]
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D | README.rst | 1 .. zephyr:code-sample:: zbus-priority-boost 3 :relevant-api: zbus_apis 15 .. code-block:: c 49 .. zephyr-app-commands:: 50 :zephyr-app: samples/subsys/zbus/priority_boost 51 :gen-args: -DCONFIG_ZBUS_PRIORITY_BOOST=n 52 :host-os: unix 59 .. code-block:: console 61 I: -------------- 62 I: 0 -> T1: prio before 5 [all …]
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/Zephyr-latest/tests/net/lib/lwm2m/content_senml_cbor/src/ |
D | main.c | 4 * SPDX-License-Identifier: Apache-2.0 18 #define TEST_RES_S16 1 22 #define TEST_RES_FLOAT 5 108 test_obj.version_major = 1; in test_obj_init() 113 test_obj.max_instance_count = 1U; in test_obj_init() 147 memcpy(test_msg.msg_data + 1, payload.data, payload.len); in test_payload_set() 148 test_msg.cpkt.offset = payload.len + 1; in test_payload_set() 149 test_msg.in.offset = 1; in test_payload_set() 163 /* Leave some space for Content-format option */ in test_prepare_nomem() 165 test_msg.cpkt.offset = sizeof(test_msg.msg_data) - TEST_PAYLOAD_OFFSET; in test_prepare_nomem() [all …]
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/Zephyr-latest/samples/kernel/condition_variables/simple/ |
D | README.rst | 26 .. zephyr-app-commands:: 27 :zephyr-app: samples/kernel/condition_variables/simple 28 :host-os: unix 38 .. code-block:: console 40 [thread 0] working (0/5) 41 [thread 1] working (0/5) 42 [thread 2] working (0/5) 43 [thread 3] working (0/5) 44 [thread 4] working (0/5) 45 [thread 5] working (0/5) [all …]
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/Zephyr-latest/tests/bsim/bluetooth/ll/edtt/gatt_test_app/src/gatt/ |
D | service_a_1.c | 4 * SPDX-License-Identifier: Apache-2.0 9 * This code is auto-generated from the Excel Workbook 10 * 'GATT_Test_Databases.xlsm' Sheet: 'Large Database 1' 43 '1', '1', '1', '1', '1', '2', '2', '2', '2', '2', '3', '3', '3', 44 '3', '3', '4', '4', '4', '4', '4', '5', '5', '5', '5', '5', '6', 46 '8', '9', '9', '9', '9', '9', '0', '0', '0', '0', '0', '1', '1', 47 '1', '1', '1', '2', '2', '2', '2', '2', '3', '3', '3', '3', '3', 48 '4', '4', '4', '4', '4', '5', '5', '5', '5', '5', '6', '6', '6', 50 '9', '9', '9', '9', '0', '0', '0', '0', '0', '1', '1', '1', '1', 51 '1', '2', '2', '2', '2', '2', '3', '3', '3', '3', '3', '4', '4', [all …]
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/Zephyr-latest/dts/arm/nuvoton/npcx/ |
D | npcx-miwus-wui-map.dtsi | 4 * SPDX-License-Identifier: Apache-2.0 9 npcx-miwus-wui-map { 10 compatible = "nuvoton,npcx-miwu-wui-map"; 14 wui_io80: wui0-1-0 { 17 wui_io81: wui0-1-1 { 18 miwus = <&miwu0 0 1>; /* GPIO81 */ 20 wui_io82: wui0-1-2 { 23 wui_io83: wui0-1-3 { 26 wui_io87: wui0-1-7 { 31 wui_io90: wui0-2-0 { [all …]
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/Zephyr-latest/samples/subsys/nvs/ |
D | sample.yaml | 10 - nrf52dk/nrf52832 15 - "Id: 1, Address: 192.168.1.1" 16 - "Id: 2, Key: ff fe fd fc fb fa f9 f8" 17 - "Id: 3, Reboot_counter: (.*)" 18 - "Id: 4, Data: DATA" 19 - "Id: 5, Longarray: 0 1 2 3 4 5 6 7 8 9 a b c d e f 10 11 12 13 14 15 16 17 18 19 1a 1b \ 20 1c 1d 1e 1f 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f 30 31 32 33 34 35 36 37 38 \ 22 56 57 58 59 5a 5b 5c 5d 5e 5f 60 61 62 63 64 65 66 67 68 69 6a 6b 6c 6d 6e 6f 70 71 72 \
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/Zephyr-latest/dts/arm/infineon/cat3/xmc/ |
D | xmc4500_F100x1024-intc.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 6 #include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h> 9 port-line-mapping = < 10 XMC4XXX_INTC_SET_LINE_MAP(0, 1, 0, 0) /* ERU0_ETL0_INPUTA_P0_1 XMC_ERU_ETL_INPUT_A0 */ 11 XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0) /* ERU0_ETL0_INPUTA_P2_5 XMC_ERU_ETL_INPUT_A2 */ 12 XMC4XXX_INTC_SET_LINE_MAP(3, 2, 1, 0) /* ERU0_ETL0_INPUTA_P3_2 XMC_ERU_ETL_INPUT_A1 */ 16 XMC4XXX_INTC_SET_LINE_MAP(3, 1, 5, 0) /* ERU0_ETL0_INPUTB_P3_1 XMC_ERU_ETL_INPUT_B1 */ 17 XMC4XXX_INTC_SET_LINE_MAP(0, 10, 0, 1) /* ERU0_ETL1_INPUTA_P0_10 XMC_ERU_ETL_INPUT_A0 */ 18 XMC4XXX_INTC_SET_LINE_MAP(2, 3, 2, 1) /* ERU0_ETL1_INPUTA_P2_3 XMC_ERU_ETL_INPUT_A2 */ 19 XMC4XXX_INTC_SET_LINE_MAP(0, 9, 4, 1) /* ERU0_ETL1_INPUTB_P0_9 XMC_ERU_ETL_INPUT_B0 */ [all …]
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D | xmc4700_F144x2048-intc.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 6 #include <zephyr/dt-bindings/interrupt-controller/infineon-xmc4xxx-intc.h> 9 port-line-mapping = < 10 XMC4XXX_INTC_SET_LINE_MAP(0, 1, 0, 0) /* ERU0_ETL0_INPUTA_P0_1 XMC_ERU_ETL_INPUT_A0 */ 11 XMC4XXX_INTC_SET_LINE_MAP(2, 5, 2, 0) /* ERU0_ETL0_INPUTA_P2_5 XMC_ERU_ETL_INPUT_A2 */ 12 XMC4XXX_INTC_SET_LINE_MAP(3, 2, 1, 0) /* ERU0_ETL0_INPUTA_P3_2 XMC_ERU_ETL_INPUT_A1 */ 16 XMC4XXX_INTC_SET_LINE_MAP(3, 1, 5, 0) /* ERU0_ETL0_INPUTB_P3_1 XMC_ERU_ETL_INPUT_B1 */ 17 XMC4XXX_INTC_SET_LINE_MAP(0, 10, 0, 1) /* ERU0_ETL1_INPUTA_P0_10 XMC_ERU_ETL_INPUT_A0 */ 18 XMC4XXX_INTC_SET_LINE_MAP(2, 3, 2, 1) /* ERU0_ETL1_INPUTA_P2_3 XMC_ERU_ETL_INPUT_A2 */ 19 XMC4XXX_INTC_SET_LINE_MAP(0, 9, 4, 1) /* ERU0_ETL1_INPUTB_P0_9 XMC_ERU_ETL_INPUT_B0 */ [all …]
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D | xmc4500_F100x1024-pinctrl.dtsi | 3 * SPDX-License-Identifier: Apache-2.0 7 #include <zephyr/dt-bindings/pinctrl/xmc4xxx-pinctrl.h> 10 /omit-if-no-ref/ uart_tx_p0_1_u1c1: uart_tx_p0_1_u1c1 { 11 pinmux = <XMC4XXX_PINMUX_SET(0, 1, 2)>; 13 /omit-if-no-ref/ uart_tx_p0_5_u1c0: uart_tx_p0_5_u1c0 { 14 pinmux = <XMC4XXX_PINMUX_SET(0, 5, 2)>; 16 /omit-if-no-ref/ uart_tx_p1_5_u0c0: uart_tx_p1_5_u0c0 { 17 pinmux = <XMC4XXX_PINMUX_SET(1, 5, 2)>; 19 /omit-if-no-ref/ uart_tx_p1_7_u0c0: uart_tx_p1_7_u0c0 { 20 pinmux = <XMC4XXX_PINMUX_SET(1, 7, 2)>; [all …]
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/Zephyr-latest/tests/net/traffic_class/ |
D | testcase.yaml | 3 - native_sim 4 - native_sim/native/64 6 - native_sim/native/64 8 - net 9 - traffic_class 11 net.traffic_class.1: 13 - CONFIG_NET_TC_TX_COUNT=1 14 - CONFIG_NET_TC_RX_COUNT=1 17 - CONFIG_NET_TC_TX_COUNT=2 18 - CONFIG_NET_TC_RX_COUNT=2 [all …]
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/Zephyr-latest/include/zephyr/dt-bindings/clock/ |
D | npcm_clock.h | 4 * SPDX-License-Identifier: Apache-2.0 13 #define NPCM_CLOCK_PWM_J (NPCM_CLOCK_GROUP_OFFSET(0) + 1) 15 #define NPCM_CLOCK_UART3 (NPCM_CLOCK_GROUP_OFFSET(0) + 5) 17 #define NPCM_CLOCK_SPIM (NPCM_CLOCK_GROUP_OFFSET(1) + 0) 18 #define NPCM_CLOCK_FIU (NPCM_CLOCK_GROUP_OFFSET(1) + 2) 19 #define NPCM_CLOCK_USB20 (NPCM_CLOCK_GROUP_OFFSET(1) + 3) 20 #define NPCM_CLOCK_UART (NPCM_CLOCK_GROUP_OFFSET(1) + 4) 21 #define NPCM_CLOCK_MFT1 (NPCM_CLOCK_GROUP_OFFSET(1) + 5) 22 #define NPCM_CLOCK_MFT2 (NPCM_CLOCK_GROUP_OFFSET(1) + 6) 23 #define NPCM_CLOCK_MFT3 (NPCM_CLOCK_GROUP_OFFSET(1) + 7) [all …]
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/Zephyr-latest/drivers/sensor/st/lsm9ds0_mfd/ |
D | lsm9ds0_mfd.h | 1 /* sensor_lsm9ds0_mfd.h - header file for LSM9DS0 accelerometer, magnetometer 8 * SPDX-License-Identifier: Apache-2.0 26 #define LSM9DS0_MFD_MASK_STATUS_REG_M_YMOR BIT(5) 27 #define LSM9DS0_MFD_SHIFT_STATUS_REG_M_YMOR 5 34 #define LSM9DS0_MFD_MASK_STATUS_REG_M_YMDA BIT(1) 35 #define LSM9DS0_MFD_SHIFT_STATUS_REG_M_YMDA 1 54 #define LSM9DS0_MFD_MASK_INT_CTRL_REG_M_ZMIEN BIT(5) 55 #define LSM9DS0_MFD_SHIFT_INT_CTRL_REG_M_ZMIEN 5 62 #define LSM9DS0_MFD_MASK_INT_CTRL_REG_M_4D BIT(1) 63 #define LSM9DS0_MFD_SHIFT_INT_CTRL_REG_M_4D 1 [all …]
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/Zephyr-latest/samples/subsys/fs/zms/ |
D | README.rst | 1 .. zephyr:code-sample:: zms 3 :relevant-api: zms_high_level_api 14 #. A string representing an IP address: stored at id=1, data="192.168.1.1" 40 .. zephyr-app-commands:: 41 :zephyr-app: samples/subsys/fs/zms 51 .. code-block:: console 53 *** Booting Zephyr OS build v3.7.0-2383-g624f75400242 *** 58 Adding IP_ADDRESS 172.16.254.1 at id 1 65 ITERATION: 1 66 ID: 1, IP Address: 172.16.254.1 [all …]
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/Zephyr-latest/subsys/net/ip/ |
D | net_tc_mapping.h | 10 * SPDX-License-Identifier: Apache-2.0 19 * according to 802.1Q - table I-2. 22 * 1 (lowest) BK Background 27 * 5 VO Voice, < 10 ms latency and jitter 39 * implementations that do not support the credit-based shaper transmission 41 * Ref: 802.1Q - chapter 8.6.6 - table 8-4 44 #if NET_TC_TX_COUNT == 1 || NET_TC_RX_COUNT == 1 48 static const uint8_t priority2tc_strict_2[] = {0, 0, 0, 0, 1, 1, 1, 1}; 51 static const uint8_t priority2tc_strict_3[] = {0, 0, 0, 0, 1, 1, 2, 2}; 54 static const uint8_t priority2tc_strict_4[] = {0, 0, 1, 1, 2, 2, 3, 3}; [all …]
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/Zephyr-latest/samples/shields/x_nucleo_53l0a1/src/ |
D | display_7seg.h | 7 * SPDX-License-Identifier: Apache-2.0 15 * --- 16 * 1| |5 17 * -2- 19 * --- 25 #define CHAR_0 (BIT(0) | BIT(1) | BIT(3) | BIT(4) | BIT(5) | BIT(6)) 26 #define CHAR_1 (BIT(5) | BIT(6)) 27 #define CHAR_2 (BIT(0) | BIT(2) | BIT(3) | BIT(4) | BIT(5)) 28 #define CHAR_3 (BIT(2) | BIT(3) | BIT(4) | BIT(5) | BIT(6)) 29 #define CHAR_4 (BIT(1) | BIT(2) | BIT(5) | BIT(6)) [all …]
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/Zephyr-latest/include/zephyr/dt-bindings/pinctrl/renesas/ |
D | pinctrl-r8a77951.h | 4 * SPDX-License-Identifier: Apache-2.0 9 #include "pinctrl-rcar-common.h" 12 #define PIN_NONE -1 14 #define PIN_D1 RCAR_GP_PIN(0, 1) 18 #define PIN_D5 RCAR_GP_PIN(0, 5) 29 #define PIN_A0 RCAR_GP_PIN(1, 0) 30 #define PIN_A1 RCAR_GP_PIN(1, 1) 31 #define PIN_A2 RCAR_GP_PIN(1, 2) 32 #define PIN_A3 RCAR_GP_PIN(1, 3) 33 #define PIN_A4 RCAR_GP_PIN(1, 4) [all …]
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D | pinctrl-r8a77961.h | 3 * Copyright (c) 2023-2024 EPAM Systems 5 * SPDX-License-Identifier: Apache-2.0 10 #include "pinctrl-rcar-common.h" 13 #define PIN_NONE -1 15 #define PIN_D1 RCAR_GP_PIN(0, 1) 19 #define PIN_D5 RCAR_GP_PIN(0, 5) 30 #define PIN_A0 RCAR_GP_PIN(1, 0) 31 #define PIN_A1 RCAR_GP_PIN(1, 1) 32 #define PIN_A2 RCAR_GP_PIN(1, 2) 33 #define PIN_A3 RCAR_GP_PIN(1, 3) [all …]
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/Zephyr-latest/dts/bindings/clock/ |
D | nuvoton,npcx-pcc.yaml | 2 # SPDX-License-Identifier: Apache-2.0 8 High-Frequency Clock Generator (HFCG), is the source clock of Cortex-M4 core 14 clock-frequency = <DT_FREQ_M(100)>; /* OFMCLK runs at 100MHz */ 15 core-prescaler = <5>; /* CORE_CLK runs at 20MHz */ 16 apb1-prescaler = <5>; /* APB1_CLK runs at 20MHz */ 17 apb2-prescaler = <5>; /* APB2_CLK runs at 20MHz */ 18 apb3-prescaler = <5>; /* APB3_CLK runs at 20MHz */ 21 compatible: "nuvoton,npcx-pcc" 23 include: [clock-controller.yaml, base.yaml] 29 clock-frequency: [all …]
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/Zephyr-latest/dts/bindings/interrupt-controller/ |
D | st,stm32-exti.yaml | 3 compatible: "st,stm32-exti" 5 include: [base.yaml, interrupt-controller.yaml] 14 interrupt-names: 17 num-lines: 22 line-ranges: 31 line-ranges = <0 1>, <1 1>, <2 1>, <3 1>, 32 <4 1>, <5 5>, <10 6>; 33 Above property provides event-range for 7 lines. 34 5 first lines contain one element 35 6th line starts with input line 5 and contains 5 elements (5 to 9)
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/Zephyr-latest/drivers/sensor/st/lps22hb/ |
D | lps22hb.h | 1 /* sensor_lps25hb.h - header file for LPS22HB pressure and temperature 8 * SPDX-License-Identifier: Apache-2.0 26 #define LPS22HB_MASK_INTERRUPT_CFG_AUTOZERO BIT(5) 27 #define LPS22HB_SHIFT_INTERRUPT_CFG_AUTOZERO 5 34 #define LPS22HB_MASK_INTERRUPT_CFG_PL_E BIT(1) 35 #define LPS22HB_SHIFT_INTERRUPT_CFG_PL_E 1 43 #define LPS22HB_MASK_CTRL_REG1_ODR (BIT(6) | BIT(5) | BIT(4)) 49 #define LPS22HB_MASK_CTRL_REG1_BDU BIT(1) 50 #define LPS22HB_SHIFT_CTRL_REG1_BDU 1 59 #define LPS22HB_MASK_CTRL_REG2_STOP_ON_FTH BIT(5) [all …]
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/Zephyr-latest/doc/kernel/services/smp/ |
D | smpinit.svg | 1 <?xml version="1.0" encoding="UTF-8" standalone="no"?> 2 <!-- Created with Inkscape (http://www.inkscape.org/) --> 7 xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" 10 xmlns:sodipodi="http://sodipodi.sourceforge.net/DTD/sodipodi-0.dtd" 30 transform="matrix(-0.4,0,0,-0.4,-4,0)" 31 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro… 32 d="M 0,0 5,-5 -12.5,0 5,5 Z" 34 inkscape:connector-curvature="0" /> 46 …style="fill:#000000;fill-opacity:1;fill-rule:evenodd;stroke:#000000;stroke-width:1.00000003pt;stro… 47 d="M 0,0 5,-5 -12.5,0 5,5 Z" [all …]
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/Zephyr-latest/drivers/sensor/st/lsm6ds0/ |
D | lsm6ds0.h | 1 /* sensor_lsm6ds0.h - header file for LSM6DS0 accelerometer, gyroscope and 8 * SPDX-License-Identifier: Apache-2.0 21 #define LSM6DS0_MASK_ACT_THS_ACT_THS (BIT(6) | BIT(5) | BIT(4) | \ 22 BIT(3) | BIT(2) | BIT(1) | \ 33 #define LSM6DS0_MASK_INT_GEN_CFG_XL_ZHIE_XL BIT(5) 34 #define LSM6DS0_SHIFT_INT_GEN_CFG_XL_ZHIE_XL 5 41 #define LSM6DS0_MASK_INT_GEN_CFG_XL_XHIE_XL BIT(1) 42 #define LSM6DS0_SHIFT_INT_GEN_CFG_XL_XHIE_XL 1 57 #define LSM6DS0_MASK_INT_CTRL_INT_FSS5 BIT(5) 58 #define LSM6DS0_SHIFT_INT_CTRL_INT_FSS5 5 [all …]
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/Zephyr-latest/drivers/sensor/st/lsm6dsl/ |
D | lsm6dsl.h | 1 /* sensor_lsm6dsl.h - header file for LSM6DSL accelerometer, gyroscope and 8 * SPDX-License-Identifier: Apache-2.0 31 #define LSM6DSL_MASK_FUNC_CFG_EN_B BIT(5) 32 #define LSM6DSL_SHIFT_FUNC_CFG_EN_B 5 36 BIT(1) | BIT(0)) 40 #define LSM6DSL_MASK_SENSOR_SYNC_RES_RATIO (BIT(1) | BIT(0)) 45 BIT(5) | BIT(4) | \ 47 BIT(1) | BIT(0)) 57 #define LSM6DSL_MASK_FIFO_CTRL2_FTH (BIT(2) | BIT(1) | \ 62 #define LSM6DSL_MASK_FIFO_CTRL3_DEC_FIFO_GYRO (BIT(5) | BIT(4) | \ [all …]
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/Zephyr-latest/tests/net/lib/lwm2m/content_raw_cbor/src/ |
D | main.c | 4 * SPDX-License-Identifier: Apache-2.0 69 memcpy(test_payload + 1, payload, len); in test_payload_set() 70 test_packet.offset = len + 1; in test_payload_set() 71 test_in.offset = 1; /* Payload marker */ in test_payload_set() 79 int8_t value[] = { 1, -1, INT8_MAX, INT8_MIN }; in ZTEST() 83 (0x00 << 5) | 0x01 in ZTEST() 85 .len = 1 in ZTEST() 89 (0x01 << 5) | 0x00 in ZTEST() 91 .len = 1 in ZTEST() 95 (0x00 << 5) | 0x18, in ZTEST() [all …]
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