1 /* 2 * Copyright (c) 2024 Nuvoton Technology Corporation. 3 * 4 * SPDX-License-Identifier: Apache-2.0 5 */ 6 #ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCM_CLOCK_H_ 7 #define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCM_CLOCK_H_ 8 9 /* clock bus references */ 10 #define NPCM_CLOCK_GROUP_OFFSET(N) ((N) << 3) 11 12 #define NPCM_CLOCK_PWM_I (NPCM_CLOCK_GROUP_OFFSET(0) + 0) 13 #define NPCM_CLOCK_PWM_J (NPCM_CLOCK_GROUP_OFFSET(0) + 1) 14 #define NPCM_CLOCK_I3CI (NPCM_CLOCK_GROUP_OFFSET(0) + 2) 15 #define NPCM_CLOCK_UART3 (NPCM_CLOCK_GROUP_OFFSET(0) + 5) 16 #define NPCM_CLOCK_UART2 (NPCM_CLOCK_GROUP_OFFSET(0) + 6) 17 #define NPCM_CLOCK_SPIM (NPCM_CLOCK_GROUP_OFFSET(1) + 0) 18 #define NPCM_CLOCK_FIU (NPCM_CLOCK_GROUP_OFFSET(1) + 2) 19 #define NPCM_CLOCK_USB20 (NPCM_CLOCK_GROUP_OFFSET(1) + 3) 20 #define NPCM_CLOCK_UART (NPCM_CLOCK_GROUP_OFFSET(1) + 4) 21 #define NPCM_CLOCK_MFT1 (NPCM_CLOCK_GROUP_OFFSET(1) + 5) 22 #define NPCM_CLOCK_MFT2 (NPCM_CLOCK_GROUP_OFFSET(1) + 6) 23 #define NPCM_CLOCK_MFT3 (NPCM_CLOCK_GROUP_OFFSET(1) + 7) 24 #define NPCM_CLOCK_PWM_A (NPCM_CLOCK_GROUP_OFFSET(2) + 0) 25 #define NPCM_CLOCK_PWM_B (NPCM_CLOCK_GROUP_OFFSET(2) + 1) 26 #define NPCM_CLOCK_PWM_C (NPCM_CLOCK_GROUP_OFFSET(2) + 2) 27 #define NPCM_CLOCK_PWM_D (NPCM_CLOCK_GROUP_OFFSET(2) + 3) 28 #define NPCM_CLOCK_PWM_E (NPCM_CLOCK_GROUP_OFFSET(2) + 4) 29 #define NPCM_CLOCK_PWM_F (NPCM_CLOCK_GROUP_OFFSET(2) + 5) 30 #define NPCM_CLOCK_PWM_G (NPCM_CLOCK_GROUP_OFFSET(2) + 6) 31 #define NPCM_CLOCK_PWM_H (NPCM_CLOCK_GROUP_OFFSET(2) + 7) 32 #define NPCM_CLOCK_SMB1 (NPCM_CLOCK_GROUP_OFFSET(3) + 0) 33 #define NPCM_CLOCK_SMB2 (NPCM_CLOCK_GROUP_OFFSET(3) + 1) 34 #define NPCM_CLOCK_SMB3 (NPCM_CLOCK_GROUP_OFFSET(3) + 2) 35 #define NPCM_CLOCK_SMB4 (NPCM_CLOCK_GROUP_OFFSET(3) + 3) 36 #define NPCM_CLOCK_SMB5 (NPCM_CLOCK_GROUP_OFFSET(3) + 4) 37 #define NPCM_CLOCK_SMB6 (NPCM_CLOCK_GROUP_OFFSET(3) + 5) 38 #define NPCM_CLOCK_GDMA (NPCM_CLOCK_GROUP_OFFSET(3) + 7) 39 #define NPCM_CLOCK_ITIM1 (NPCM_CLOCK_GROUP_OFFSET(4) + 0) 40 #define NPCM_CLOCK_ITIM2 (NPCM_CLOCK_GROUP_OFFSET(4) + 1) 41 #define NPCM_CLOCK_ITIM3 (NPCM_CLOCK_GROUP_OFFSET(4) + 2) 42 #define NPCM_CLOCK_SMB_DMA (NPCM_CLOCK_GROUP_OFFSET(4) + 3) 43 #define NPCM_CLOCK_ADC (NPCM_CLOCK_GROUP_OFFSET(4) + 4) 44 #define NPCM_CLOCK_PECI (NPCM_CLOCK_GROUP_OFFSET(4) + 5) 45 #define NPCM_CLOCK_SPIP1 (NPCM_CLOCK_GROUP_OFFSET(4) + 7) 46 #define NPCM_CLOCK_UART4 (NPCM_CLOCK_GROUP_OFFSET(5) + 0) 47 #define NPCM_CLOCK_C2HACC (NPCM_CLOCK_GROUP_OFFSET(5) + 3) 48 #define NPCM_CLOCK_SHM_REG (NPCM_CLOCK_GROUP_OFFSET(5) + 4) 49 #define NPCM_CLOCK_SHM (NPCM_CLOCK_GROUP_OFFSET(5) + 5) 50 #define NPCM_CLOCK_DP80 (NPCM_CLOCK_GROUP_OFFSET(5) + 6) 51 #define NPCM_CLOCK_MSWC (NPCM_CLOCK_GROUP_OFFSET(5) + 7) 52 #define NPCM_CLOCK_ITIM4 (NPCM_CLOCK_GROUP_OFFSET(6) + 0) 53 #define NPCM_CLOCK_ITIM5 (NPCM_CLOCK_GROUP_OFFSET(6) + 1) 54 #define NPCM_CLOCK_ITIM6 (NPCM_CLOCK_GROUP_OFFSET(6) + 2) 55 #define NPCM_CLOCK_RNG (NPCM_CLOCK_GROUP_OFFSET(6) + 3) 56 #define NPCM_CLOCK_SHA (NPCM_CLOCK_GROUP_OFFSET(6) + 5) 57 #define NPCM_CLOCK_ESPI (NPCM_CLOCK_GROUP_OFFSET(6) + 7) 58 #define NPCM_CLOCK_SMB7 (NPCM_CLOCK_GROUP_OFFSET(7) + 0) 59 #define NPCM_CLOCK_SMB8 (NPCM_CLOCK_GROUP_OFFSET(7) + 1) 60 #define NPCM_CLOCK_SMB9 (NPCM_CLOCK_GROUP_OFFSET(7) + 2) 61 #define NPCM_CLOCK_SMB10 (NPCM_CLOCK_GROUP_OFFSET(7) + 3) 62 #define NPCM_CLOCK_SMB11 (NPCM_CLOCK_GROUP_OFFSET(7) + 4) 63 #define NPCM_CLOCK_SMB12 (NPCM_CLOCK_GROUP_OFFSET(7) + 5) 64 #define NPCM_CLOCK_SIOX2 (NPCM_CLOCK_GROUP_OFFSET(7) + 6) 65 #define NPCM_CLOCK_SIOX1 (NPCM_CLOCK_GROUP_OFFSET(7) + 7) 66 #define NPCM_CLOCK_I3CI2 (NPCM_CLOCK_GROUP_OFFSET(8) + 0) 67 #define NPCM_CLOCK_I3CI3 (NPCM_CLOCK_GROUP_OFFSET(8) + 1) 68 #define NPCM_CLOCK_I3CI4 (NPCM_CLOCK_GROUP_OFFSET(8) + 2) 69 #define NPCM_CLOCK_I3CI5 (NPCM_CLOCK_GROUP_OFFSET(8) + 3) 70 #define NPCM_CLOCK_I3CI6 (NPCM_CLOCK_GROUP_OFFSET(8) + 4) 71 72 #endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NPCM_CLOCK_H_ */ 73
