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Searched defs:reg_base (Results 1 – 25 of 32) sorted by relevance

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/Zephyr-latest/drivers/i2c/
Di2c_dw.c60 uint32_t reg_base = get_regs(dev); in i2c_dw_enable_idma() local
91 uint32_t reg_base = get_regs(dev); in i2c_dw_set_fifo_th() local
207 uint32_t reg_base = get_regs(dev); in i2c_dw_data_ask() local
267 uint32_t reg_base = get_regs(dev); in i2c_dw_data_read() local
299 uint32_t reg_base = get_regs(dev); in i2c_dw_data_send() local
345 uint32_t reg_base = get_regs(dev); in i2c_dw_transfer_complete() local
365 uint32_t reg_base = get_regs(port); in i2c_dw_isr() local
496 uint32_t reg_base = get_regs(dev); in i2c_dw_setup() local
625 uint32_t reg_base = get_regs(dev); in i2c_dw_transfer() local
745 uint32_t reg_base = get_regs(dev); in i2c_dw_runtime_configure() local
[all …]
/Zephyr-latest/drivers/serial/
Duart_xlnx_ps.c182 static void xlnx_ps_disable_uart(uintptr_t reg_base) in xlnx_ps_disable_uart()
206 static void xlnx_ps_enable_uart(uintptr_t reg_base) in xlnx_ps_enable_uart()
235 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in set_baudrate() local
312 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_init() local
370 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_poll_in() local
397 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_poll_out() local
414 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_err_check() local
658 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_configure() local
857 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_config_get() local
891 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in uart_xlnx_ps_fifo_fill() local
[all …]
/Zephyr-latest/drivers/counter/
Dcounter_dw_timer.c87 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_irq_handler() local
117 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, timer_mmio); in counter_dw_timer_start() local
134 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, timer_mmio); in counter_dw_timer_disable() local
144 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_get_top_value() local
154 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_get_value() local
165 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_set_top_value() local
219 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_set_alarm() local
271 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(timer_dev, timer_mmio); in counter_dw_timer_cancel_alarm() local
/Zephyr-latest/drivers/watchdog/
Dwdt_dw.c58 uintptr_t reg_base = DEVICE_MMIO_GET(dev); in dw_wdt_setup() local
78 uintptr_t reg_base = DEVICE_MMIO_GET(dev); local
108 uintptr_t reg_base = DEVICE_MMIO_GET(dev); local
163 uintptr_t reg_base = DEVICE_MMIO_GET(dev); local
216 uintptr_t reg_base = DEVICE_MMIO_GET(dev); local
Dwdt_opentitan.c90 volatile uintptr_t reg_base = dev_cfg->regs; in ot_aontimer_install_timeout() local
/Zephyr-latest/drivers/gpio/
Dgpio_altera_pio.c24 uintptr_t reg_base; member
44 uintptr_t reg_base = cfg->reg_base; in gpio_pin_direction() local
75 uintptr_t reg_base = cfg->reg_base; in gpio_altera_configure() local
109 uintptr_t reg_base = cfg->reg_base; in gpio_altera_port_get_raw() local
129 uintptr_t reg_base = cfg->reg_base; in gpio_altera_port_set_bits_raw() local
162 uintptr_t reg_base = cfg->reg_base; in gpio_altera_port_clear_bits_raw() local
209 uintptr_t reg_base = cfg->reg_base; in gpio_altera_pin_interrupt_configure() local
262 uintptr_t reg_base = cfg->reg_base; in gpio_altera_irq_handler() local
Dgpio_rts5912.c27 volatile uint32_t *reg_base; member
304 static gpio_pin_t gpio_rts5912_get_intr_pin(volatile uint32_t *reg_base) in gpio_rts5912_get_intr_pin()
Dgpio_ite_it8xxx2_v2.c387 volatile uint8_t *reg_base = in gpio_ite_isr() local
458 volatile uint8_t *reg_base = (uint8_t *)gpio_config->wuc_base[pin]; local
/Zephyr-latest/drivers/spi/
Dspi_npcx_spip.c34 struct spip_reg *reg_base; member
48 struct spip_reg *const reg_base = config->reg_base; in spi_npcx_spip_configure() local
178 struct spip_reg *const reg_base = config->reg_base; in spi_npcx_spip_xfer_frame() local
215 struct spip_reg *const reg_base = config->reg_base; in spi_npcx_spip_isr() local
258 struct spip_reg *const reg_base = config->reg_base; in transceive() local
361 struct spip_reg *const reg_base = config->reg_base; in spi_npcx_spip_init() local
/Zephyr-latest/soc/intel/alder_lake/
Dsoc_gpio.h29 #define GPIO_REG_BASE(reg_base) \ argument
32 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-latest/soc/intel/elkhart_lake/
Dsoc_gpio.h29 #define GPIO_REG_BASE(reg_base) \ argument
32 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-latest/soc/intel/raptor_lake/
Dsoc_gpio.h36 #define GPIO_REG_BASE(reg_base) \ argument
39 #define GPIO_PAD_BASE(reg_base) \ argument
/Zephyr-latest/include/zephyr/drivers/gpio/
Dgpio_intel.h21 uintptr_t reg_base; member
/Zephyr-latest/soc/intel/common/
Dsoc_gpio.h8 uintptr_t reg_base; member
Dsoc_gpio.c50 struct acpi_reg_base reg_base[CONFIG_ACPI_MMIO_ENTRIES_MAX]; in soc_acpi_gpio_resource_get() local
/Zephyr-latest/drivers/reset/
Dreset_npcx.c33 struct swrst_reg *reg_base; member
/Zephyr-latest/drivers/peci/
Dpeci_ite_it8xxx2.c118 static void peci_it8xxx2_init_vtts(struct peci_it8xxx2_regs *reg_base, in peci_it8xxx2_init_vtts()
124 static void peci_it8xxx2_rst_status(struct peci_it8xxx2_regs *reg_base) in peci_it8xxx2_rst_status()
129 static int peci_it8xxx2_check_host_busy(struct peci_it8xxx2_regs *reg_base) in peci_it8xxx2_check_host_busy()
/Zephyr-latest/tests/lib/acpi/integration/src/
Dmain.c53 struct acpi_reg_base reg_base[CONFIG_ACPI_MMIO_ENTRIES_MAX]; in ZTEST() local
/Zephyr-latest/drivers/dma/
Ddma_dw_axi.c266 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_get_ch_status() local
292 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_isr() local
643 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_start() local
705 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_stop() local
754 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_resume() local
785 uintptr_t reg_base = DEVICE_MMIO_NAMED_GET(dev, dma_mmio); in dma_dw_axi_suspend() local
Ddma_pl330.c262 uint32_t reg_base, int ch, int secure) in dma_pl330_start_dma_ch()
300 static int dma_pl330_wait(uint32_t reg_base, int ch) in dma_pl330_wait()
Ddma_pl330.h163 mem_addr_t reg_base; member
/Zephyr-latest/drivers/clock_control/
Dclock_control_rts5912_sccon.c23 uint32_t reg_base; member
/Zephyr-latest/lib/acpi/
Dacpi_shell.c283 struct acpi_reg_base reg_base[CONFIG_ACPI_MMIO_ENTRIES_MAX]; in get_acpi_dev_resource() local
/Zephyr-latest/drivers/pinctrl/renesas/rcar/
Dpfc_rcar.c33 static uintptr_t reg_base[] = { variable
/Zephyr-latest/include/zephyr/acpi/
Dacpi.h80 struct acpi_reg_base *reg_base; member

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