| /Linux-v5.15/Documentation/devicetree/bindings/display/ |
| D | truly,nt35597.txt | 1 Truly model NT35597 DSI display driver
7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
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| /Linux-v5.15/drivers/gpu/drm/bridge/ |
| D | ti-sn65dsi83.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
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| D | tc358775.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * TC358775 DSI to LVDS bridge driver
35 /* DSI D-PHY Layer Registers */
48 #define DFTMODE_CNTRL 0x0054 /* DFT Mode Control */
50 /* DSI PPI Layer Registers */
51 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
58 #define PPI_TX_RX_TA 0x013C /* DSI Bus Turn Around timing parameters */
89 #define PPI_CLRSIPO 0x01E4 /* Clear SIPO values, Slave mode use only. */
92 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
97 #define DSI_LANESTATUS0 0x0214 /* Displays lane is in HS RX mode. */
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| D | tc358762.c | 1 // SPDX-License-Identifier: GPL-2.0
38 /* DSI layer registers */
39 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
56 /* Lane enable PPI and DSI register bits */
73 int ret = ctx->error; in tc358762_clear_error()
75 ctx->error = 0; in tc358762_clear_error()
81 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in tc358762_write() local
85 if (ctx->error) in tc358762_write()
95 ret = mipi_dsi_generic_write(dsi, data, sizeof(data)); in tc358762_write()
97 ctx->error = ret; in tc358762_write()
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| /Linux-v5.15/Documentation/devicetree/bindings/display/panel/ |
| D | sharp,lq101r1sx01.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <treding@nvidia.com>
13 This panel requires a dual-channel DSI host to operate. It supports two modes:
14 - left-right: each channel drives the left or right half of the screen
15 - even-odd: each channel drives the even or odd lines of the screen
17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
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| /Linux-v5.15/drivers/gpu/drm/msm/dsi/ |
| D | dsi_manager.c | 1 // SPDX-License-Identifier: GPL-2.0-only
7 #include "dsi.h"
22 struct msm_dsi *dsi[DSI_MAX]; member
37 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi()
42 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi()
49 /* We assume 2 dsi nodes have the same information of bonded dsi and in dsi_mgr_parse_of()
50 * sync-mode, and only one node specifies master in case of bonded mode. in dsi_mgr_parse_of()
52 if (!msm_dsim->is_bonded_dsi) in dsi_mgr_parse_of()
53 msm_dsim->is_bonded_dsi = of_property_read_bool(np, "qcom,dual-dsi-mode"); in dsi_mgr_parse_of()
55 if (msm_dsim->is_bonded_dsi) { in dsi_mgr_parse_of()
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| /Linux-v5.15/drivers/gpu/drm/panel/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
37 NT35596 1080x1920 video mode panel as found in some Asus
47 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
48 24 bit RGB per pixel. It provides a MIPI DSI interface to
49 the host and has a built-in LED backlight.
58 45NA WUXGA PANEL DSI Video Mode panel
61 tristate "Generic DSI command mode panels"
66 DRM panel driver for DSI command mode panels with support for
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| D | panel-truly-nt35597.c | 1 // SPDX-License-Identifier: GPL-2.0
64 struct mipi_dsi_device *dsi[2]; member
219 /* CMD mode(10) VDO mode(03) */
230 for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { in truly_dcs_write()
231 ret = mipi_dsi_dcs_write(ctx->dsi[i], command, NULL, 0); in truly_dcs_write()
233 dev_err(ctx->dev, "cmd 0x%x failed for dsi = %d\n", command, i); in truly_dcs_write()
247 for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { in truly_dcs_write_buf()
248 ret = mipi_dsi_dcs_write_buffer(ctx->dsi[i], buf, size); in truly_dcs_write_buf()
250 dev_err(ctx->dev, "failed to tx cmd [%d], err: %d\n", i, ret); in truly_dcs_write_buf()
262 for (i = 0; i < ARRAY_SIZE(ctx->supplies); i++) { in truly_35597_power_on()
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| /Linux-v5.15/drivers/gpu/drm/i915/display/ |
| D | intel_dsi_vbt.c | 34 #include <asm/intel-mid.h>
112 /* ICL DSI Display GPIO Pins */
132 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); in mipi_exec_send_packet()
138 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet()
148 /* For DSI single link on Port A & C, the seq_port value which is in mipi_exec_send_packet()
150 * Now, read/write of packets for the DSI single link on Port A and in mipi_exec_send_packet()
153 if (intel_dsi->ports == (1 << PORT_C)) in mipi_exec_send_packet()
158 dsi_device = intel_dsi->dsi_hosts[port]->device; in mipi_exec_send_packet()
160 drm_dbg_kms(&dev_priv->drm, "no dsi device for port %c\n", in mipi_exec_send_packet()
166 dsi_device->mode_flags &= ~MIPI_DSI_MODE_LPM; in mipi_exec_send_packet()
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| D | intel_dsi.h | 35 /* Dual Link support */
54 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
56 u16 ports; /* VLV DSI */
57 u16 phys; /* ICL DSI */
60 /* if true, use HS mode, otherwise LP */
66 /* Video mode or command mode */
69 /* number of DSI lanes */
76 * video mode pixel format
82 /* video mode format for MIPI_VIDEO_MODE_FORMAT register */
151 return container_of(&encoder->base, struct intel_dsi, base.base); in enc_to_intel_dsi()
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| D | icl_dsi.c | 62 drm_err(&dev_priv->drm, "DSI header credits not released\n"); in wait_for_header_credits()
70 drm_err(&dev_priv->drm, "DSI payload credits not released\n"); in wait_for_payload_credits()
83 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in wait_for_cmds_dispatched_to_panel()
85 struct mipi_dsi_device *dsi; in wait_for_cmds_dispatched_to_panel() local
91 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
98 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
99 dsi = intel_dsi->dsi_hosts[port]->device; in wait_for_cmds_dispatched_to_panel()
100 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in wait_for_cmds_dispatched_to_panel()
101 dsi->channel = 0; in wait_for_cmds_dispatched_to_panel()
102 ret = mipi_dsi_dcs_nop(dsi); in wait_for_cmds_dispatched_to_panel()
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| D | vlv_dsi.c | 81 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty()
82 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty()
91 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
103 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
119 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
128 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer()
130 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
144 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
160 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
167 if (msg->rx_len) { in intel_dsi_host_transfer()
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| /Linux-v5.15/drivers/gpu/drm/rockchip/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
18 This driver provides kernel mode setting and buffer
50 bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
54 for the Synopsys DesignWare dsi driver. If you want to
55 enable MIPI DSI on RK3288 or RK3399 based SoC, you should
72 support LVDS, rgb, dual LVDS output mode. say Y to enable its
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| D | dw-mipi-dsi-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Chris Zhong <zyw@rock-chips.com>
6 * Nickey Yang <nickey.yang@rock-chips.com>
41 #define N_LANES(n) ((((n) - 1) & 0x3) << 0)
93 #define INPUT_DIVIDER(val) (((val) - 1) & 0x7f)
96 #define LOOP_DIV_LOW_SEL(val) (((val) - 1) & 0x1f)
97 #define LOOP_DIV_HIGH_SEL(val) ((((val) - 1) >> 5) & 0xf)
249 /* dual-channel */
331 return -EINVAL; in max_mbps_to_parameter()
334 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
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| /Linux-v5.15/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-mipi-dsi.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
193 #define N_LANES(n) (((n) - 1) & 0x3)
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
266 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
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| /Linux-v5.15/Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI controller
10 - Krishna Manikandan <mkrishn@codeaurora.org>
13 - $ref: "../dsi-controller.yaml#"
18 - const: qcom,mdss-dsi-ctrl
23 reg-names:
31 - description: Display byte clock
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| /Linux-v5.15/arch/arm/boot/dts/ |
| D | stm32f469-disco.dts | 2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
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| /Linux-v5.15/Documentation/arm/stm32/ |
| D | stm32f769-overview.rst | 6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
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| /Linux-v5.15/drivers/gpu/drm/tegra/ |
| D | dsi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "dsi.h"
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
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| /Linux-v5.15/arch/arm64/boot/dts/qcom/ |
| D | sdm845-mtp.dts | 1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
16 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
23 stdout-path = "serial0:115200n8";
26 vph_pwr: vph-pwr-regulator {
27 compatible = "regulator-fixed";
28 regulator-name = "vph_pwr";
29 regulator-min-microvolt = <3700000>;
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| D | qrb5165-rb5.dts | 1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/sound/qcom,q6afe.h>
10 #include <dt-bindings/sound/qcom,q6asm.h>
18 compatible = "qcom,qrb5165-rb5", "qcom,sm8250";
26 stdout-path = "serial0:115200n8";
31 compatible = "fixed-clock";
32 #clock-cells = <0>;
33 clock-frequency = <40000000>;
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| /Linux-v5.15/Documentation/gpu/ |
| D | drm-kms-helpers.rst | 2 Mode Setting Helper Functions
27 for handling panel-related information and logic. Plus then a big set of
28 helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally
39 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
42 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
51 --------
53 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
57 ---------------------------------------
59 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
63 --------------------------
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| /Linux-v5.15/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_ctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
10 * CTL - MDP Control Pool Manager
16 * a specific data path ID - REG_MDP5_CTL_*(<id>, ...)
20 * In certain use cases (high-resolution dual pipe), one single CTL can be
62 /* to filter out non-present bits in the current hardware config */
77 struct msm_drm_private *priv = ctl_mgr->dev->dev_private; in get_kms()
79 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms()
85 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_write()
87 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_write()
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| /Linux-v5.15/arch/arm64/boot/dts/hisilicon/ |
| D | hi3660-hikey960.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
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| /Linux-v5.15/drivers/gpu/drm/ |
| D | drm_connector.c | 45 * Hence they are reference-counted using drm_connector_get() and
61 * For connectors which are not fixed (like built-in panels) the driver needs to
80 { DRM_MODE_CONNECTOR_DVII, "DVI-I" },
81 { DRM_MODE_CONNECTOR_DVID, "DVI-D" },
82 { DRM_MODE_CONNECTOR_DVIA, "DVI-A" },
89 { DRM_MODE_CONNECTOR_HDMIA, "HDMI-A" },
90 { DRM_MODE_CONNECTOR_HDMIB, "HDMI-B" },
94 { DRM_MODE_CONNECTOR_DSI, "DSI" },
118 * drm_get_connector_type_name - return a string for connector type
133 * drm_connector_get_cmdline_mode - reads the user's cmdline mode
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