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/Linux-v5.10/Documentation/userspace-api/media/v4l/
Dpipeline.dot6 …scaler [label="{<scaler_0> 0} | Host\nScaler | {<scaler_1> 1} ", shape=Mrecord, style=filled, fill…
7 …frontend [label="{<frontend_0> 0} | Host\nFrontend | {<frontend_1> 1}", shape=Mrecord, style=fille…
8 sensor [label="Sensor | {<sensor_0> 0}", shape=Mrecord, style=filled, fillcolor=aquamarine]
9 io [label="{<io_0> 0} | V4L I/O", shape=Mrecord, style=filled, fillcolor=aquamarine]
13 scaler:scaler_1 -> io:io_0 [color=blue, label="HQ: 1280x720\nHS: 1280x720"]
/Linux-v5.10/drivers/gpu/drm/
Ddrm_edid.c63 #define EDID_QUIRK_PREFER_LARGE_60 (1 << 0)
97 #define LEVEL_DMT 0
110 { "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
112 /* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
113 { "AEO", 0, EDID_QUIRK_FORCE_6BPC },
116 { "BOE", 0x78b, EDID_QUIRK_FORCE_6BPC },
119 { "CPT", 0x17df, EDID_QUIRK_FORCE_6BPC },
122 { "SDC", 0x3652, EDID_QUIRK_FORCE_6BPC },
124 /* BOE model 0x0771 reports 8 bpc, but is a 6 bpc panel */
125 { "BOE", 0x0771, EDID_QUIRK_FORCE_6BPC },
[all …]
/Linux-v5.10/arch/sh/kernel/cpu/sh4/
Dsetup-sh4-202.c23 DEFINE_RES_MEM(0xffe80000, 0x100),
24 DEFINE_RES_IRQ(evt2irq(0x700)),
25 DEFINE_RES_IRQ(evt2irq(0x720)),
26 DEFINE_RES_IRQ(evt2irq(0x760)),
27 DEFINE_RES_IRQ(evt2irq(0x740)),
32 .id = 0,
45 DEFINE_RES_MEM(0xffd80000, 0x30),
46 DEFINE_RES_IRQ(evt2irq(0x400)),
47 DEFINE_RES_IRQ(evt2irq(0x420)),
48 DEFINE_RES_IRQ(evt2irq(0x440)),
[all …]
Dsetup-sh7750.c19 [0] = {
20 .start = 0xffc80000,
21 .end = 0xffc80000 + 0x58 - 1,
26 .start = evt2irq(0x480),
43 DEFINE_RES_MEM(0xffe00000, 0x20),
44 DEFINE_RES_IRQ(evt2irq(0x4e0)),
49 .id = 0,
63 DEFINE_RES_MEM(0xffe80000, 0x100),
64 DEFINE_RES_IRQ(evt2irq(0x700)),
82 DEFINE_RES_MEM(0xffd80000, 0x30),
[all …]
/Linux-v5.10/include/dt-bindings/clock/
Dam4.h8 #define AM4_CLKCTRL_OFFSET 0x20
14 #define AM4_ADC_TSC_CLKCTRL AM4_CLKCTRL_INDEX(0x120)
15 #define AM4_L4_WKUP_CLKCTRL AM4_CLKCTRL_INDEX(0x220)
16 #define AM4_WKUP_M3_CLKCTRL AM4_CLKCTRL_INDEX(0x228)
17 #define AM4_COUNTER_32K_CLKCTRL AM4_CLKCTRL_INDEX(0x230)
18 #define AM4_TIMER1_CLKCTRL AM4_CLKCTRL_INDEX(0x328)
19 #define AM4_WD_TIMER2_CLKCTRL AM4_CLKCTRL_INDEX(0x338)
20 #define AM4_I2C1_CLKCTRL AM4_CLKCTRL_INDEX(0x340)
21 #define AM4_UART1_CLKCTRL AM4_CLKCTRL_INDEX(0x348)
22 #define AM4_SMARTREFLEX0_CLKCTRL AM4_CLKCTRL_INDEX(0x350)
[all …]
/Linux-v5.10/arch/arm/include/asm/hardware/
Dcache-aurora-l2.h17 #define AURORA_SYNC_REG 0x700
18 #define AURORA_RANGE_BASE_ADDR_REG 0x720
19 #define AURORA_FLUSH_PHY_ADDR_REG 0x7f0
20 #define AURORA_INVAL_RANGE_REG 0x774
21 #define AURORA_CLEAN_RANGE_REG 0x7b4
22 #define AURORA_FLUSH_RANGE_REG 0x7f4
26 (0x3 << AURORA_ACR_REPLACEMENT_OFFSET)
28 (0 << AURORA_ACR_REPLACEMENT_OFFSET)
37 #define AURORA_ACR_FORCE_WRITE_POLICY_OFFSET 0
39 (0x3 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET)
[all …]
/Linux-v5.10/Documentation/fb/
Dviafb.modes256 # 0 chars 7 lines
268 timings 14667 216 0 14 7 64 4 hsync high vsync high endmode
487 # 0 chars 0 lines
499 timings 8825 280 0 16 0 88 8 endmode mode "1152x720-60"
524 hsync high vsync high endmode mode "1200x720-60"
530 timings 16260 184 28 18 1 128 3 endmode mode "1280x720-50"
779 # 1280x720, 60 Hz, Non-Interlaced (74.481 MHz dotclock)
796 mode "1280x720-60"
/Linux-v5.10/drivers/phy/samsung/
Dphy-exynos7-ufs.h12 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL 0x720
13 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_MASK 0x1
14 #define EXYNOS7_EMBEDDED_COMBO_PHY_CTRL_EN BIT(0)
18 PHY_COMN_REG_CFG(0x00f, 0xfa, PWR_MODE_ANY),
19 PHY_COMN_REG_CFG(0x010, 0x82, PWR_MODE_ANY),
20 PHY_COMN_REG_CFG(0x011, 0x1e, PWR_MODE_ANY),
21 PHY_COMN_REG_CFG(0x017, 0x84, PWR_MODE_ANY),
22 PHY_TRSV_REG_CFG(0x035, 0x58, PWR_MODE_ANY),
23 PHY_TRSV_REG_CFG(0x036, 0x32, PWR_MODE_ANY),
24 PHY_TRSV_REG_CFG(0x037, 0x40, PWR_MODE_ANY),
[all …]
/Linux-v5.10/drivers/video/fbdev/sis/
Dinit.h70 static const unsigned short ModeIndex_320x200[] = {0x59, 0x41, 0x00, 0x4f};
71 static const unsigned short ModeIndex_320x240[] = {0x50, 0x56, 0x00, 0x53};
72 static const unsigned short ModeIndex_320x240_FSTN[] = {0x5a, 0x5b, 0x00, 0x00}; /* FSTN */
73 static const unsigned short ModeIndex_400x300[] = {0x51, 0x57, 0x00, 0x54};
74 static const unsigned short ModeIndex_512x384[] = {0x52, 0x58, 0x00, 0x5c};
75 static const unsigned short ModeIndex_640x400[] = {0x2f, 0x5d, 0x00, 0x5e};
76 static const unsigned short ModeIndex_640x480[] = {0x2e, 0x44, 0x00, 0x62};
77 static const unsigned short ModeIndex_720x480[] = {0x31, 0x33, 0x00, 0x35};
78 static const unsigned short ModeIndex_720x576[] = {0x32, 0x34, 0x00, 0x36};
79 static const unsigned short ModeIndex_768x576[] = {0x5f, 0x60, 0x00, 0x61};
[all …]
/Linux-v5.10/include/linux/usb/
Dusb338x.h30 #define SCRATCH 0x0b
47 #define USB3380_EP_CFG_MASK_IN ((0x3 << IN_ENDPOINT_TYPE) | \
49 #define USB3380_EP_CFG_MASK_OUT ((0x3 << OUT_ENDPOINT_TYPE) | \
56 #define DEVICE_CLASS 0
59 #define U1_SYSTEM_EXIT_LATENCY 0
62 #define U1_DEVICE_EXIT_LATENCY 0
66 #define USB_L1_LPM_SUPPORT 0
69 #define BEST_EFFORT_LATENCY_TOLERANCE 0
77 #define SERIAL_NUMBER_STRING_ENABLE 0
90 #define GPEP0_TIMEOUT_ENABLE 0
[all …]
/Linux-v5.10/drivers/gpu/drm/sti/
Dsti_hda.c23 #define HDA_ANA_CFG 0x0000
24 #define HDA_ANA_SCALE_CTRL_Y 0x0004
25 #define HDA_ANA_SCALE_CTRL_CB 0x0008
26 #define HDA_ANA_SCALE_CTRL_CR 0x000C
27 #define HDA_ANA_ANC_CTRL 0x0010
28 #define HDA_ANA_SRC_Y_CFG 0x0014
29 #define HDA_COEFF_Y_PH1_TAP123 0x0018
30 #define HDA_COEFF_Y_PH1_TAP456 0x001C
31 #define HDA_COEFF_Y_PH2_TAP123 0x0020
32 #define HDA_COEFF_Y_PH2_TAP456 0x0024
[all …]
/Linux-v5.10/arch/sh/kernel/cpu/sh4a/
Dsetup-shx3.c20 * This intentionally only registers SCIF ports 0, 1, and 3. SCIF 2
34 DEFINE_RES_MEM(0xffc30000, 0x100),
35 DEFINE_RES_IRQ(evt2irq(0x700)),
36 DEFINE_RES_IRQ(evt2irq(0x720)),
37 DEFINE_RES_IRQ(evt2irq(0x760)),
38 DEFINE_RES_IRQ(evt2irq(0x740)),
43 .id = 0,
57 DEFINE_RES_MEM(0xffc40000, 0x100),
58 DEFINE_RES_IRQ(evt2irq(0x780)),
59 DEFINE_RES_IRQ(evt2irq(0x7a0)),
[all …]
/Linux-v5.10/drivers/video/fbdev/
Dsm712fb.c65 .red = {16, 8, 0},
66 .green = {8, 8, 0},
67 .blue = {0, 8, 0},
72 .nonstd = 0,
82 .type_aux = 0,
83 .xpanstep = 0,
84 .ypanstep = 0,
85 .ywrapstep = 0,
96 {"0x301", 640, 480, 8},
97 {"0x303", 800, 600, 8},
[all …]
/Linux-v5.10/drivers/gpu/drm/radeon/
Dr600_reg.h31 #define R600_PCIE_PORT_INDEX 0x0038
32 #define R600_PCIE_PORT_DATA 0x003c
34 #define R600_RCU_INDEX 0x0100
35 #define R600_RCU_DATA 0x0104
37 #define R600_UVD_CTX_INDEX 0xf4a0
38 #define R600_UVD_CTX_DATA 0xf4a4
40 #define R600_MC_VM_FB_LOCATION 0x2180
41 #define R600_MC_FB_BASE_MASK 0x0000FFFF
42 #define R600_MC_FB_BASE_SHIFT 0
43 #define R600_MC_FB_TOP_MASK 0xFFFF0000
[all …]
/Linux-v5.10/arch/sh/kernel/cpu/sh3/
Dsetup-sh7705.c20 UNUSED = 0,
36 INTC_VECT(PINT07, 0x700), INTC_VECT(PINT815, 0x720),
37 INTC_VECT(DMAC, 0x800), INTC_VECT(DMAC, 0x820),
38 INTC_VECT(DMAC, 0x840), INTC_VECT(DMAC, 0x860),
39 INTC_VECT(SCIF0, 0x880), INTC_VECT(SCIF0, 0x8a0),
40 INTC_VECT(SCIF0, 0x8e0),
41 INTC_VECT(SCIF2, 0x900), INTC_VECT(SCIF2, 0x920),
42 INTC_VECT(SCIF2, 0x960),
43 INTC_VECT(ADC_ADI, 0x980),
44 INTC_VECT(USB, 0xa20), INTC_VECT(USB, 0xa40),
[all …]
Dsetup-sh770x.c24 UNUSED = 0,
36 INTC_VECT(TMU0, 0x400), INTC_VECT(TMU1, 0x420),
37 INTC_VECT(TMU2, 0x440), INTC_VECT(TMU2, 0x460),
38 INTC_VECT(RTC, 0x480), INTC_VECT(RTC, 0x4a0),
39 INTC_VECT(RTC, 0x4c0),
40 INTC_VECT(SCI, 0x4e0), INTC_VECT(SCI, 0x500),
41 INTC_VECT(SCI, 0x520), INTC_VECT(SCI, 0x540),
42 INTC_VECT(WDT, 0x560),
43 INTC_VECT(REF, 0x580),
44 INTC_VECT(REF, 0x5a0),
[all …]
/Linux-v5.10/drivers/gpu/host1x/hw/
Dhw_host1x01_sync.h29 * <x> value 'r' after being shifted to place its LSB at bit 0.
46 return 0x400 + id * REGISTER_STRIDE; in host1x_sync_syncpt_r()
52 return 0x40 + id * REGISTER_STRIDE; in host1x_sync_syncpt_thresh_cpu0_int_status_r()
58 return 0x60 + id * REGISTER_STRIDE; in host1x_sync_syncpt_thresh_int_disable_r()
64 return 0x68 + id * REGISTER_STRIDE; in host1x_sync_syncpt_thresh_int_enable_cpu0_r()
70 return 0x80 + channel * REGISTER_STRIDE; in host1x_sync_cf_setup_r()
76 return (r >> 0) & 0x1ff; in host1x_sync_cf_setup_base_v()
82 return (r >> 16) & 0x1ff; in host1x_sync_cf_setup_limit_v()
88 return 0xac; in host1x_sync_cmdproc_stop_r()
94 return 0xb0; in host1x_sync_ch_teardown_r()
[all …]
Dhw_host1x02_sync.h29 * <x> value 'r' after being shifted to place its LSB at bit 0.
46 return 0x400 + id * REGISTER_STRIDE; in host1x_sync_syncpt_r()
52 return 0x40 + id * REGISTER_STRIDE; in host1x_sync_syncpt_thresh_cpu0_int_status_r()
58 return 0x60 + id * REGISTER_STRIDE; in host1x_sync_syncpt_thresh_int_disable_r()
64 return 0x68 + id * REGISTER_STRIDE; in host1x_sync_syncpt_thresh_int_enable_cpu0_r()
70 return 0x80 + channel * REGISTER_STRIDE; in host1x_sync_cf_setup_r()
76 return (r >> 0) & 0x3ff; in host1x_sync_cf_setup_base_v()
82 return (r >> 16) & 0x3ff; in host1x_sync_cf_setup_limit_v()
88 return 0xac; in host1x_sync_cmdproc_stop_r()
94 return 0xb0; in host1x_sync_ch_teardown_r()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/net/
Dqcom,ipa.yaml174 iommus = <&apps_smmu 0x720 0x3>;
175 reg = <0x1e40000 0x7000>,
176 <0x1e47000 0x2000>,
177 <0x1e04000 0x2c000>;
182 interrupts-extended = <&intc 0 311 IRQ_TYPE_EDGE_RISING>,
183 <&intc 0 432 IRQ_TYPE_LEVEL_HIGH>,
184 <&ipa_smp2p_in 0 IRQ_TYPE_EDGE_RISING>,
202 qcom,smem-states = <&ipa_smp2p_out 0>,
/Linux-v5.10/drivers/media/platform/qcom/venus/
Dcore.c55 int ret = 0; in venus_sys_error_handler()
72 while (core->pmdomains[0] && pm_runtime_active(core->pmdomains[0])) in venus_sys_error_handler()
125 return 0; in to_v4l2_codec_type()
138 return 0; in venus_enumerate_codecs()
156 for (i = 0; i < MAX_CODEC_NUM; i++) { in venus_enumerate_codecs()
193 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); in venus_probe()
206 core->irq = platform_get_irq(pdev, 0); in venus_probe()
207 if (core->irq < 0) in venus_probe()
249 if (ret < 0) in venus_probe()
292 return 0; in venus_probe()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dimx51-pinfunc.h13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0
14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0
15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0
16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0
17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0
18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0
19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0
20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0
21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0
22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0
[all …]
Dimx35-pinfunc.h13 #define MX35_PAD_CAPTURE__GPT_CAPIN1 0x004 0x328 0x000 0x0 0x0
14 #define MX35_PAD_CAPTURE__GPT_CMPOUT2 0x004 0x328 0x000 0x1 0x0
15 #define MX35_PAD_CAPTURE__CSPI2_SS1 0x004 0x328 0x7f4 0x2 0x0
16 #define MX35_PAD_CAPTURE__EPIT1_EPITO 0x004 0x328 0x000 0x3 0x0
17 #define MX35_PAD_CAPTURE__CCM_CLK32K 0x004 0x328 0x7d0 0x4 0x0
18 #define MX35_PAD_CAPTURE__GPIO1_4 0x004 0x328 0x850 0x5 0x0
19 #define MX35_PAD_COMPARE__GPT_CMPOUT1 0x008 0x32c 0x000 0x0 0x0
20 #define MX35_PAD_COMPARE__GPT_CAPIN2 0x008 0x32c 0x000 0x1 0x0
21 #define MX35_PAD_COMPARE__GPT_CMPOUT3 0x008 0x32c 0x000 0x2 0x0
22 #define MX35_PAD_COMPARE__EPIT2_EPITO 0x008 0x32c 0x000 0x3 0x0
[all …]
Dimx6dl-pinfunc.h13 #define MX6QDL_PAD_CSI0_DAT10__IPU1_CSI0_DATA10 0x04c 0x360 0x000 0x0 0x0
14 #define MX6QDL_PAD_CSI0_DAT10__AUD3_RXC 0x04c 0x360 0x000 0x1 0x0
15 #define MX6QDL_PAD_CSI0_DAT10__ECSPI2_MISO 0x04c 0x360 0x7f8 0x2 0x0
16 #define MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x04c 0x360 0x000 0x3 0x0
17 #define MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x04c 0x360 0x8fc 0x3 0x0
18 #define MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x04c 0x360 0x000 0x5 0x0
19 #define MX6QDL_PAD_CSI0_DAT10__ARM_TRACE07 0x04c 0x360 0x000 0x7 0x0
20 #define MX6QDL_PAD_CSI0_DAT11__IPU1_CSI0_DATA11 0x050 0x364 0x000 0x0 0x0
21 #define MX6QDL_PAD_CSI0_DAT11__AUD3_RXFS 0x050 0x364 0x000 0x1 0x0
22 #define MX6QDL_PAD_CSI0_DAT11__ECSPI2_SS0 0x050 0x364 0x800 0x2 0x0
[all …]
/Linux-v5.10/drivers/net/ethernet/apple/
Dbmac.h17 #define XIFC 0x000 /* low-level interface control */
18 # define TxOutputEnable 0x0001 /* output driver enable */
19 # define XIFLoopback 0x0002 /* Loopback-mode XIF enable */
20 # define MIILoopback 0x0004 /* Loopback-mode MII enable */
21 # define MIILoopbackBits 0x0006
22 # define MIIBuffDisable 0x0008 /* MII receive buffer disable */
23 # define SQETestEnable 0x0010 /* SQE test enable */
24 # define SQETimeWindow 0x03e0 /* SQE time window */
25 # define XIFLanceMode 0x0010 /* Lance mode enable */
26 # define XIFLanceIPG0 0x03e0 /* Lance mode IPG0 */
[all …]
/Linux-v5.10/drivers/mtd/nand/raw/
Ddenali.h17 #define DEVICE_RESET 0x0
20 #define TRANSFER_SPARE_REG 0x10
21 #define TRANSFER_SPARE_REG__FLAG BIT(0)
23 #define LOAD_WAIT_CNT 0x20
24 #define LOAD_WAIT_CNT__VALUE GENMASK(15, 0)
26 #define PROGRAM_WAIT_CNT 0x30
27 #define PROGRAM_WAIT_CNT__VALUE GENMASK(15, 0)
29 #define ERASE_WAIT_CNT 0x40
30 #define ERASE_WAIT_CNT__VALUE GENMASK(15, 0)
32 #define INT_MON_CYCCNT 0x50
[all …]

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