Lines Matching +full:0 +full:x720
30 #define SCRATCH 0x0b
47 #define USB3380_EP_CFG_MASK_IN ((0x3 << IN_ENDPOINT_TYPE) | \
49 #define USB3380_EP_CFG_MASK_OUT ((0x3 << OUT_ENDPOINT_TYPE) | \
56 #define DEVICE_CLASS 0
59 #define U1_SYSTEM_EXIT_LATENCY 0
62 #define U1_DEVICE_EXIT_LATENCY 0
66 #define USB_L1_LPM_SUPPORT 0
69 #define BEST_EFFORT_LATENCY_TOLERANCE 0
77 #define SERIAL_NUMBER_STRING_ENABLE 0
90 #define GPEP0_TIMEOUT_ENABLE 0
92 #define ISOCHRONOUS_DELAY 0
96 /* offset 0x0500, 0x0520, 0x0540, 0x0560, 0x0580 */
101 #define OUT_FIFO_SIZE 0
112 /* offset 0x700 */
118 /* 0x710 */
143 /* 0x720 */
149 /* 0x730 */
152 /* 0x740 */
157 #define TIMER_LFPS_80US 0
159 /* 0x750 */
162 /* 0x770 */
167 /* 0x780 */
169 #define HOT_RX_RESET_TS2 0
172 /* 0x790 */
175 #define LFPS_TIMERS_2_WORKAROUND_VALUE 0x084d
183 /* offset 0x800 */
190 #define PL_EP_CTRL 0x810
191 #define ENDPOINT_SELECT 0
192 /* [4:0] */
201 #define PL_EP_STATUS_1 0x820
203 #define ACK_GOOD_NORMAL 0x11
204 #define ACK_GOOD_MORE_ACKS_TO_COME 0x16
208 #define PL_EP_STATUS_3 0x828
209 #define SEQUENCE_NUMBER 0
212 #define PL_EP_STATUS_4 0x82c
215 #define PL_EP_CFG_4 0x830