Searched +full:0 +full:x104c (Results 1 – 25 of 62) sorted by relevance
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/Linux-v6.1/Documentation/devicetree/bindings/pci/ |
D | ti,j721e-pci-host.yaml | 66 const: 0x104c 71 - const: 0xb00d 73 - const: 0xb00f 75 - const: 0xb010 111 reg = <0x00 0x02900000 0x00 0x1000>, 112 <0x00 0x02907000 0x00 0x400>, 113 <0x00 0x0d000000 0x00 0x00800000>, 114 <0x00 0x10000000 0x00 0x00001000>; 116 ti,syscon-pcie-ctrl = <&pcie0_ctrl 0x4070>; 125 bus-range = <0x0 0xf>; [all …]
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/Linux-v6.1/include/linux/comedi/ |
D | comedi_pci.h | 19 #define PCI_VENDOR_ID_KOLTER 0x1001 20 #define PCI_VENDOR_ID_ICP 0x104c 21 #define PCI_VENDOR_ID_DT 0x1116 22 #define PCI_VENDOR_ID_IOTECH 0x1616 23 #define PCI_VENDOR_ID_CONTEC 0x1221 24 #define PCI_VENDOR_ID_RTD 0x1435 25 #define PCI_VENDOR_ID_HUMUSOFT 0x186c
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/Linux-v6.1/Documentation/PCI/endpoint/function/binding/ |
D | pci-test.rst | 12 vendorid should be 0x104c 13 deviceid should be 0xb500 for DRA74x and 0xb501 for DRA72x 17 baseclass_code should be 0xff
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D | pci-ntb.rst | 12 vendorid should be 0x104c 13 deviceid should be 0xb00d for TI's J721E SoC 16 subclass_code should be 0x00 17 baseclass_code should be 0x5
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/Linux-v6.1/arch/arm/mach-mmp/ |
D | pm-mmp2.h | 14 #define APMU_PJ_IDLE_CFG APMU_REG(0x018) 21 #define APMU_SRAM_PWR_DWN APMU_REG(0x08c) 23 #define MPMU_SCCR MPMU_REG(0x038) 24 #define MPMU_PCR_PJ MPMU_REG(0x1000) 41 #define MPMU_PLL2_CTRL1 MPMU_REG(0x0414) 42 #define MPMU_CGR_PJ MPMU_REG(0x1024) 43 #define MPMU_WUCRM_PJ MPMU_REG(0x104c) 48 POWER_MODE_ACTIVE = 0,
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D | pm-pxa910.h | 12 #define APMU_MOH_IDLE_CFG APMU_REG(0x0018) 16 #define APMU_MOH_IDLE_CFG_MOH_PWR_SW(x) (((x) & 0x3) << 16) 17 #define APMU_MOH_IDLE_CFG_MOH_L2_PWR_SW(x) (((x) & 0x3) << 18) 21 #define APMU_SQU_CLK_GATE_CTRL APMU_REG(0x001c) 22 #define APMU_MC_HW_SLP_TYPE APMU_REG(0x00b0) 24 #define MPMU_FCCR MPMU_REG(0x0008) 25 #define MPMU_APCR MPMU_REG(0x1000) 45 #define MPMU_AWUCRM MPMU_REG(0x104c) 60 #define MPMU_AWUCRM_WAKEUP(x) (1 << ((x) & 0x7)) 63 POWER_MODE_ACTIVE = 0,
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/Linux-v6.1/include/linux/mmc/ |
D | sdio_ids.h | 13 #define SDIO_CLASS_NONE 0x00 /* Not a SDIO standard interface */ 14 #define SDIO_CLASS_UART 0x01 /* standard UART interface */ 15 #define SDIO_CLASS_BT_A 0x02 /* Type-A BlueTooth std interface */ 16 #define SDIO_CLASS_BT_B 0x03 /* Type-B BlueTooth std interface */ 17 #define SDIO_CLASS_GPS 0x04 /* GPS standard interface */ 18 #define SDIO_CLASS_CAMERA 0x05 /* Camera standard interface */ 19 #define SDIO_CLASS_PHS 0x06 /* PHS standard interface */ 20 #define SDIO_CLASS_WLAN 0x07 /* WLAN interface */ 21 #define SDIO_CLASS_ATA 0x08 /* Embedded SDIO-ATA std interface */ 22 #define SDIO_CLASS_BT_AMP 0x09 /* Type-A Bluetooth AMP interface */ [all …]
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/Linux-v6.1/Documentation/PCI/endpoint/ |
D | pci-ntb-howto.rst | 66 baseclass_code deviceid msi_interrupts pci-epf-ntb.0 73 vendorid with 0xffff and interrupt_pin with 0x0001:: 76 0xffff 78 0x0001 88 # echo 0x104c > functions/pci_epf_ntb/func1/vendorid 89 # echo 0xb00d > functions/pci_epf_ntb/func1/deviceid 94 # mkdir functions/pci_epf_ntb/func1/pci_epf_ntb.0/ 99 # ls functions/pci_epf_ntb/func1/pci_epf_ntb.0/ 105 # echo 4 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/db_count 106 # echo 128 > functions/pci_epf_ntb/func1/pci_epf_ntb.0/spad_count [all …]
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D | pci-test-howto.rst | 67 vendorid with 0xffff and interrupt_pin with 0x0001:: 70 0xffff 72 0x0001 82 # echo 0x104c > functions/pci_epf_test/func1/vendorid 83 # echo 0xb500 > functions/pci_epf_test/func1/deviceid
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/Linux-v6.1/drivers/misc/mei/ |
D | hw-txe-regs.h | 30 #define PCI_CFG_TXE_FW_STS0 0x40 31 # define PCI_CFG_TXE_FW_STS0_WRK_ST_MSK 0x0000000F 32 # define PCI_CFG_TXE_FW_STS0_OP_ST_MSK 0x000001C0 33 # define PCI_CFG_TXE_FW_STS0_FW_INIT_CMPLT 0x00000200 34 # define PCI_CFG_TXE_FW_STS0_ERR_CODE_MSK 0x0000F000 35 # define PCI_CFG_TXE_FW_STS0_OP_MODE_MSK 0x000F0000 36 # define PCI_CFG_TXE_FW_STS0_RST_CNT_MSK 0x00F00000 37 #define PCI_CFG_TXE_FW_STS1 0x48 39 #define IPC_BASE_ADDR 0x80400 /* SeC IPC Base Address */ 42 #define SEC_IPC_INPUT_DOORBELL_REG (0x0000 + IPC_BASE_ADDR) [all …]
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/Linux-v6.1/drivers/mmc/core/ |
D | card.h | 20 #define MMC_STATE_PRESENT (1<<0) /* present in sysfs */ 75 #define CID_MANFID_SANDISK 0x2 76 #define CID_MANFID_SANDISK_SD 0x3 77 #define CID_MANFID_ATP 0x9 78 #define CID_MANFID_TOSHIBA 0x11 79 #define CID_MANFID_MICRON 0x13 80 #define CID_MANFID_SAMSUNG 0x15 81 #define CID_MANFID_APACER 0x27 82 #define CID_MANFID_KINGSTON 0x70 83 #define CID_MANFID_HYNIX 0x90 [all …]
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/Linux-v6.1/drivers/clk/qcom/ |
D | dispcc-sm6350.c | 35 { 249600000, 2000000000, 0 }, 39 .l = 0x3a, 40 .alpha = 0x5555, 41 .config_ctl_val = 0x20485699, 42 .config_ctl_hi_val = 0x00002067, 43 .test_ctl_val = 0x40000000, 44 .test_ctl_hi_val = 0x00000002, 45 .user_ctl_val = 0x00000000, 46 .user_ctl_hi_val = 0x00004805, 50 .offset = 0x0, [all …]
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D | dispcc-sc7280.c | 34 { 249600000, 2000000000, 0 }, 39 .l = 0x4F, 40 .alpha = 0x2AAA, 41 .config_ctl_val = 0x20485699, 42 .config_ctl_hi_val = 0x00002261, 43 .config_ctl_hi1_val = 0x329A299C, 44 .user_ctl_val = 0x00000001, 45 .user_ctl_hi_val = 0x00000805, 46 .user_ctl_hi1_val = 0x00000000, 50 .offset = 0x0, [all …]
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D | mmcc-msm8994.c | 45 { P_XO, 0 }, 55 { P_XO, 0 }, 65 { P_XO, 0 }, 77 { P_XO, 0 }, 92 { 1500000000, 2000000000, 0 }, 96 { 500000000, 1500000000, 0 }, 100 .post_div_mask = 0xf00, 104 .offset = 0x0, 109 .enable_reg = 0x100, 110 .enable_mask = BIT(0), [all …]
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D | mmcc-msm8996.c | 65 { 1500000000, 2000000000, 0 }, 71 { 1500000000, 2000000000, 0 }, 75 { 500000000, 1500000000, 0 }, 79 .offset = 0x0, 84 .enable_reg = 0x100, 85 .enable_mask = BIT(0), 98 .offset = 0x0, 113 .offset = 0x30, 118 .enable_reg = 0x100, 132 .offset = 0x30, [all …]
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D | mmcc-apq8084.c | 44 { P_XO, 0 }, 58 { P_XO, 0 }, 76 { P_XO, 0 }, 92 { P_XO, 0 }, 108 { P_XO, 0 }, 126 { P_XO, 0 }, 144 { P_XO, 0 }, 162 { P_XO, 0 }, 178 { P_XO, 0 }, 196 { P_XO, 0 }, [all …]
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/Linux-v6.1/drivers/net/fddi/skfp/h/ |
D | smt_p.h | 19 #define SMT_P0012 0x0012 21 #define SMT_P0015 0x0015 22 #define SMT_P0016 0x0016 23 #define SMT_P0017 0x0017 24 #define SMT_P0018 0x0018 25 #define SMT_P0019 0x0019 27 #define SMT_P001A 0x001a 28 #define SMT_P001B 0x001b 29 #define SMT_P001C 0x001c 30 #define SMT_P001D 0x001d [all …]
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/Linux-v6.1/drivers/media/pci/cx25821/ |
D | cx25821-medusa-reg.h | 13 #define HOST_REGISTER1 0x0000 14 #define HOST_REGISTER2 0x0001 17 #define CHIP_CTRL 0x0100 18 #define AFE_AB_CTRL 0x0104 19 #define AFE_CD_CTRL 0x0108 20 #define AFE_EF_CTRL 0x010C 21 #define AFE_GH_CTRL 0x0110 22 #define DENC_AB_CTRL 0x0114 23 #define BYP_AB_CTRL 0x0118 24 #define MON_A_CTRL 0x011C [all …]
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/Linux-v6.1/arch/sh/include/asm/ |
D | hd64461.h | 10 * (please note manual reference 0x10000000 = 0xb0000000) 14 #define HD64461_PCC_WINDOW 0x01000000 16 /* Area 6 - Slot 0 - memory and/or IO card */ 17 #define HD64461_IOBASE 0xb0000000 19 #define HD64461_PCC0_BASE HD64461_IO_OFFSET(0x8000000) 20 #define HD64461_PCC0_ATTR (HD64461_PCC0_BASE) /* 0xb80000000 */ 21 #define HD64461_PCC0_COMM (HD64461_PCC0_BASE+HD64461_PCC_WINDOW) /* 0xb90000000 */ 22 #define HD64461_PCC0_IO (HD64461_PCC0_BASE+2*HD64461_PCC_WINDOW) /* 0xba0000000 */ 25 #define HD64461_PCC1_BASE HD64461_IO_OFFSET(0x4000000) 26 #define HD64461_PCC1_ATTR (HD64461_PCC1_BASE) /* 0xb4000000 */ [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | keystone-k2g-ice.dts | 18 reg = <0x00000008 0x00000000 0x00000000 0x20000000>; 28 reg = <0x00000008 0x1f800000 0x00000000 0x800000>; 128 <&pca9536 0 GPIO_ACTIVE_HIGH>; 129 linux,axis = <0>; /* ABS_X */ 136 pinctrl-0 = <&user_leds>; 223 K2G_CORE_IOPAD(0x11cc) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* uart0_rxd.uart0_rxd */ 224 K2G_CORE_IOPAD(0x11d0) (BUFFER_CLASS_B | PIN_PULLDOWN | MUX_MODE0) /* uart0_txd.uart0_txd */ 230 K2G_CORE_IOPAD(0x1204) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_clk.qspi_clk */ 231 K2G_CORE_IOPAD(0x1208) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_rclk.qspi_rclk */ 232 K2G_CORE_IOPAD(0x120c) (BUFFER_CLASS_B | PULL_DISABLE | MUX_MODE0) /* qspi_d0.qspi_d0 */ [all …]
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/Linux-v6.1/drivers/net/ethernet/intel/e1000e/ |
D | hw.h | 12 #define E1000_DEV_ID_82571EB_COPPER 0x105E 13 #define E1000_DEV_ID_82571EB_FIBER 0x105F 14 #define E1000_DEV_ID_82571EB_SERDES 0x1060 15 #define E1000_DEV_ID_82571EB_QUAD_COPPER 0x10A4 16 #define E1000_DEV_ID_82571PT_QUAD_COPPER 0x10D5 17 #define E1000_DEV_ID_82571EB_QUAD_FIBER 0x10A5 18 #define E1000_DEV_ID_82571EB_QUAD_COPPER_LP 0x10BC 19 #define E1000_DEV_ID_82571EB_SERDES_DUAL 0x10D9 20 #define E1000_DEV_ID_82571EB_SERDES_QUAD 0x10DA 21 #define E1000_DEV_ID_82572EI_COPPER 0x107D [all …]
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/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-j721e-main.dtsi | 14 #clock-cells = <0>; 16 clock-frequency = <0>; 20 #clock-cells = <0>; 22 clock-frequency = <0>; 29 reg = <0x0 0x70000000 0x0 0x800000>; 32 ranges = <0x0 0x0 0x70000000 0x800000>; 34 atf-sram@0 { 35 reg = <0x0 0x20000>; 41 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */ 44 ranges = <0x0 0x0 0x00100000 0x1c000>; [all …]
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D | k3-j7200-main.dtsi | 10 #clock-cells = <0>; 18 reg = <0x00 0x70000000 0x00 0x100000>; 21 ranges = <0x00 0x00 0x70000000 0x100000>; 23 atf-sram@0 { 24 reg = <0x00 0x20000>; 30 reg = <0x00 0x00100000 0x00 0x1c000>; 33 ranges = <0x00 0x00 0x00100000 0x1c000>; 38 mux-reg-masks = <0x4080 0x3>, <0x4084 0x3>, /* SERDES0 lane0/1 select */ 39 <0x4088 0x3>, <0x408c 0x3>; /* SERDES0 lane2/3 select */ 45 mux-reg-masks = <0x4000 0x8000000>; /* USB0 to SERDES0 lane 1/3 mux */ [all …]
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/Linux-v6.1/drivers/gpu/drm/bridge/synopsys/ |
D | dw-hdmi.h | 10 #define HDMI_DESIGN_ID 0x0000 11 #define HDMI_REVISION_ID 0x0001 12 #define HDMI_PRODUCT_ID0 0x0002 13 #define HDMI_PRODUCT_ID1 0x0003 14 #define HDMI_CONFIG0_ID 0x0004 15 #define HDMI_CONFIG1_ID 0x0005 16 #define HDMI_CONFIG2_ID 0x0006 17 #define HDMI_CONFIG3_ID 0x0007 20 #define HDMI_IH_FC_STAT0 0x0100 21 #define HDMI_IH_FC_STAT1 0x0101 [all …]
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/Linux-v6.1/drivers/net/ethernet/hisilicon/hns/ |
D | hns_dsaf_reg.h | 10 #define HNS_DEBUG_RING_IRQ_IDX 0 46 #define DSAF_SUB_SC_NT_SRAM_CLK_SEL_REG 0x100 47 #define DSAF_SUB_SC_HILINK3_CRG_CTRL0_REG 0x180 48 #define DSAF_SUB_SC_HILINK3_CRG_CTRL1_REG 0x184 49 #define DSAF_SUB_SC_HILINK3_CRG_CTRL2_REG 0x188 50 #define DSAF_SUB_SC_HILINK3_CRG_CTRL3_REG 0x18C 51 #define DSAF_SUB_SC_HILINK4_CRG_CTRL0_REG 0x190 52 #define DSAF_SUB_SC_HILINK4_CRG_CTRL1_REG 0x194 53 #define DSAF_SUB_SC_DSAF_CLK_EN_REG 0x300 54 #define DSAF_SUB_SC_DSAF_CLK_DIS_REG 0x304 [all …]
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