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Searched refs:aud_intbus_parents (Results 1 – 17 of 17) sorted by relevance

/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt6795-topckgen.c46 static const char * const aud_intbus_parents[] = { variable
479 TOP_MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt8186-topckgen.c165 static const char * const aud_intbus_parents[] = { variable
544 aud_intbus_parents, 0x0080, 0x0084, 0x0088, 0, 2, 7, 0x0004, 16),
Dclk-mt8135.c164 static const char * const aud_intbus_parents[] __initconst = { variable
360 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt7629.c225 static const char * const aud_intbus_parents[] = { variable
526 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt6797.c227 static const char * const aud_intbus_parents[] = { variable
356 MUX(CLK_TOP_MUX_AUD_INTBUS, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt7622.c232 static const char * const aud_intbus_parents[] = { variable
558 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt8516.c134 static const char * const aud_intbus_parents[] __initconst = { variable
378 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt8195-topckgen.c379 static const char * const aud_intbus_parents[] = { variable
941 aud_intbus_parents, 0x080, 0x084, 0x088, 16, 2, 23, 0x08, 2),
Dclk-mt6779.c398 static const char * const aud_intbus_parents[] = { variable
703 aud_intbus_parents, 0x80, 0x84, 0x88,
Dclk-mt2701.c245 static const char * const aud_intbus_parents[] = { variable
522 MUX_GATE(CLK_TOP_AUDINTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt8167.c187 static const char * const aud_intbus_parents[] __initconst = { variable
550 MUX(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents,
Dclk-mt8183.c376 static const char * const aud_intbus_parents[] = { variable
592 aud_intbus_parents, 0x90,
Dclk-mt2712.c397 static const char * const aud_intbus_parents[] = { variable
780 aud_intbus_parents, 0x080, 24, 3, 31),
Dclk-mt6765.c269 static const char * const aud_intbus_parents[] = { variable
421 aud_intbus_parents, CLK_CFG_4, CLK_CFG_4_SET,
Dclk-mt8173.c327 static const char * const aud_intbus_parents[] __initconst = { variable
566 MUX_GATE(CLK_TOP_AUD_INTBUS_SEL, "aud_intbus_sel", aud_intbus_parents, 0x0080, 24, 3, 31),
Dclk-mt8192.c310 static const char * const aud_intbus_parents[] = { variable
621 aud_intbus_parents, 0x090, 0x094, 0x098, 0, 2, 7, 0x008, 1),
Dclk-mt8365.c211 static const char * const aud_intbus_parents[] = { variable
462 aud_intbus_parents, 0x080, 0x084, 0x088, 0, 2, 7,