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Searched refs:_pwr_reg (Results 1 – 19 of 19) sorted by relevance

/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt7986-apmixed.c25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
29 .id = _id, .name = _name, .reg = _reg, .pwr_reg = _pwr_reg, \
38 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
40 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8195-apusys_pll.c28 #define PLL(_id, _name, _reg, _pwr_reg, _pd_reg, _pcw_reg) { \ argument
32 .pwr_reg = _pwr_reg, \
Dclk-mt8186-apmixedsys.c17 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
24 .pwr_reg = _pwr_reg, \
Dclk-mt6795-apmixedsys.c24 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
29 .pwr_reg = _pwr_reg, \
Dclk-mt8195-apmixedsys.c31 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
39 .pwr_reg = _pwr_reg, \
Dclk-mt7629.c25 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
31 .pwr_reg = _pwr_reg, \
46 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
49 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt6797.c612 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
618 .pwr_reg = _pwr_reg, \
632 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
635 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8516.c737 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
743 .pwr_reg = _pwr_reg, \
757 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
760 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt7622.c25 #define PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\ argument
31 .pwr_reg = _pwr_reg, \
46 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
49 PLL_xtal(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits,\
Dclk-mt6779.c1146 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1154 .pwr_reg = _pwr_reg, \
1173 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1178 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8167.c983 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
989 .pwr_reg = _pwr_reg, \
1003 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1006 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt2712.c1167 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1174 .pwr_reg = _pwr_reg, \
1190 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
1193 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt6765.c717 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
723 .pwr_reg = _pwr_reg, \
741 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
745 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8183.c1065 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1073 .pwr_reg = _pwr_reg, \
1092 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1097 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8365.c764 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
771 .pwr_reg = _pwr_reg, \
790 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
794 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8173.c957 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
963 .pwr_reg = _pwr_reg, \
977 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ argument
980 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8192.c990 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
998 .pwr_reg = _pwr_reg, \
1018 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ argument
1022 PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt8135.c615 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, _pd_shift, _tuner_reg,… argument
619 .pwr_reg = _pwr_reg, \
Dclk-mt2701.c939 #define PLL(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, _pd_reg, \ argument
944 .pwr_reg = _pwr_reg, \