Home
last modified time | relevance | path

Searched refs:PLL_B (Results 1 – 11 of 11) sorted by relevance

/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8192.c1018 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ macro
1028 PLL_B(CLK_APMIXED_MAINPLL, "mainpll", 0x0340, 0x034c, 0xff000000,
1030 PLL_B(CLK_APMIXED_UNIVPLL, "univpll", 0x0308, 0x0314, 0xff000000,
1034 PLL_B(CLK_APMIXED_MSDCPLL, "msdcpll", 0x0350, 0x035c, 0x00000000,
1036 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0360, 0x036c, 0xff000000,
1038 PLL_B(CLK_APMIXED_ADSPPLL, "adsppll", 0x0370, 0x037c, 0xff000000,
1040 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0268, 0x0274, 0x00000000,
1042 PLL_B(CLK_APMIXED_TVDPLL, "tvdpll", 0x0380, 0x038c, 0x00000000,
1044 PLL_B(CLK_APMIXED_APLL1, "apll1", 0x0318, 0x0328, 0x00000000,
1046 PLL_B(CLK_APMIXED_APLL2, "apll2", 0x032c, 0x033c, 0x00000000,
Dclk-mt8183.c1065 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ macro
1097 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
1122 PLL_B(CLK_APMIXED_ARMPLL_LL, "armpll_ll", 0x0200, 0x020C, 0,
1125 PLL_B(CLK_APMIXED_ARMPLL_L, "armpll_l", 0x0210, 0x021C, 0,
1137 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0240, 0x024C, 0,
Dclk-mt2712.c1167 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
1193 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
1248 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0250, 0x0260, 0x00000100,
1251 PLL_B(CLK_APMIXED_ARMCA35PLL, "armca35pll", 0x0100, 0x0110, 0xf0000100,
1254 PLL_B(CLK_APMIXED_ARMCA72PLL, "armca72pll", 0x0210, 0x0220, 0x00000100,
Dclk-mt8365.c764 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
794 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
828 PLL_B(CLK_APMIXED_ARMPLL, "armpll", 0x030C, 0x0318, 0x00000001, PLL_AO,
836 PLL_B(CLK_APMIXED_MFGPLL, "mfgpll", 0x0218, 0x0224, 0x00000001, 0, 22,
848 PLL_B(CLK_APMIXED_DSPPLL, "dsppll", 0x0390, 0x039C, 0x00000001, 0, 22,
Dclk-mt8516.c737 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
760 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
780 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0,
Dclk-mt8167.c983 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
1006 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
1026 PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x0160, 0x0170, 0, 0,
Dclk-mt7629.c25 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
49 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt6797.c612 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
635 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
Dclk-mt8173.c957 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
980 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \
998PLL_B(CLK_APMIXED_MMPLL, "mmpll", 0x240, 0x24c, 0, 0, 21, 0x244, 24, 0x0, 0x244, 0, mmpll_div_tabl…
Dclk-mt6779.c1146 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \ macro
1178 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \
Dclk-mt6765.c717 #define PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, _pcwbits, \ macro
745 PLL_B(_id, _name, _reg, _pwr_reg, _en_mask, _flags, \