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Searched refs:CLK_APMIXED_UNIVPLL (Results 1 – 21 of 21) sorted by relevance

/Linux-v6.1/include/dt-bindings/clock/
Dmt8135-clk.h111 #define CLK_APMIXED_UNIVPLL 4 macro
Dmt8516-clk.h15 #define CLK_APMIXED_UNIVPLL 2 macro
Dmediatek,mt6795-clk.h143 #define CLK_APMIXED_UNIVPLL 2 macro
Dmt6797-clk.h109 #define CLK_APMIXED_UNIVPLL 2 macro
Dmt8173-clk.h159 #define CLK_APMIXED_UNIVPLL 4 macro
Dmediatek,mt8365-clk.h233 #define CLK_APMIXED_UNIVPLL 2 macro
Dmt2712-clk.h13 #define CLK_APMIXED_UNIVPLL 1 macro
Dmt2701-clk.h177 #define CLK_APMIXED_UNIVPLL 3 macro
Dmt8192-clk.h302 #define CLK_APMIXED_UNIVPLL 1 macro
Dmt8195-clk.h369 #define CLK_APMIXED_UNIVPLL 10 macro
/Linux-v6.1/drivers/clk/mediatek/
Dclk-mt8195-apmixedsys.c80 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x01f0, 0x0700, 0xff000000,
Dclk-mt6795-apmixedsys.c49 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000101, HAVE_RST_BAR,
Dclk-mt8135.c636 …PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x238, 0x250, 0xf3000000, HAVE_RST_BAR, 7, 0x238, 6, 0x0, 0x23…
Dclk-mt6797.c642 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0230, 0x023C, 0xFE000010, 0, 7,
Dclk-mt8516.c778 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
Dclk-mt2701.c962 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x220, 0x22c, 0xf3000000,
Dclk-mt8167.c1024 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0140, 0x0150, 0x30000000,
Dclk-mt2712.c1228 PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x0240, 0x024C, 0xfe000100,
Dclk-mt8173.c997 …PLL(CLK_APMIXED_UNIVPLL, "univpll", 0x230, 0x23c, 0xfe000000, HAVE_RST_BAR, 7, 0x230, 4, 0x0, 0x23…
Dclk-mt8192.c1030 PLL_B(CLK_APMIXED_UNIVPLL, "univpll", 0x0308, 0x0314, 0xff000000,
Dclk-mt8365.c833 PLL(CLK_APMIXED_UNIVPLL, "univpll2", 0x0208, 0x0214, 0xFF000001,