| /Linux-v5.4/drivers/dma/ |
| D | imx-sdma.c | 363 struct sdma_engine *sdma; member
617 static inline u32 chnenbl_ofs(struct sdma_engine *sdma, unsigned int event) in chnenbl_ofs() argument
619 u32 chnenbl0 = sdma->drvdata->chnenbl0; in chnenbl_ofs()
626 struct sdma_engine *sdma = sdmac->sdma; in sdma_config_ownership() local
633 evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
634 mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
635 dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
652 writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
653 writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
654 writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
[all …]
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| D | sirf-dma.c | 238 struct sirfsoc_dma *sdma = dma_chan_to_sirfsoc_dma(&schan->chan); in sirfsoc_dma_execute() local
247 base = sdma->base; in sirfsoc_dma_execute()
253 if (sdma->type == SIRFSOC_DMA_VER_A7V2) in sirfsoc_dma_execute()
257 sdma->exec_desc(sdesc, cid, schan->mode, base); in sirfsoc_dma_execute()
266 struct sirfsoc_dma *sdma = data; in sirfsoc_dma_irq() local
274 switch (sdma->type) { in sirfsoc_dma_irq()
277 is = readl(sdma->base + SIRFSOC_DMA_CH_INT); in sirfsoc_dma_irq()
278 reg = sdma->base + SIRFSOC_DMA_CH_INT; in sirfsoc_dma_irq()
282 schan = &sdma->channels[ch]; in sirfsoc_dma_irq()
300 is = readl(sdma->base + SIRFSOC_DMA_INT_ATLAS7); in sirfsoc_dma_irq()
[all …]
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| /Linux-v5.4/Documentation/devicetree/bindings/dma/ |
| D | fsl-imx-sdma.txt | 5 "fsl,imx25-sdma"
6 "fsl,imx31-sdma", "fsl,imx31-to1-sdma", "fsl,imx31-to2-sdma"
7 "fsl,imx35-sdma", "fsl,imx35-to1-sdma", "fsl,imx35-to2-sdma"
8 "fsl,imx51-sdma"
9 "fsl,imx53-sdma"
10 "fsl,imx6q-sdma"
11 "fsl,imx7d-sdma"
12 "fsl,imx8mq-sdma"
21 - fsl,sdma-ram-script-name : Should contain the full path of SDMA RAM
66 - fsl,sdma-event-remap : Register bits of sdma event remap, the format is
[all …]
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| /Linux-v5.4/arch/arm/boot/dts/ |
| D | omap2.dtsi | 64 dmas = <&sdma 9 &sdma 10>;
82 sdma: dma-controller@48056000 { label
83 compatible = "ti,omap2430-sdma", "ti,omap2420-sdma";
102 dmas = <&sdma 27 &sdma 28>;
113 dmas = <&sdma 29 &sdma 30>;
122 dmas = <&sdma 35 &sdma 36 &sdma 37 &sdma 38
123 &sdma 39 &sdma 40 &sdma 41 &sdma 42>;
133 dmas = <&sdma 43 &sdma 44 &sdma 45 &sdma 46>;
149 dmas = <&sdma 13>;
158 dmas = <&sdma 49 &sdma 50>;
[all …]
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| D | omap3.dtsi | 164 dmas = <&sdma 65 &sdma 66>;
208 sdma: dma-controller@48056000 { label
209 compatible = "ti,omap3630-sdma", "ti,omap3430-sdma";
292 dmas = <&sdma 49 &sdma 50>;
302 dmas = <&sdma 51 &sdma 52>;
312 dmas = <&sdma 53 &sdma 54>;
322 dmas = <&sdma 27 &sdma 28>;
333 dmas = <&sdma 29 &sdma 30>;
344 dmas = <&sdma 25 &sdma 26>;
373 dmas = <&sdma 35>,
[all …]
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| D | omap2430.dtsi | 176 dmas = <&sdma 31>,
177 <&sdma 32>;
192 dmas = <&sdma 33>,
193 <&sdma 34>;
208 dmas = <&sdma 17>,
209 <&sdma 18>;
224 dmas = <&sdma 19>,
225 <&sdma 20>;
240 dmas = <&sdma 21>,
241 <&sdma 22>;
[all …]
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| D | imx31.dtsi | 135 dmas = <&sdma 8 8 0>, <&sdma 9 8 0>;
182 dmas = <&sdma 20 3 0>;
193 dmas = <&sdma 21 3 0>;
213 dmas = <&sdma 6 8 0>, <&sdma 7 8 0>;
248 dmas = <&sdma 10 8 0>, <&sdma 11 8 0>;
300 sdma: sdma@53fd4000 { label
301 compatible = "fsl,imx31-sdma";
307 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx31.bin";
347 dmas = <&sdma 30 17 0>;
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| D | imx6sll.dtsi | 165 dmas = <&sdma 14 18 0>, <&sdma 15 18 0>;
189 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
201 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
213 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
225 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
238 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
251 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
264 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
276 dmas = <&sdma 37 22 0>, <&sdma 38 22 0>;
289 dmas = <&sdma 41 22 0>, <&sdma 42 22 0>;
[all …]
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| D | imx6qdl.dtsi | 315 dmas = <&sdma 14 18 0>,
316 <&sdma 15 18 0>;
340 dmas = <&sdma 3 8 1>, <&sdma 4 8 2>;
354 dmas = <&sdma 5 8 1>, <&sdma 6 8 2>;
368 dmas = <&sdma 7 8 1>, <&sdma 8 8 2>;
382 dmas = <&sdma 9 8 1>, <&sdma 10 8 2>;
394 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
410 dmas = <&sdma 23 21 0>, <&sdma 24 21 0>;
424 dmas = <&sdma 37 1 0>,
425 <&sdma 38 1 0>;
[all …]
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| D | imx53.dtsi | 270 dmas = <&sdma 42 4 0>, <&sdma 43 4 0>;
297 dmas = <&sdma 24 1 0>,
298 <&sdma 25 1 0>;
554 dmas = <&sdma 18 4 0>, <&sdma 19 4 0>;
566 dmas = <&sdma 12 4 0>, <&sdma 13 4 0>;
651 dmas = <&sdma 2 4 0>, <&sdma 3 4 0>;
683 dmas = <&sdma 16 4 0>, <&sdma 17 4 0>;
712 sdma: sdma@63fb0000 { label
713 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
720 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
[all …]
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| D | imx6sx.dtsi | 256 dmas = <&sdma 14 18 0>,
257 <&sdma 15 18 0>;
330 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
356 dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
370 dmas = <&sdma 41 1 0>, <&sdma 42 1 0>;
384 dmas = <&sdma 45 1 0>, <&sdma 46 1 0>;
398 dmas = <&sdma 17 20 1>, <&sdma 18 20 1>,
399 <&sdma 19 20 1>, <&sdma 20 20 1>,
400 <&sdma 21 20 1>, <&sdma 22 20 1>;
820 sdma: sdma@20ec000 { label
[all …]
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| D | imx6sl.dtsi | 165 dmas = <&sdma 14 18 0>,
166 <&sdma 15 18 0>;
237 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
250 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
263 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
277 dmas = <&sdma 37 1 0>,
278 <&sdma 38 1 0>;
293 dmas = <&sdma 41 1 0>,
294 <&sdma 42 1 0>;
309 dmas = <&sdma 45 1 0>,
[all …]
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| D | omap2420.dtsi | 149 dmas = <&sdma 31>,
150 <&sdma 32>;
163 dmas = <&sdma 33>,
164 <&sdma 34>;
174 dmas = <&sdma 61 &sdma 62>;
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| D | imx51.dtsi | 228 dmas = <&sdma 24 1 0>,
229 <&sdma 25 1 0>;
487 sdma: sdma@83fb0000 { label
488 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
495 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
538 dmas = <&sdma 28 0 0>,
539 <&sdma 29 0 0>;
601 dmas = <&sdma 46 0 0>,
602 <&sdma 47 0 0>;
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| D | imx50.dtsi | 172 dmas = <&sdma 24 1 0>,
173 <&sdma 25 1 0>;
428 sdma: sdma@63fb0000 { label
429 compatible = "fsl,imx50-sdma", "fsl,imx35-sdma";
436 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx50.bin";
478 dmas = <&sdma 28 0 0>,
479 <&sdma 29 0 0>;
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| /Linux-v5.4/drivers/gpu/drm/amd/amdgpu/ |
| D | sdma_v4_0.c | 417 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v4_0_destroy_inst_ctx()
418 if (adev->sdma.instance[i].fw != NULL) in sdma_v4_0_destroy_inst_ctx()
419 release_firmware(adev->sdma.instance[i].fw); in sdma_v4_0_destroy_inst_ctx()
427 memset((void*)adev->sdma.instance, 0, in sdma_v4_0_destroy_inst_ctx()
483 err = request_firmware(&adev->sdma.instance[0].fw, fw_name, adev->dev); in sdma_v4_0_init_microcode()
487 err = sdma_v4_0_init_inst_ctx(&adev->sdma.instance[0]); in sdma_v4_0_init_microcode()
491 for (i = 1; i < adev->sdma.num_instances; i++) { in sdma_v4_0_init_microcode()
495 memcpy((void*)&adev->sdma.instance[i], in sdma_v4_0_init_microcode()
496 (void*)&adev->sdma.instance[0], in sdma_v4_0_init_microcode()
502 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v4_0_init_microcode()
[all …]
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| D | sdma_v3_0.c | 253 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_free_microcode()
254 release_firmware(adev->sdma.instance[i].fw); in sdma_v3_0_free_microcode()
255 adev->sdma.instance[i].fw = NULL; in sdma_v3_0_free_microcode()
307 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v3_0_init_microcode()
312 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v3_0_init_microcode()
315 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v3_0_init_microcode()
318 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v3_0_init_microcode()
319 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v3_0_init_microcode()
320 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v3_0_init_microcode()
321 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v3_0_init_microcode()
[all …]
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| D | cik_sdma.c | 76 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_free_microcode()
77 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_free_microcode()
78 adev->sdma.instance[i].fw = NULL; in cik_sdma_free_microcode()
135 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
140 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in cik_sdma_init_microcode()
143 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
148 for (i = 0; i < adev->sdma.num_instances; i++) { in cik_sdma_init_microcode()
149 release_firmware(adev->sdma.instance[i].fw); in cik_sdma_init_microcode()
150 adev->sdma.instance[i].fw = NULL; in cik_sdma_init_microcode()
203 struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring); in cik_sdma_ring_insert_nop() local
[all …]
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| D | sdma_v2_4.c | 116 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_free_microcode()
117 release_firmware(adev->sdma.instance[i].fw); in sdma_v2_4_free_microcode()
118 adev->sdma.instance[i].fw = NULL; in sdma_v2_4_free_microcode()
149 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v2_4_init_microcode()
154 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v2_4_init_microcode()
157 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v2_4_init_microcode()
160 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v2_4_init_microcode()
161 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v2_4_init_microcode()
162 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v2_4_init_microcode()
163 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v2_4_init_microcode()
[all …]
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| D | amdgpu_sdma.c | 40 for (i = 0; i < adev->sdma.num_instances; i++) in amdgpu_sdma_get_instance_from_ring()
41 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_instance_from_ring()
42 ring == &adev->sdma.instance[i].page) in amdgpu_sdma_get_instance_from_ring()
43 return &adev->sdma.instance[i]; in amdgpu_sdma_get_instance_from_ring()
53 for (i = 0; i < adev->sdma.num_instances; i++) { in amdgpu_sdma_get_index_from_ring()
54 if (ring == &adev->sdma.instance[i].ring || in amdgpu_sdma_get_index_from_ring()
55 ring == &adev->sdma.instance[i].page) { in amdgpu_sdma_get_index_from_ring()
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| D | sdma_v5_0.c | 193 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode()
198 err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev); in sdma_v5_0_init_microcode()
201 err = amdgpu_ucode_validate(adev->sdma.instance[i].fw); in sdma_v5_0_init_microcode()
204 hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data; in sdma_v5_0_init_microcode()
205 adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version); in sdma_v5_0_init_microcode()
206 adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version); in sdma_v5_0_init_microcode()
207 if (adev->sdma.instance[i].feature_version >= 20) in sdma_v5_0_init_microcode()
208 adev->sdma.instance[i].burst_nop = true; in sdma_v5_0_init_microcode()
215 info->fw = adev->sdma.instance[i].fw; in sdma_v5_0_init_microcode()
224 for (i = 0; i < adev->sdma.num_instances; i++) { in sdma_v5_0_init_microcode()
[all …]
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| D | si_dma.c | 49 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_get_wptr()
57 u32 me = (ring == &adev->sdma.instance[0].ring) ? 0 : 1; in si_dma_ring_set_wptr()
118 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_stop()
119 ring = &adev->sdma.instance[i].ring; in si_dma_stop()
138 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_start()
139 ring = &adev->sdma.instance[i].ring; in si_dma_start()
470 adev->sdma.num_instances = 2; in si_dma_early_init()
488 &adev->sdma.trap_irq); in si_dma_sw_init()
494 &adev->sdma.trap_irq); in si_dma_sw_init()
498 for (i = 0; i < adev->sdma.num_instances; i++) { in si_dma_sw_init()
[all …]
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| /Linux-v5.4/arch/powerpc/platforms/52xx/ |
| D | mpc52xx_pic.c | 134 static struct mpc52xx_sdma __iomem *sdma; variable
269 io_be_setbit(&sdma->IntMask, l2irq); in mpc52xx_sdma_mask()
275 io_be_clrbit(&sdma->IntMask, l2irq); in mpc52xx_sdma_unmask()
281 out_be32(&sdma->IntPend, 1 << l2irq); in mpc52xx_sdma_ack()
416 sdma = of_iomap(np, 0); in mpc52xx_init_irq()
418 if (!sdma) in mpc52xx_init_irq()
425 out_be32(&sdma->IntPend, 0xffffffff); /* 1 means clear pending */ in mpc52xx_init_irq()
426 out_be32(&sdma->IntMask, 0xffffffff); /* 1 means disabled */ in mpc52xx_init_irq()
507 status = in_be32(&sdma->IntPend); in mpc52xx_get_irq()
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| /Linux-v5.4/Documentation/devicetree/bindings/sound/ |
| D | fsl,asrc.txt | 60 dmas = <&sdma 17 23 1>, <&sdma 18 23 1>, <&sdma 19 23 1>,
61 <&sdma 20 23 1>, <&sdma 21 23 1>, <&sdma 22 23 1>;
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| /Linux-v5.4/drivers/infiniband/hw/hfi1/ |
| D | vnic_sdma.c | 72 struct hfi1_vnic_sdma *sdma; member
84 struct hfi1_vnic_sdma *vnic_sdma = tx->sdma; in vnic_sdma_complete()
171 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; in hfi1_vnic_send_dma()
188 tx->sdma = vnic_sdma; in hfi1_vnic_send_dma()
272 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; in hfi1_vnic_sdma_write_avail()
282 struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[i]; in hfi1_vnic_sdma_init()
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