193 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_init_microcode()
198 		err = request_firmware(&adev->sdma.instance[i].fw, fw_name, adev->dev);  in sdma_v5_0_init_microcode()
201 		err = amdgpu_ucode_validate(adev->sdma.instance[i].fw);  in sdma_v5_0_init_microcode()
204 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data;  in sdma_v5_0_init_microcode()
205 		adev->sdma.instance[i].fw_version = le32_to_cpu(hdr->header.ucode_version);  in sdma_v5_0_init_microcode()
206 		adev->sdma.instance[i].feature_version = le32_to_cpu(hdr->ucode_feature_version);  in sdma_v5_0_init_microcode()
207 		if (adev->sdma.instance[i].feature_version >= 20)  in sdma_v5_0_init_microcode()
208 			adev->sdma.instance[i].burst_nop = true;  in sdma_v5_0_init_microcode()
215 			info->fw = adev->sdma.instance[i].fw;  in sdma_v5_0_init_microcode()
224 		for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_init_microcode()
225 			release_firmware(adev->sdma.instance[i].fw);  in sdma_v5_0_init_microcode()
226 			adev->sdma.instance[i].fw = NULL;  in sdma_v5_0_init_microcode()
358 	struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring);  in sdma_v5_0_ring_insert_nop()  local
362 		if (sdma && sdma->burst_nop && (i == 0))  in sdma_v5_0_ring_insert_nop()
481 	struct amdgpu_ring *sdma0 = &adev->sdma.instance[0].ring;  in sdma_v5_0_gfx_stop()
482 	struct amdgpu_ring *sdma1 = &adev->sdma.instance[1].ring;  in sdma_v5_0_gfx_stop()
490 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_gfx_stop()
552 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_ctx_switch_enable()
587 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_enable()
615 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_gfx_resume()
616 		ring = &adev->sdma.instance[i].ring;  in sdma_v5_0_gfx_resume()
786 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_load_microcode()
787 		if (!adev->sdma.instance[i].fw)  in sdma_v5_0_load_microcode()
790 		hdr = (const struct sdma_firmware_header_v1_0 *)adev->sdma.instance[i].fw->data;  in sdma_v5_0_load_microcode()
795 			(adev->sdma.instance[i].fw->data +  in sdma_v5_0_load_microcode()
806 		WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_UCODE_ADDR), adev->sdma.instance[i].fw_version);  in sdma_v5_0_load_microcode()
1096 	struct amdgpu_sdma_instance *sdma = amdgpu_sdma_get_instance_from_ring(ring);  in sdma_v5_0_ring_pad_ib()  local
1102 		if (sdma && sdma->burst_nop && (i == 0))  in sdma_v5_0_ring_pad_ib()
1190 	adev->sdma.num_instances = 2;  in sdma_v5_0_early_init()
1210 			      &adev->sdma.trap_irq);  in sdma_v5_0_sw_init()
1217 			      &adev->sdma.trap_irq);  in sdma_v5_0_sw_init()
1227 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_sw_init()
1228 		ring = &adev->sdma.instance[i].ring;  in sdma_v5_0_sw_init()
1241 				     &adev->sdma.trap_irq,  in sdma_v5_0_sw_init()
1257 	for (i = 0; i < adev->sdma.num_instances; i++)  in sdma_v5_0_sw_fini()
1258 		amdgpu_ring_fini(&adev->sdma.instance[i].ring);  in sdma_v5_0_sw_fini()
1307 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_is_idle()
1416 			amdgpu_fence_process(&adev->sdma.instance[0].ring);  in sdma_v5_0_process_trap_irq()
1432 			amdgpu_fence_process(&adev->sdma.instance[1].ring);  in sdma_v5_0_process_trap_irq()
1462 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_update_medium_grain_clock_gating()
1499 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_update_medium_grain_light_sleep()
1625 	for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_set_ring_funcs()
1626 		adev->sdma.instance[i].ring.funcs = &sdma_v5_0_ring_funcs;  in sdma_v5_0_set_ring_funcs()
1627 		adev->sdma.instance[i].ring.me = i;  in sdma_v5_0_set_ring_funcs()
1642 	adev->sdma.trap_irq.num_types = AMDGPU_SDMA_IRQ_INSTANCE0 +  in sdma_v5_0_set_irq_funcs()
1643 					adev->sdma.num_instances;  in sdma_v5_0_set_irq_funcs()
1644 	adev->sdma.trap_irq.funcs = &sdma_v5_0_trap_irq_funcs;  in sdma_v5_0_set_irq_funcs()
1645 	adev->sdma.illegal_inst_irq.funcs = &sdma_v5_0_illegal_inst_irq_funcs;  in sdma_v5_0_set_irq_funcs()
1711 		adev->mman.buffer_funcs_ring = &adev->sdma.instance[0].ring;  in sdma_v5_0_set_buffer_funcs()
1729 		for (i = 0; i < adev->sdma.num_instances; i++) {  in sdma_v5_0_set_vm_pte_funcs()
1730 			sched = &adev->sdma.instance[i].ring.sched;  in sdma_v5_0_set_vm_pte_funcs()
1734 		adev->vm_manager.vm_pte_num_rqs = adev->sdma.num_instances;  in sdma_v5_0_set_vm_pte_funcs()