Lines Matching refs:sdma
363 struct sdma_engine *sdma; member
617 static inline u32 chnenbl_ofs(struct sdma_engine *sdma, unsigned int event) in chnenbl_ofs() argument
619 u32 chnenbl0 = sdma->drvdata->chnenbl0; in chnenbl_ofs()
626 struct sdma_engine *sdma = sdmac->sdma; in sdma_config_ownership() local
633 evt = readl_relaxed(sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
634 mcu = readl_relaxed(sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
635 dsp = readl_relaxed(sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
652 writel_relaxed(evt, sdma->regs + SDMA_H_EVTOVR); in sdma_config_ownership()
653 writel_relaxed(mcu, sdma->regs + SDMA_H_HOSTOVR); in sdma_config_ownership()
654 writel_relaxed(dsp, sdma->regs + SDMA_H_DSPOVR); in sdma_config_ownership()
659 static void sdma_enable_channel(struct sdma_engine *sdma, int channel) in sdma_enable_channel() argument
661 writel(BIT(channel), sdma->regs + SDMA_H_START); in sdma_enable_channel()
667 static int sdma_run_channel0(struct sdma_engine *sdma) in sdma_run_channel0() argument
672 sdma_enable_channel(sdma, 0); in sdma_run_channel0()
674 ret = readl_relaxed_poll_timeout_atomic(sdma->regs + SDMA_H_STATSTOP, in sdma_run_channel0()
677 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); in sdma_run_channel0()
680 reg = readl(sdma->regs + SDMA_H_CONFIG); in sdma_run_channel0()
683 writel_relaxed(reg, sdma->regs + SDMA_H_CONFIG); in sdma_run_channel0()
689 static int sdma_load_script(struct sdma_engine *sdma, void *buf, int size, in sdma_load_script() argument
692 struct sdma_buffer_descriptor *bd0 = sdma->bd0; in sdma_load_script()
698 buf_virt = dma_alloc_coherent(sdma->dev, size, &buf_phys, GFP_KERNEL); in sdma_load_script()
703 spin_lock_irqsave(&sdma->channel_0_lock, flags); in sdma_load_script()
713 ret = sdma_run_channel0(sdma); in sdma_load_script()
715 spin_unlock_irqrestore(&sdma->channel_0_lock, flags); in sdma_load_script()
717 dma_free_coherent(sdma->dev, size, buf_virt, buf_phys); in sdma_load_script()
724 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_enable() local
727 u32 chnenbl = chnenbl_ofs(sdma, event); in sdma_event_enable()
729 val = readl_relaxed(sdma->regs + chnenbl); in sdma_event_enable()
731 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_enable()
736 struct sdma_engine *sdma = sdmac->sdma; in sdma_event_disable() local
738 u32 chnenbl = chnenbl_ofs(sdma, event); in sdma_event_disable()
741 val = readl_relaxed(sdma->regs + chnenbl); in sdma_event_disable()
743 writel_relaxed(val, sdma->regs + chnenbl); in sdma_event_disable()
755 struct sdma_engine *sdma = sdmac->sdma; in sdma_start_desc() local
770 sdma->channel_control[channel].base_bd_ptr = desc->bd_phys; in sdma_start_desc()
771 sdma->channel_control[channel].current_bd_ptr = desc->bd_phys; in sdma_start_desc()
772 sdma_enable_channel(sdma, sdmac->channel); in sdma_start_desc()
852 struct sdma_engine *sdma = dev_id; in sdma_int_handler() local
855 stat = readl_relaxed(sdma->regs + SDMA_H_INTR); in sdma_int_handler()
856 writel_relaxed(stat, sdma->regs + SDMA_H_INTR); in sdma_int_handler()
862 struct sdma_channel *sdmac = &sdma->channel[channel]; in sdma_int_handler()
890 struct sdma_engine *sdma = sdmac->sdma; in sdma_get_pc() local
905 emi_2_emi = sdma->script_addrs->ap_2_ap_addr; in sdma_get_pc()
908 emi_2_per = sdma->script_addrs->bp_2_ap_addr; in sdma_get_pc()
909 per_2_emi = sdma->script_addrs->ap_2_bp_addr; in sdma_get_pc()
912 per_2_emi = sdma->script_addrs->firi_2_mcu_addr; in sdma_get_pc()
913 emi_2_per = sdma->script_addrs->mcu_2_firi_addr; in sdma_get_pc()
916 per_2_emi = sdma->script_addrs->uart_2_mcu_addr; in sdma_get_pc()
917 emi_2_per = sdma->script_addrs->mcu_2_app_addr; in sdma_get_pc()
920 per_2_emi = sdma->script_addrs->uartsh_2_mcu_addr; in sdma_get_pc()
921 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
924 per_2_emi = sdma->script_addrs->ata_2_mcu_addr; in sdma_get_pc()
925 emi_2_per = sdma->script_addrs->mcu_2_ata_addr; in sdma_get_pc()
931 per_2_emi = sdma->script_addrs->app_2_mcu_addr; in sdma_get_pc()
932 emi_2_per = sdma->script_addrs->mcu_2_app_addr; in sdma_get_pc()
935 per_2_emi = sdma->script_addrs->ssish_2_mcu_addr; in sdma_get_pc()
936 emi_2_per = sdma->script_addrs->mcu_2_ssish_addr; in sdma_get_pc()
944 per_2_emi = sdma->script_addrs->shp_2_mcu_addr; in sdma_get_pc()
945 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
948 per_2_emi = sdma->script_addrs->asrc_2_mcu_addr; in sdma_get_pc()
949 emi_2_per = sdma->script_addrs->asrc_2_mcu_addr; in sdma_get_pc()
950 per_2_per = sdma->script_addrs->per_2_per_addr; in sdma_get_pc()
953 per_2_emi = sdma->script_addrs->shp_2_mcu_addr; in sdma_get_pc()
954 emi_2_per = sdma->script_addrs->mcu_2_shp_addr; in sdma_get_pc()
955 per_2_per = sdma->script_addrs->per_2_per_addr; in sdma_get_pc()
958 per_2_emi = sdma->script_addrs->mshc_2_mcu_addr; in sdma_get_pc()
959 emi_2_per = sdma->script_addrs->mcu_2_mshc_addr; in sdma_get_pc()
962 per_2_emi = sdma->script_addrs->dptc_dvfs_addr; in sdma_get_pc()
965 per_2_emi = sdma->script_addrs->spdif_2_mcu_addr; in sdma_get_pc()
966 emi_2_per = sdma->script_addrs->mcu_2_spdif_addr; in sdma_get_pc()
969 emi_2_per = sdma->script_addrs->ext_mem_2_ipu_addr; in sdma_get_pc()
983 struct sdma_engine *sdma = sdmac->sdma; in sdma_load_context() local
986 struct sdma_context_data *context = sdma->context; in sdma_load_context()
987 struct sdma_buffer_descriptor *bd0 = sdma->bd0; in sdma_load_context()
1006 dev_dbg(sdma->dev, "load_address = %d\n", load_address); in sdma_load_context()
1007 dev_dbg(sdma->dev, "wml = 0x%08x\n", (u32)sdmac->watermark_level); in sdma_load_context()
1008 dev_dbg(sdma->dev, "shp_addr = 0x%08x\n", sdmac->shp_addr); in sdma_load_context()
1009 dev_dbg(sdma->dev, "per_addr = 0x%08x\n", sdmac->per_addr); in sdma_load_context()
1010 dev_dbg(sdma->dev, "event_mask0 = 0x%08x\n", (u32)sdmac->event_mask[0]); in sdma_load_context()
1011 dev_dbg(sdma->dev, "event_mask1 = 0x%08x\n", (u32)sdmac->event_mask[1]); in sdma_load_context()
1013 spin_lock_irqsave(&sdma->channel_0_lock, flags); in sdma_load_context()
1030 bd0->buffer_addr = sdma->context_phys; in sdma_load_context()
1032 ret = sdma_run_channel0(sdma); in sdma_load_context()
1034 spin_unlock_irqrestore(&sdma->channel_0_lock, flags); in sdma_load_context()
1049 struct sdma_engine *sdma = sdmac->sdma; in sdma_disable_channel() local
1052 writel_relaxed(BIT(channel), sdma->regs + SDMA_H_STATSTOP); in sdma_disable_channel()
1103 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_watermarklevel_for_p2p() local
1130 if (sdmac->per_address2 >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1131 sdmac->per_address2 <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1134 if (sdmac->per_address >= sdma->spba_start_addr && in sdma_set_watermarklevel_for_p2p()
1135 sdmac->per_address <= sdma->spba_end_addr) in sdma_set_watermarklevel_for_p2p()
1192 struct sdma_engine *sdma = sdmac->sdma; in sdma_set_channel_priority() local
1200 writel_relaxed(priority, sdma->regs + SDMA_CHNPRI_0 + 4 * channel); in sdma_set_channel_priority()
1205 static int sdma_request_channel0(struct sdma_engine *sdma) in sdma_request_channel0() argument
1209 sdma->bd0 = dma_alloc_coherent(sdma->dev, PAGE_SIZE, &sdma->bd0_phys, in sdma_request_channel0()
1211 if (!sdma->bd0) { in sdma_request_channel0()
1216 sdma->channel_control[0].base_bd_ptr = sdma->bd0_phys; in sdma_request_channel0()
1217 sdma->channel_control[0].current_bd_ptr = sdma->bd0_phys; in sdma_request_channel0()
1219 sdma_set_channel_priority(&sdma->channel[0], MXC_SDMA_DEFAULT_PRIORITY); in sdma_request_channel0()
1232 desc->bd = dma_alloc_coherent(desc->sdmac->sdma->dev, bd_size, in sdma_alloc_bd()
1246 dma_free_coherent(desc->sdmac->sdma->dev, bd_size, desc->bd, in sdma_free_bd()
1275 dev_dbg(sdmac->sdma->dev, "MEMCPY in case?\n"); in sdma_alloc_chan_resources()
1302 ret = clk_enable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1305 ret = clk_enable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1316 clk_disable(sdmac->sdma->clk_ahb); in sdma_alloc_chan_resources()
1318 clk_disable(sdmac->sdma->clk_ipg); in sdma_alloc_chan_resources()
1325 struct sdma_engine *sdma = sdmac->sdma; in sdma_free_chan_resources() local
1341 clk_disable(sdma->clk_ipg); in sdma_free_chan_resources()
1342 clk_disable(sdma->clk_ahb); in sdma_free_chan_resources()
1388 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_memcpy() local
1398 dev_dbg(sdma->dev, "memcpy: %pad->%pad, len=%zu, channel=%d.\n", in sdma_prep_memcpy()
1428 dev_dbg(sdma->dev, "entry %d: count: %zd dma: 0x%x %s%s\n", in sdma_prep_memcpy()
1445 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_slave_sg() local
1457 dev_dbg(sdma->dev, "setting up %d entries for channel %d.\n", in sdma_prep_slave_sg()
1469 dev_err(sdma->dev, "SDMA channel %d: maximum bytes for sg entry exceeded: %d > %d\n", in sdma_prep_slave_sg()
1506 dev_dbg(sdma->dev, "entry %d: count: %d dma: %#llx %s%s\n", in sdma_prep_slave_sg()
1529 struct sdma_engine *sdma = sdmac->sdma; in sdma_prep_dma_cyclic() local
1535 dev_dbg(sdma->dev, "%s channel: %d\n", __func__, channel); in sdma_prep_dma_cyclic()
1548 dev_err(sdma->dev, "SDMA channel %d: maximum period size exceeded: %zu > %d\n", in sdma_prep_dma_cyclic()
1572 dev_dbg(sdma->dev, "entry %d: count: %zu dma: %#llx %s%s\n", in sdma_prep_dma_cyclic()
1632 if (sdmac->event_id0 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1638 if (sdmac->event_id1 >= sdmac->sdma->drvdata->num_events) in sdma_config()
1699 static void sdma_add_scripts(struct sdma_engine *sdma, in sdma_add_scripts() argument
1703 s32 *saddr_arr = (u32 *)sdma->script_addrs; in sdma_add_scripts()
1707 if (!sdma->script_number) in sdma_add_scripts()
1708 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; in sdma_add_scripts()
1710 if (sdma->script_number > sizeof(struct sdma_script_start_addrs) in sdma_add_scripts()
1712 dev_err(sdma->dev, in sdma_add_scripts()
1714 sdma->script_number); in sdma_add_scripts()
1718 for (i = 0; i < sdma->script_number; i++) in sdma_add_scripts()
1725 struct sdma_engine *sdma = context; in sdma_load_firmware() local
1731 dev_info(sdma->dev, "external firmware not found, using ROM firmware\n"); in sdma_load_firmware()
1747 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V1; in sdma_load_firmware()
1750 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V2; in sdma_load_firmware()
1753 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V3; in sdma_load_firmware()
1756 sdma->script_number = SDMA_SCRIPT_ADDRS_ARRAY_SIZE_V4; in sdma_load_firmware()
1759 dev_err(sdma->dev, "unknown firmware version\n"); in sdma_load_firmware()
1766 clk_enable(sdma->clk_ipg); in sdma_load_firmware()
1767 clk_enable(sdma->clk_ahb); in sdma_load_firmware()
1769 sdma_load_script(sdma, ram_code, in sdma_load_firmware()
1772 clk_disable(sdma->clk_ipg); in sdma_load_firmware()
1773 clk_disable(sdma->clk_ahb); in sdma_load_firmware()
1775 sdma_add_scripts(sdma, addr); in sdma_load_firmware()
1777 dev_info(sdma->dev, "loaded firmware %d.%d\n", in sdma_load_firmware()
1787 static int sdma_event_remap(struct sdma_engine *sdma) in sdma_event_remap() argument
1789 struct device_node *np = sdma->dev->of_node; in sdma_event_remap()
1803 dev_dbg(sdma->dev, "no event needs to be remapped\n"); in sdma_event_remap()
1806 dev_err(sdma->dev, "the property %s must modulo %d\n", in sdma_event_remap()
1814 dev_err(sdma->dev, "failed to get gpr regmap\n"); in sdma_event_remap()
1822 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1829 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1836 dev_err(sdma->dev, "failed to read property %s index %d\n", in sdma_event_remap()
1851 static int sdma_get_firmware(struct sdma_engine *sdma, in sdma_get_firmware() argument
1857 FW_ACTION_HOTPLUG, fw_name, sdma->dev, in sdma_get_firmware()
1858 GFP_KERNEL, sdma, sdma_load_firmware); in sdma_get_firmware()
1863 static int sdma_init(struct sdma_engine *sdma) in sdma_init() argument
1868 ret = clk_enable(sdma->clk_ipg); in sdma_init()
1871 ret = clk_enable(sdma->clk_ahb); in sdma_init()
1875 if (sdma->drvdata->check_ratio && in sdma_init()
1876 (clk_get_rate(sdma->clk_ahb) == clk_get_rate(sdma->clk_ipg))) in sdma_init()
1877 sdma->clk_ratio = 1; in sdma_init()
1880 writel_relaxed(0, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1882 sdma->channel_control = dma_alloc_coherent(sdma->dev, in sdma_init()
1887 if (!sdma->channel_control) { in sdma_init()
1892 sdma->context = (void *)sdma->channel_control + in sdma_init()
1894 sdma->context_phys = ccb_phys + in sdma_init()
1898 for (i = 0; i < sdma->drvdata->num_events; i++) in sdma_init()
1899 writel_relaxed(0, sdma->regs + chnenbl_ofs(sdma, i)); in sdma_init()
1903 writel_relaxed(0, sdma->regs + SDMA_CHNPRI_0 + i * 4); in sdma_init()
1905 ret = sdma_request_channel0(sdma); in sdma_init()
1909 sdma_config_ownership(&sdma->channel[0], false, true, false); in sdma_init()
1912 writel_relaxed(0x4050, sdma->regs + SDMA_CHN0ADDR); in sdma_init()
1915 if (sdma->clk_ratio) in sdma_init()
1916 writel_relaxed(SDMA_H_CONFIG_ACR, sdma->regs + SDMA_H_CONFIG); in sdma_init()
1918 writel_relaxed(0, sdma->regs + SDMA_H_CONFIG); in sdma_init()
1920 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); in sdma_init()
1923 sdma_set_channel_priority(&sdma->channel[0], 7); in sdma_init()
1925 clk_disable(sdma->clk_ipg); in sdma_init()
1926 clk_disable(sdma->clk_ahb); in sdma_init()
1931 clk_disable(sdma->clk_ahb); in sdma_init()
1933 clk_disable(sdma->clk_ipg); in sdma_init()
1934 dev_err(sdma->dev, "initialisation failed with %d\n", ret); in sdma_init()
1955 struct sdma_engine *sdma = ofdma->of_dma_data; in sdma_xlate() local
1956 dma_cap_mask_t mask = sdma->dma_device.cap_mask; in sdma_xlate()
1991 struct sdma_engine *sdma; in sdma_probe() local
2009 sdma = devm_kzalloc(&pdev->dev, sizeof(*sdma), GFP_KERNEL); in sdma_probe()
2010 if (!sdma) in sdma_probe()
2013 spin_lock_init(&sdma->channel_0_lock); in sdma_probe()
2015 sdma->dev = &pdev->dev; in sdma_probe()
2016 sdma->drvdata = drvdata; in sdma_probe()
2023 sdma->regs = devm_ioremap_resource(&pdev->dev, iores); in sdma_probe()
2024 if (IS_ERR(sdma->regs)) in sdma_probe()
2025 return PTR_ERR(sdma->regs); in sdma_probe()
2027 sdma->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); in sdma_probe()
2028 if (IS_ERR(sdma->clk_ipg)) in sdma_probe()
2029 return PTR_ERR(sdma->clk_ipg); in sdma_probe()
2031 sdma->clk_ahb = devm_clk_get(&pdev->dev, "ahb"); in sdma_probe()
2032 if (IS_ERR(sdma->clk_ahb)) in sdma_probe()
2033 return PTR_ERR(sdma->clk_ahb); in sdma_probe()
2035 ret = clk_prepare(sdma->clk_ipg); in sdma_probe()
2039 ret = clk_prepare(sdma->clk_ahb); in sdma_probe()
2044 sdma); in sdma_probe()
2048 sdma->irq = irq; in sdma_probe()
2050 sdma->script_addrs = kzalloc(sizeof(*sdma->script_addrs), GFP_KERNEL); in sdma_probe()
2051 if (!sdma->script_addrs) { in sdma_probe()
2057 saddr_arr = (s32 *)sdma->script_addrs; in sdma_probe()
2061 dma_cap_set(DMA_SLAVE, sdma->dma_device.cap_mask); in sdma_probe()
2062 dma_cap_set(DMA_CYCLIC, sdma->dma_device.cap_mask); in sdma_probe()
2063 dma_cap_set(DMA_MEMCPY, sdma->dma_device.cap_mask); in sdma_probe()
2065 INIT_LIST_HEAD(&sdma->dma_device.channels); in sdma_probe()
2068 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_probe()
2070 sdmac->sdma = sdma; in sdma_probe()
2082 vchan_init(&sdmac->vc, &sdma->dma_device); in sdma_probe()
2085 ret = sdma_init(sdma); in sdma_probe()
2089 ret = sdma_event_remap(sdma); in sdma_probe()
2093 if (sdma->drvdata->script_addrs) in sdma_probe()
2094 sdma_add_scripts(sdma, sdma->drvdata->script_addrs); in sdma_probe()
2096 sdma_add_scripts(sdma, pdata->script_addrs); in sdma_probe()
2098 sdma->dma_device.dev = &pdev->dev; in sdma_probe()
2100 sdma->dma_device.device_alloc_chan_resources = sdma_alloc_chan_resources; in sdma_probe()
2101 sdma->dma_device.device_free_chan_resources = sdma_free_chan_resources; in sdma_probe()
2102 sdma->dma_device.device_tx_status = sdma_tx_status; in sdma_probe()
2103 sdma->dma_device.device_prep_slave_sg = sdma_prep_slave_sg; in sdma_probe()
2104 sdma->dma_device.device_prep_dma_cyclic = sdma_prep_dma_cyclic; in sdma_probe()
2105 sdma->dma_device.device_config = sdma_config; in sdma_probe()
2106 sdma->dma_device.device_terminate_all = sdma_disable_channel_async; in sdma_probe()
2107 sdma->dma_device.device_synchronize = sdma_channel_synchronize; in sdma_probe()
2108 sdma->dma_device.src_addr_widths = SDMA_DMA_BUSWIDTHS; in sdma_probe()
2109 sdma->dma_device.dst_addr_widths = SDMA_DMA_BUSWIDTHS; in sdma_probe()
2110 sdma->dma_device.directions = SDMA_DMA_DIRECTIONS; in sdma_probe()
2111 sdma->dma_device.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT; in sdma_probe()
2112 sdma->dma_device.device_prep_dma_memcpy = sdma_prep_memcpy; in sdma_probe()
2113 sdma->dma_device.device_issue_pending = sdma_issue_pending; in sdma_probe()
2114 sdma->dma_device.dev->dma_parms = &sdma->dma_parms; in sdma_probe()
2115 sdma->dma_device.copy_align = 2; in sdma_probe()
2116 dma_set_max_seg_size(sdma->dma_device.dev, SDMA_BD_MAX_CNT); in sdma_probe()
2118 platform_set_drvdata(pdev, sdma); in sdma_probe()
2120 ret = dma_async_device_register(&sdma->dma_device); in sdma_probe()
2127 ret = of_dma_controller_register(np, sdma_xlate, sdma); in sdma_probe()
2136 sdma->spba_start_addr = spba_res.start; in sdma_probe()
2137 sdma->spba_end_addr = spba_res.end; in sdma_probe()
2149 ret = sdma_get_firmware(sdma, pdata->fw_name); in sdma_probe()
2163 ret = sdma_get_firmware(sdma, fw_name); in sdma_probe()
2172 dma_async_device_unregister(&sdma->dma_device); in sdma_probe()
2174 kfree(sdma->script_addrs); in sdma_probe()
2176 clk_unprepare(sdma->clk_ahb); in sdma_probe()
2178 clk_unprepare(sdma->clk_ipg); in sdma_probe()
2184 struct sdma_engine *sdma = platform_get_drvdata(pdev); in sdma_remove() local
2187 devm_free_irq(&pdev->dev, sdma->irq, sdma); in sdma_remove()
2188 dma_async_device_unregister(&sdma->dma_device); in sdma_remove()
2189 kfree(sdma->script_addrs); in sdma_remove()
2190 clk_unprepare(sdma->clk_ahb); in sdma_remove()
2191 clk_unprepare(sdma->clk_ipg); in sdma_remove()
2194 struct sdma_channel *sdmac = &sdma->channel[i]; in sdma_remove()