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Searched refs:iommu (Results 1 – 25 of 259) sorted by relevance

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/Linux-v5.10/drivers/iommu/amd/
Dinit.c260 bool translation_pre_enabled(struct amd_iommu *iommu) in translation_pre_enabled() argument
262 return (iommu->flags & AMD_IOMMU_FLAG_TRANS_PRE_ENABLED); in translation_pre_enabled()
266 static void clear_translation_pre_enabled(struct amd_iommu *iommu) in clear_translation_pre_enabled() argument
268 iommu->flags &= ~AMD_IOMMU_FLAG_TRANS_PRE_ENABLED; in clear_translation_pre_enabled()
271 static void init_translation_status(struct amd_iommu *iommu) in init_translation_status() argument
275 ctrl = readq(iommu->mmio_base + MMIO_CONTROL_OFFSET); in init_translation_status()
277 iommu->flags |= AMD_IOMMU_FLAG_TRANS_PRE_ENABLED; in init_translation_status()
301 static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address) in iommu_read_l1() argument
305 pci_write_config_dword(iommu->dev, 0xf8, (address | l1 << 16)); in iommu_read_l1()
306 pci_read_config_dword(iommu->dev, 0xfc, &val); in iommu_read_l1()
[all …]
Diommu.c276 struct amd_iommu *iommu = amd_iommu_rlookup_table[devid]; in find_dev_data() local
285 if (translation_pre_enabled(iommu)) in find_dev_data()
397 struct amd_iommu *iommu; in iommu_init_device() local
399 iommu = amd_iommu_rlookup_table[dev_data->devid]; in iommu_init_device()
400 dev_data->iommu_v2 = iommu->is_iommu_v2; in iommu_init_device()
573 static void iommu_print_event(struct amd_iommu *iommu, void *__evt) in iommu_print_event() argument
575 struct device *dev = iommu->iommu.dev; in iommu_print_event()
662 static void iommu_poll_events(struct amd_iommu *iommu) in iommu_poll_events() argument
666 head = readl(iommu->mmio_base + MMIO_EVT_HEAD_OFFSET); in iommu_poll_events()
667 tail = readl(iommu->mmio_base + MMIO_EVT_TAIL_OFFSET); in iommu_poll_events()
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/Linux-v5.10/arch/sparc/kernel/
Diommu.c52 struct iommu *iommu = container_of(iommu_map_table, struct iommu, tbl); in iommu_flushall() local
53 if (iommu->iommu_flushinv) { in iommu_flushall()
54 iommu_write(iommu->iommu_flushinv, ~(u64)0); in iommu_flushall()
59 tag = iommu->iommu_tags; in iommu_flushall()
66 (void) iommu_read(iommu->write_complete_reg); in iommu_flushall()
80 #define IOPTE_IS_DUMMY(iommu, iopte) \ argument
81 ((iopte_val(*iopte) & IOPTE_PAGE) == (iommu)->dummy_page_pa)
83 static inline void iopte_make_dummy(struct iommu *iommu, iopte_t *iopte) in iopte_make_dummy() argument
88 val |= iommu->dummy_page_pa; in iopte_make_dummy()
93 int iommu_table_init(struct iommu *iommu, int tsbsize, in iommu_table_init() argument
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Diommu-common.c19 static inline bool need_flush(struct iommu_map_table *iommu) in need_flush() argument
21 return ((iommu->flags & IOMMU_NEED_FLUSH) != 0); in need_flush()
24 static inline void set_flush(struct iommu_map_table *iommu) in set_flush() argument
26 iommu->flags |= IOMMU_NEED_FLUSH; in set_flush()
29 static inline void clear_flush(struct iommu_map_table *iommu) in clear_flush() argument
31 iommu->flags &= ~IOMMU_NEED_FLUSH; in clear_flush()
52 void iommu_tbl_pool_init(struct iommu_map_table *iommu, in iommu_tbl_pool_init() argument
60 struct iommu_pool *p = &(iommu->large_pool); in iommu_tbl_pool_init()
64 iommu->nr_pools = IOMMU_NR_POOLS; in iommu_tbl_pool_init()
66 iommu->nr_pools = npools; in iommu_tbl_pool_init()
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Dsbus.c62 struct iommu *iommu = dev->archdata.iommu; in sbus_set_sbus64() local
77 cfg_reg = iommu->write_complete_reg; in sbus_set_sbus64()
212 struct iommu *iommu = op->dev.archdata.iommu; in sbus_build_irq() local
213 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sbus_build_irq()
274 struct iommu *iommu = op->dev.archdata.iommu; in sysio_ue_handler() local
275 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_ue_handler()
348 struct iommu *iommu = op->dev.archdata.iommu; in sysio_ce_handler() local
349 unsigned long reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_ce_handler()
427 struct iommu *iommu = op->dev.archdata.iommu; in sysio_sbus_error_handler() local
432 reg_base = iommu->write_complete_reg - 0x2000UL; in sysio_sbus_error_handler()
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/Linux-v5.10/drivers/iommu/
Drockchip-iommu.c107 struct iommu_device iommu; member
115 struct rk_iommu *iommu; member
285 static void rk_iommu_command(struct rk_iommu *iommu, u32 command) in rk_iommu_command() argument
289 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_command()
290 writel(command, iommu->bases[i] + RK_MMU_COMMAND); in rk_iommu_command()
297 static void rk_iommu_zap_lines(struct rk_iommu *iommu, dma_addr_t iova_start, in rk_iommu_zap_lines() argument
306 for (i = 0; i < iommu->num_mmu; i++) { in rk_iommu_zap_lines()
310 rk_iommu_write(iommu->bases[i], RK_MMU_ZAP_ONE_LINE, iova); in rk_iommu_zap_lines()
314 static bool rk_iommu_is_stall_active(struct rk_iommu *iommu) in rk_iommu_is_stall_active() argument
319 for (i = 0; i < iommu->num_mmu; i++) in rk_iommu_is_stall_active()
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Dsun50i-iommu.c97 struct iommu_device iommu; member
122 struct sun50i_iommu *iommu; member
135 static u32 iommu_read(struct sun50i_iommu *iommu, u32 offset) in iommu_read() argument
137 return readl(iommu->base + offset); in iommu_read()
140 static void iommu_write(struct sun50i_iommu *iommu, u32 offset, u32 value) in iommu_write() argument
142 writel(value, iommu->base + offset); in iommu_write()
291 struct sun50i_iommu *iommu = sun50i_domain->iommu; in sun50i_table_flush() local
295 dma_sync_single_for_device(iommu->dev, dma, size, DMA_TO_DEVICE); in sun50i_table_flush()
298 static int sun50i_iommu_flush_all_tlb(struct sun50i_iommu *iommu) in sun50i_iommu_flush_all_tlb() argument
303 assert_spin_locked(&iommu->iommu_lock); in sun50i_iommu_flush_all_tlb()
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Dmsm_iommu.c55 static int __enable_clocks(struct msm_iommu_dev *iommu) in __enable_clocks() argument
59 ret = clk_enable(iommu->pclk); in __enable_clocks()
63 if (iommu->clk) { in __enable_clocks()
64 ret = clk_enable(iommu->clk); in __enable_clocks()
66 clk_disable(iommu->pclk); in __enable_clocks()
72 static void __disable_clocks(struct msm_iommu_dev *iommu) in __disable_clocks() argument
74 if (iommu->clk) in __disable_clocks()
75 clk_disable(iommu->clk); in __disable_clocks()
76 clk_disable(iommu->pclk); in __disable_clocks()
121 struct msm_iommu_dev *iommu = NULL; in __flush_iotlb() local
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Diommu-sysfs.c54 int iommu_device_sysfs_add(struct iommu_device *iommu, in iommu_device_sysfs_add() argument
62 iommu->dev = kzalloc(sizeof(*iommu->dev), GFP_KERNEL); in iommu_device_sysfs_add()
63 if (!iommu->dev) in iommu_device_sysfs_add()
66 device_initialize(iommu->dev); in iommu_device_sysfs_add()
68 iommu->dev->class = &iommu_class; in iommu_device_sysfs_add()
69 iommu->dev->parent = parent; in iommu_device_sysfs_add()
70 iommu->dev->groups = groups; in iommu_device_sysfs_add()
73 ret = kobject_set_name_vargs(&iommu->dev->kobj, fmt, vargs); in iommu_device_sysfs_add()
78 ret = device_add(iommu->dev); in iommu_device_sysfs_add()
82 dev_set_drvdata(iommu->dev, iommu); in iommu_device_sysfs_add()
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DMakefile3 obj-$(CONFIG_IOMMU_API) += iommu.o
4 obj-$(CONFIG_IOMMU_API) += iommu-traces.o
5 obj-$(CONFIG_IOMMU_API) += iommu-sysfs.o
6 obj-$(CONFIG_IOMMU_DEBUGFS) += iommu-debugfs.o
7 obj-$(CONFIG_IOMMU_DMA) += dma-iommu.o
19 obj-$(CONFIG_OMAP_IOMMU) += omap-iommu.o
20 obj-$(CONFIG_OMAP_IOMMU_DEBUG) += omap-iommu-debug.o
21 obj-$(CONFIG_ROCKCHIP_IOMMU) += rockchip-iommu.o
22 obj-$(CONFIG_SUN50I_IOMMU) += sun50i-iommu.o
25 obj-$(CONFIG_EXYNOS_IOMMU) += exynos-iommu.o
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/Linux-v5.10/drivers/iommu/intel/
Dirq_remapping.c33 struct intel_iommu *iommu; member
40 struct intel_iommu *iommu; member
47 struct intel_iommu *iommu; member
83 static void iommu_disable_irq_remapping(struct intel_iommu *iommu);
86 static bool ir_pre_enabled(struct intel_iommu *iommu) in ir_pre_enabled() argument
88 return (iommu->flags & VTD_FLAG_IRQ_REMAP_PRE_ENABLED); in ir_pre_enabled()
91 static void clear_ir_pre_enabled(struct intel_iommu *iommu) in clear_ir_pre_enabled() argument
93 iommu->flags &= ~VTD_FLAG_IRQ_REMAP_PRE_ENABLED; in clear_ir_pre_enabled()
96 static void init_ir_status(struct intel_iommu *iommu) in init_ir_status() argument
100 gsts = readl(iommu->reg + DMAR_GSTS_REG); in init_ir_status()
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Ddmar.c65 static void free_iommu(struct intel_iommu *iommu);
462 if (dmaru->iommu) in dmar_free_drhd()
463 free_iommu(dmaru->iommu); in dmar_free_drhd()
502 drhd->iommu->node = node; in dmar_parse_one_rhsa()
932 x86_init.iommu.iommu_init = intel_iommu_init; in detect_intel_iommu()
947 static void unmap_iommu(struct intel_iommu *iommu) in unmap_iommu() argument
949 iounmap(iommu->reg); in unmap_iommu()
950 release_mem_region(iommu->reg_phys, iommu->reg_size); in unmap_iommu()
961 static int map_iommu(struct intel_iommu *iommu, u64 phys_addr) in map_iommu() argument
965 iommu->reg_phys = phys_addr; in map_iommu()
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Diommu.c414 static bool translation_pre_enabled(struct intel_iommu *iommu) in translation_pre_enabled() argument
416 return (iommu->flags & VTD_FLAG_TRANS_PRE_ENABLED); in translation_pre_enabled()
419 static void clear_translation_pre_enabled(struct intel_iommu *iommu) in clear_translation_pre_enabled() argument
421 iommu->flags &= ~VTD_FLAG_TRANS_PRE_ENABLED; in clear_translation_pre_enabled()
424 static void init_translation_status(struct intel_iommu *iommu) in init_translation_status() argument
428 gsts = readl(iommu->reg + DMAR_GSTS_REG); in init_translation_status()
430 iommu->flags |= VTD_FLAG_TRANS_PRE_ENABLED; in init_translation_status()
479 static struct dmar_domain* get_iommu_domain(struct intel_iommu *iommu, u16 did) in get_iommu_domain() argument
484 domains = iommu->domains[idx]; in get_iommu_domain()
491 static void set_iommu_domain(struct intel_iommu *iommu, u16 did, in set_iommu_domain() argument
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Dpasid.c30 int vcmd_alloc_pasid(struct intel_iommu *iommu, u32 *pasid) in vcmd_alloc_pasid() argument
37 raw_spin_lock_irqsave(&iommu->register_lock, flags); in vcmd_alloc_pasid()
38 dmar_writeq(iommu->reg + DMAR_VCMD_REG, VCMD_CMD_ALLOC); in vcmd_alloc_pasid()
39 IOMMU_WAIT_OP(iommu, DMAR_VCRSP_REG, dmar_readq, in vcmd_alloc_pasid()
41 raw_spin_unlock_irqrestore(&iommu->register_lock, flags); in vcmd_alloc_pasid()
49 pr_info("IOMMU: %s: No PASID available\n", iommu->name); in vcmd_alloc_pasid()
55 iommu->name, status_code); in vcmd_alloc_pasid()
61 void vcmd_free_pasid(struct intel_iommu *iommu, u32 pasid) in vcmd_free_pasid() argument
67 raw_spin_lock_irqsave(&iommu->register_lock, flags); in vcmd_free_pasid()
68 dmar_writeq(iommu->reg + DMAR_VCMD_REG, in vcmd_free_pasid()
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Dsvm.c31 int intel_svm_enable_prq(struct intel_iommu *iommu) in intel_svm_enable_prq() argument
39 iommu->name); in intel_svm_enable_prq()
42 iommu->prq = page_address(pages); in intel_svm_enable_prq()
44 irq = dmar_alloc_hwirq(DMAR_UNITS_SUPPORTED + iommu->seq_id, iommu->node, iommu); in intel_svm_enable_prq()
47 iommu->name); in intel_svm_enable_prq()
50 free_pages((unsigned long)iommu->prq, PRQ_ORDER); in intel_svm_enable_prq()
51 iommu->prq = NULL; in intel_svm_enable_prq()
54 iommu->pr_irq = irq; in intel_svm_enable_prq()
56 snprintf(iommu->prq_name, sizeof(iommu->prq_name), "dmar%d-prq", iommu->seq_id); in intel_svm_enable_prq()
59 iommu->prq_name, iommu); in intel_svm_enable_prq()
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Ddebugfs.c113 struct intel_iommu *iommu; in iommu_regset_show() local
119 for_each_active_iommu(iommu, drhd) { in iommu_regset_show()
127 iommu->name, drhd->reg_base_addr); in iommu_regset_show()
133 raw_spin_lock_irqsave(&iommu->register_lock, flag); in iommu_regset_show()
135 value = dmar_readl(iommu->reg + iommu_regs_32[i].offset); in iommu_regset_show()
141 value = dmar_readq(iommu->reg + iommu_regs_64[i].offset); in iommu_regset_show()
146 raw_spin_unlock_irqrestore(&iommu->register_lock, flag); in iommu_regset_show()
214 static void ctx_tbl_walk(struct seq_file *m, struct intel_iommu *iommu, u16 bus) in ctx_tbl_walk() argument
236 context = iommu_context_addr(iommu, bus, devfn, 0); in ctx_tbl_walk()
245 tbl_wlk.rt_entry = &iommu->root_entry[bus]; in ctx_tbl_walk()
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/Linux-v5.10/drivers/vfio/
Dvfio_iommu_type1.c130 #define IS_IOMMU_CAP_DOMAIN_IN_CONTAINER(iommu) \ argument
131 (!list_empty(&iommu->domain_list))
148 static struct vfio_group *vfio_iommu_find_iommu_group(struct vfio_iommu *iommu,
151 static void update_pinned_page_dirty_scope(struct vfio_iommu *iommu);
157 static struct vfio_dma *vfio_find_dma(struct vfio_iommu *iommu, in vfio_find_dma() argument
160 struct rb_node *node = iommu->dma_list.rb_node; in vfio_find_dma()
176 static void vfio_link_dma(struct vfio_iommu *iommu, struct vfio_dma *new) in vfio_link_dma() argument
178 struct rb_node **link = &iommu->dma_list.rb_node, *parent = NULL; in vfio_link_dma()
192 rb_insert_color(&new->node, &iommu->dma_list); in vfio_link_dma()
195 static void vfio_unlink_dma(struct vfio_iommu *iommu, struct vfio_dma *old) in vfio_unlink_dma() argument
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/Linux-v5.10/Documentation/devicetree/bindings/pci/
Dpci-iommu.txt26 Documentation/devicetree/bindings/iommu/iommu.txt.
35 - iommu-map: Maps a Requester ID to an IOMMU and associated IOMMU specifier
39 (rid-base,iommu,iommu-base,length).
42 the listed IOMMU, with the IOMMU specifier (r - rid-base + iommu-base).
44 - iommu-map-mask: A mask to be applied to each Requester ID prior to being
45 mapped to an IOMMU specifier per the iommu-map property.
55 iommu: iommu@a {
57 compatible = "vendor,some-iommu";
58 #iommu-cells = <1>;
70 iommu-map = <0x0 &iommu 0x0 0x10000>;
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/Linux-v5.10/arch/powerpc/platforms/cell/
Diommu.c102 struct cbe_iommu *iommu; member
129 static void invalidate_tce_cache(struct cbe_iommu *iommu, unsigned long *pte, in invalidate_tce_cache() argument
136 reg = iommu->xlate_regs + IOC_IOPT_CacheInvd; in invalidate_tce_cache()
193 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_build_cell()
216 __pa(window->iommu->pad_page) | in tce_free_cell()
227 invalidate_tce_cache(window->iommu, io_pte, npages); in tce_free_cell()
233 struct cbe_iommu *iommu = data; in ioc_interrupt() local
235 stat = in_be64(iommu->xlate_regs + IOC_IO_ExcpStat); in ioc_interrupt()
251 out_be64(iommu->xlate_regs + IOC_IO_ExcpStat, stat); in ioc_interrupt()
296 static void cell_iommu_setup_stab(struct cbe_iommu *iommu, in cell_iommu_setup_stab() argument
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/Linux-v5.10/Documentation/devicetree/bindings/media/
Dmediatek-vcodec.txt21 argument, see Documentation/devicetree/bindings/iommu/mediatek,iommu.txt
46 iommus = <&iommu M4U_PORT_HW_VDEC_MC_EXT>,
47 <&iommu M4U_PORT_HW_VDEC_PP_EXT>,
48 <&iommu M4U_PORT_HW_VDEC_AVC_MV_EXT>,
49 <&iommu M4U_PORT_HW_VDEC_PRED_RD_EXT>,
50 <&iommu M4U_PORT_HW_VDEC_PRED_WR_EXT>,
51 <&iommu M4U_PORT_HW_VDEC_UFO_EXT>,
52 <&iommu M4U_PORT_HW_VDEC_VLD_EXT>,
53 <&iommu M4U_PORT_HW_VDEC_VLD2_EXT>;
91 iommus = <&iommu M4U_PORT_VENC_RCPU>,
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/Linux-v5.10/Documentation/devicetree/bindings/iommu/
Dqcom,iommu.txt12 "qcom,msm8916-iommu"
14 Followed by "qcom,msm-iommu-v1".
27 - #iommu-cells : Must be 1. Index identifies the context-bank #.
29 - ranges : Base address and size of the iommu context banks.
31 - qcom,iommu-secure-id : secure-id.
37 - "qcom,msm-iommu-v1-ns" : non-secure context bank
38 - "qcom,msm-iommu-v1-sec" : secure context bank
39 - reg : Base address and size of context bank within the iommu
45 be only specified if the iommu requires configuration
47 secure lines. (Ie. if the iommu contains secure
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/Linux-v5.10/arch/sparc/mm/
Diommu.c59 struct iommu_struct *iommu; in sbus_iommu_init() local
66 iommu = kmalloc(sizeof(struct iommu_struct), GFP_KERNEL); in sbus_iommu_init()
67 if (!iommu) { in sbus_iommu_init()
72 iommu->regs = of_ioremap(&op->resource[0], 0, PAGE_SIZE * 3, in sbus_iommu_init()
74 if (!iommu->regs) { in sbus_iommu_init()
79 control = sbus_readl(&iommu->regs->control); in sbus_iommu_init()
84 sbus_writel(control, &iommu->regs->control); in sbus_iommu_init()
86 iommu_invalidate(iommu->regs); in sbus_iommu_init()
87 iommu->start = IOMMU_START; in sbus_iommu_init()
88 iommu->end = 0xffffffff; in sbus_iommu_init()
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/Linux-v5.10/drivers/gpu/drm/msm/
Dmsm_iommu.c85 struct msm_iommu *iommu = to_msm_iommu(pagetable->parent); in msm_iommu_pagetable_destroy() local
93 if (atomic_dec_return(&iommu->pagetables) == 0) in msm_iommu_pagetable_destroy()
149 struct msm_iommu *iommu = to_msm_iommu(parent); in msm_iommu_pagetable_create() local
176 &ttbr0_cfg, iommu->domain); in msm_iommu_pagetable_create()
187 if (atomic_inc_return(&iommu->pagetables) == 1) { in msm_iommu_pagetable_create()
214 struct msm_iommu *iommu = arg; in msm_fault_handler() local
215 if (iommu->base.handler) in msm_fault_handler()
216 return iommu->base.handler(iommu->base.arg, iova, flags); in msm_fault_handler()
223 struct msm_iommu *iommu = to_msm_iommu(mmu); in msm_iommu_detach() local
225 iommu_detach_device(iommu->domain, mmu->dev); in msm_iommu_detach()
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/Linux-v5.10/Documentation/ABI/testing/
Dsysfs-class-iommu-intel-iommu1 What: /sys/class/iommu/<iommu>/intel-iommu/address
8 intel-iommu with a DMAR DRHD table entry.
10 What: /sys/class/iommu/<iommu>/intel-iommu/cap
18 What: /sys/class/iommu/<iommu>/intel-iommu/ecap
26 What: /sys/class/iommu/<iommu>/intel-iommu/version
/Linux-v5.10/Documentation/devicetree/bindings/virtio/
Dmmio.txt11 Required properties for virtio-iommu:
13 - #iommu-cells: When the node corresponds to a virtio-iommu device, it is
14 linked to DMA masters using the "iommus" or "iommu-map"
15 properties [1][2]. #iommu-cells specifies the size of the
16 "iommus" property. For virtio-iommu #iommu-cells must be
22 have an "iommus" property [1]. Since virtio-iommu itself
24 node cannot have both an "#iommu-cells" and an "iommus"
38 viommu: iommu@3100 {
43 #iommu-cells = <1>
46 [1] Documentation/devicetree/bindings/iommu/iommu.txt
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