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Searched refs:IMX6QDL_CLK_LDB_DI1_SEL (Results 1 – 25 of 25) sorted by relevance

/Linux-v5.10/arch/arm/boot/dts/
Dimx6q-logicpd.dts62 <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
Dimx6qp.dtsi99 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
Dimx6dl.dtsi308 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
Dimx6-logicpd-som.dtsi31 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-savageboard.dtsi100 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6q.dtsi437 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
Dimx6q-bx50v3.dtsi398 <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
Dimx6qdl-nit6xlite.dtsi171 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-pico.dtsi162 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-nitrogen6x.dtsi229 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-gw52xx.dtsi180 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-gw53xx.dtsi180 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-nitrogen6_som2.dtsi244 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-sabresd.dtsi186 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-gw54xx.dtsi210 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6q-pistachio.dts171 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-nitrogen6_max.dtsi313 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-sabrelite.dtsi305 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-gw5904.dtsi193 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-sabreauto.dtsi260 <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
Dimx6qdl-gw5903.dtsi217 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-gw560x.dtsi270 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
Dimx6qdl-zii-rdu2.dtsi221 <&clks IMX6QDL_CLK_LDB_DI1_SEL>;
/Linux-v5.10/include/dt-bindings/clock/
Dimx6qdl-clock.h43 #define IMX6QDL_CLK_LDB_DI1_SEL 34 macro
/Linux-v5.10/drivers/clk/imx/
Dclk-imx6q.c208 child != IMX6QDL_CLK_LDB_DI1_SEL) in of_assigned_ldb_sels()
214 child == IMX6QDL_CLK_LDB_DI1_SEL, parent); in of_assigned_ldb_sels()
220 if (child == IMX6QDL_CLK_LDB_DI1_SEL) in of_assigned_ldb_sels()
653 …hws[IMX6QDL_CLK_LDB_DI1_SEL] = imx_clk_hw_mux_flags("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di… in imx6q_clocks_init()
663 …hws[IMX6QDL_CLK_LDB_DI1_SEL] = imx_clk_hw_mux_ldb("ldb_di1_sel", base + 0x2c, 12, 3, ldb_di_s… in imx6q_clocks_init()