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Searched refs:gfx (Results 1 – 25 of 72) sorted by relevance

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/Linux-v4.19/drivers/gpu/drm/amd/amdgpu/
Damdgpu_gfx.c45 i = ffs(adev->gfx.scratch.free_mask); in amdgpu_gfx_scratch_get()
46 if (i != 0 && i <= adev->gfx.scratch.num_reg) { in amdgpu_gfx_scratch_get()
48 adev->gfx.scratch.free_mask &= ~(1u << i); in amdgpu_gfx_scratch_get()
49 *reg = adev->gfx.scratch.reg_base + i; in amdgpu_gfx_scratch_get()
65 adev->gfx.scratch.free_mask |= 1u << (reg - adev->gfx.scratch.reg_base); in amdgpu_gfx_scratch_free()
125 return adev->gfx.mec.num_mec > 1; in amdgpu_gfx_is_multipipe_capable()
135 queue = i % adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_compute_queue_acquire()
136 pipe = (i / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_compute_queue_acquire()
137 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_compute_queue_acquire()
138 mec = (i / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_compute_queue_acquire()
[all …]
Dgfx_v9_0.c299 adev->gfx.scratch.num_reg = 8; in gfx_v9_0_scratch_init()
300 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v9_0_scratch_init()
301 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v9_0_scratch_init()
448 release_firmware(adev->gfx.pfp_fw); in gfx_v9_0_free_microcode()
449 adev->gfx.pfp_fw = NULL; in gfx_v9_0_free_microcode()
450 release_firmware(adev->gfx.me_fw); in gfx_v9_0_free_microcode()
451 adev->gfx.me_fw = NULL; in gfx_v9_0_free_microcode()
452 release_firmware(adev->gfx.ce_fw); in gfx_v9_0_free_microcode()
453 adev->gfx.ce_fw = NULL; in gfx_v9_0_free_microcode()
454 release_firmware(adev->gfx.rlc_fw); in gfx_v9_0_free_microcode()
[all …]
Dgfx_v7_0.c929 err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
932 err = amdgpu_ucode_validate(adev->gfx.pfp_fw); in gfx_v7_0_init_microcode()
937 err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
940 err = amdgpu_ucode_validate(adev->gfx.me_fw); in gfx_v7_0_init_microcode()
945 err = request_firmware(&adev->gfx.ce_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
948 err = amdgpu_ucode_validate(adev->gfx.ce_fw); in gfx_v7_0_init_microcode()
953 err = request_firmware(&adev->gfx.mec_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
956 err = amdgpu_ucode_validate(adev->gfx.mec_fw); in gfx_v7_0_init_microcode()
962 err = request_firmware(&adev->gfx.mec2_fw, fw_name, adev->dev); in gfx_v7_0_init_microcode()
965 err = amdgpu_ucode_validate(adev->gfx.mec2_fw); in gfx_v7_0_init_microcode()
[all …]
Dgfx_v6_0.c339 err = request_firmware(&adev->gfx.pfp_fw, fw_name, adev->dev); in gfx_v6_0_init_microcode()
342 err = amdgpu_ucode_validate(adev->gfx.pfp_fw); in gfx_v6_0_init_microcode()
345 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.pfp_fw->data; in gfx_v6_0_init_microcode()
346 adev->gfx.pfp_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()
347 adev->gfx.pfp_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
350 err = request_firmware(&adev->gfx.me_fw, fw_name, adev->dev); in gfx_v6_0_init_microcode()
353 err = amdgpu_ucode_validate(adev->gfx.me_fw); in gfx_v6_0_init_microcode()
356 cp_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_init_microcode()
357 adev->gfx.me_fw_version = le32_to_cpu(cp_hdr->header.ucode_version); in gfx_v6_0_init_microcode()
358 adev->gfx.me_feature_version = le32_to_cpu(cp_hdr->ucode_feature_version); in gfx_v6_0_init_microcode()
[all …]
Dgfx_v8_0.c828 adev->gfx.scratch.num_reg = 8; in gfx_v8_0_scratch_init()
829 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v8_0_scratch_init()
830 adev->gfx.scratch.free_mask = (1u << adev->gfx.scratch.num_reg) - 1; in gfx_v8_0_scratch_init()
943 release_firmware(adev->gfx.pfp_fw); in gfx_v8_0_free_microcode()
944 adev->gfx.pfp_fw = NULL; in gfx_v8_0_free_microcode()
945 release_firmware(adev->gfx.me_fw); in gfx_v8_0_free_microcode()
946 adev->gfx.me_fw = NULL; in gfx_v8_0_free_microcode()
947 release_firmware(adev->gfx.ce_fw); in gfx_v8_0_free_microcode()
948 adev->gfx.ce_fw = NULL; in gfx_v8_0_free_microcode()
949 release_firmware(adev->gfx.rlc_fw); in gfx_v8_0_free_microcode()
[all …]
Damdgpu_gfx.h68 bit += mec * adev->gfx.mec.num_pipe_per_mec in amdgpu_gfx_queue_to_bit()
69 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_queue_to_bit()
70 bit += pipe * adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_queue_to_bit()
79 *queue = bit % adev->gfx.mec.num_queue_per_pipe; in amdgpu_gfx_bit_to_queue()
80 *pipe = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_bit_to_queue()
81 % adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_bit_to_queue()
82 *mec = (bit / adev->gfx.mec.num_queue_per_pipe) in amdgpu_gfx_bit_to_queue()
83 / adev->gfx.mec.num_pipe_per_mec; in amdgpu_gfx_bit_to_queue()
90 adev->gfx.mec.queue_bitmap); in amdgpu_gfx_is_mec_queue_enabled()
Damdgpu_debugfs.c144 if ((sh_bank != 0xFFFFFFFF && sh_bank >= adev->gfx.config.max_sh_per_se) || in amdgpu_debugfs_process_reg_op()
145 (se_bank != 0xFFFFFFFF && se_bank >= adev->gfx.config.max_shader_engines)) in amdgpu_debugfs_process_reg_op()
485 config[no_regs++] = adev->gfx.config.max_shader_engines; in amdgpu_debugfs_gca_config_read()
486 config[no_regs++] = adev->gfx.config.max_tile_pipes; in amdgpu_debugfs_gca_config_read()
487 config[no_regs++] = adev->gfx.config.max_cu_per_sh; in amdgpu_debugfs_gca_config_read()
488 config[no_regs++] = adev->gfx.config.max_sh_per_se; in amdgpu_debugfs_gca_config_read()
489 config[no_regs++] = adev->gfx.config.max_backends_per_se; in amdgpu_debugfs_gca_config_read()
490 config[no_regs++] = adev->gfx.config.max_texture_channel_caches; in amdgpu_debugfs_gca_config_read()
491 config[no_regs++] = adev->gfx.config.max_gprs; in amdgpu_debugfs_gca_config_read()
492 config[no_regs++] = adev->gfx.config.max_gs_threads; in amdgpu_debugfs_gca_config_read()
[all …]
Damdgpu_kms.c203 fw_info->ver = adev->gfx.me_fw_version; in amdgpu_firmware_info()
204 fw_info->feature = adev->gfx.me_feature_version; in amdgpu_firmware_info()
207 fw_info->ver = adev->gfx.pfp_fw_version; in amdgpu_firmware_info()
208 fw_info->feature = adev->gfx.pfp_feature_version; in amdgpu_firmware_info()
211 fw_info->ver = adev->gfx.ce_fw_version; in amdgpu_firmware_info()
212 fw_info->feature = adev->gfx.ce_feature_version; in amdgpu_firmware_info()
215 fw_info->ver = adev->gfx.rlc_fw_version; in amdgpu_firmware_info()
216 fw_info->feature = adev->gfx.rlc_feature_version; in amdgpu_firmware_info()
219 fw_info->ver = adev->gfx.rlc_srlc_fw_version; in amdgpu_firmware_info()
220 fw_info->feature = adev->gfx.rlc_srlc_feature_version; in amdgpu_firmware_info()
[all …]
Damdgpu_atomfirmware.c345 adev->gfx.config.max_shader_engines = gfx_info->v24.gc_num_se; in amdgpu_atomfirmware_get_gfx_info()
346 adev->gfx.config.max_cu_per_sh = gfx_info->v24.gc_num_cu_per_sh; in amdgpu_atomfirmware_get_gfx_info()
347 adev->gfx.config.max_sh_per_se = gfx_info->v24.gc_num_sh_per_se; in amdgpu_atomfirmware_get_gfx_info()
348 adev->gfx.config.max_backends_per_se = gfx_info->v24.gc_num_rb_per_se; in amdgpu_atomfirmware_get_gfx_info()
349 adev->gfx.config.max_texture_channel_caches = gfx_info->v24.gc_num_tccs; in amdgpu_atomfirmware_get_gfx_info()
350 adev->gfx.config.max_gprs = le16_to_cpu(gfx_info->v24.gc_num_gprs); in amdgpu_atomfirmware_get_gfx_info()
351 adev->gfx.config.max_gs_threads = gfx_info->v24.gc_num_max_gs_thds; in amdgpu_atomfirmware_get_gfx_info()
352 adev->gfx.config.gs_vgt_table_depth = gfx_info->v24.gc_gs_table_depth; in amdgpu_atomfirmware_get_gfx_info()
353 adev->gfx.config.gs_prim_buffer_depth = in amdgpu_atomfirmware_get_gfx_info()
355 adev->gfx.config.double_offchip_lds_buf = in amdgpu_atomfirmware_get_gfx_info()
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Damdgpu_amdkfd.c154 .num_pipe_per_mec = adev->gfx.mec.num_pipe_per_mec, in amdgpu_amdkfd_device_init()
155 .num_queue_per_pipe = adev->gfx.mec.num_queue_per_pipe, in amdgpu_amdkfd_device_init()
165 adev->gfx.mec.queue_bitmap, in amdgpu_amdkfd_device_init()
169 if (adev->gfx.kiq.ring.ready) in amdgpu_amdkfd_device_init()
171 adev->gfx.kiq.ring.me - 1, in amdgpu_amdkfd_device_init()
172 adev->gfx.kiq.ring.pipe, in amdgpu_amdkfd_device_init()
173 adev->gfx.kiq.ring.queue), in amdgpu_amdkfd_device_init()
179 * adev->gfx.mec.num_pipe_per_mec in amdgpu_amdkfd_device_init()
180 * adev->gfx.mec.num_queue_per_pipe; in amdgpu_amdkfd_device_init()
392 if (adev->gfx.funcs->get_gpu_clock_counter) in get_gpu_clock_counter()
[all …]
Damdgpu_amdkfd_gfx_v9.c156 config->gb_addr_config = adev->gfx.config.gb_addr_config; in amdgpu_amdkfd_get_tile_config()
158 config->tile_config_ptr = adev->gfx.config.tile_mode_array; in amdgpu_amdkfd_get_tile_config()
160 ARRAY_SIZE(adev->gfx.config.tile_mode_array); in amdgpu_amdkfd_get_tile_config()
162 adev->gfx.config.macrotile_mode_array; in amdgpu_amdkfd_get_tile_config()
164 ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); in amdgpu_amdkfd_get_tile_config()
252 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
253 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
261 unsigned int bit = (pipe_id * adev->gfx.mec.num_queue_per_pipe + in get_queue_mask()
356 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
357 pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in kgd_init_interrupts()
[all …]
Damdgpu_amdkfd_gfx_v8.c115 config->gb_addr_config = adev->gfx.config.gb_addr_config; in get_tile_config()
116 config->num_banks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, in get_tile_config()
118 config->num_ranks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, in get_tile_config()
121 config->tile_config_ptr = adev->gfx.config.tile_mode_array; in get_tile_config()
123 ARRAY_SIZE(adev->gfx.config.tile_mode_array); in get_tile_config()
125 adev->gfx.config.macrotile_mode_array; in get_tile_config()
127 ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); in get_tile_config()
217 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
218 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
279 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
[all …]
Damdgpu_amdkfd_gfx_v7.c158 config->gb_addr_config = adev->gfx.config.gb_addr_config; in get_tile_config()
159 config->num_banks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, in get_tile_config()
161 config->num_ranks = REG_GET_FIELD(adev->gfx.config.mc_arb_ramcfg, in get_tile_config()
164 config->tile_config_ptr = adev->gfx.config.tile_mode_array; in get_tile_config()
166 ARRAY_SIZE(adev->gfx.config.tile_mode_array); in get_tile_config()
168 adev->gfx.config.macrotile_mode_array; in get_tile_config()
170 ARRAY_SIZE(adev->gfx.config.macrotile_mode_array); in get_tile_config()
259 uint32_t mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in acquire_queue()
260 uint32_t pipe = (pipe_id % adev->gfx.mec.num_pipe_per_mec); in acquire_queue()
320 mec = (pipe_id / adev->gfx.mec.num_pipe_per_mec) + 1; in kgd_init_interrupts()
[all …]
Damdgpu_cgs.c172 fw_version = adev->gfx.ce_fw_version; in amdgpu_get_firmware_version()
175 fw_version = adev->gfx.pfp_fw_version; in amdgpu_get_firmware_version()
178 fw_version = adev->gfx.me_fw_version; in amdgpu_get_firmware_version()
181 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
184 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
187 fw_version = adev->gfx.mec_fw_version; in amdgpu_get_firmware_version()
190 fw_version = adev->gfx.rlc_fw_version; in amdgpu_get_firmware_version()
Damdgpu_queue_mgr.c71 *out_ring = &adev->gfx.gfx_ring[ring]; in amdgpu_identity_map()
74 *out_ring = &adev->gfx.compute_ring[ring]; in amdgpu_identity_map()
237 ip_num_rings = adev->gfx.num_gfx_rings; in amdgpu_queue_mgr_map()
240 ip_num_rings = adev->gfx.num_compute_rings; in amdgpu_queue_mgr_map()
Damdgpu_ucode.c369 ucode->ucode_size = adev->gfx.rlc.save_restore_list_cntl_size_bytes; in amdgpu_ucode_init_single_fw()
370 memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_cntl, in amdgpu_ucode_init_single_fw()
373 ucode->ucode_size = adev->gfx.rlc.save_restore_list_gpm_size_bytes; in amdgpu_ucode_init_single_fw()
374 memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_gpm, in amdgpu_ucode_init_single_fw()
377 ucode->ucode_size = adev->gfx.rlc.save_restore_list_srm_size_bytes; in amdgpu_ucode_init_single_fw()
378 memcpy(ucode->kaddr, adev->gfx.rlc.save_restore_list_srm, in amdgpu_ucode_init_single_fw()
Damdgpu_device.c1430 adev->gfx.config.max_shader_engines = le32_to_cpu(gpu_info_fw->gc_num_se); in amdgpu_device_parse_gpu_info_fw()
1431 adev->gfx.config.max_cu_per_sh = le32_to_cpu(gpu_info_fw->gc_num_cu_per_sh); in amdgpu_device_parse_gpu_info_fw()
1432 adev->gfx.config.max_sh_per_se = le32_to_cpu(gpu_info_fw->gc_num_sh_per_se); in amdgpu_device_parse_gpu_info_fw()
1433 adev->gfx.config.max_backends_per_se = le32_to_cpu(gpu_info_fw->gc_num_rb_per_se); in amdgpu_device_parse_gpu_info_fw()
1434 adev->gfx.config.max_texture_channel_caches = in amdgpu_device_parse_gpu_info_fw()
1436 adev->gfx.config.max_gprs = le32_to_cpu(gpu_info_fw->gc_num_gprs); in amdgpu_device_parse_gpu_info_fw()
1437 adev->gfx.config.max_gs_threads = le32_to_cpu(gpu_info_fw->gc_num_max_gs_thds); in amdgpu_device_parse_gpu_info_fw()
1438 adev->gfx.config.gs_vgt_table_depth = le32_to_cpu(gpu_info_fw->gc_gs_table_depth); in amdgpu_device_parse_gpu_info_fw()
1439 adev->gfx.config.gs_prim_buffer_depth = le32_to_cpu(gpu_info_fw->gc_gsprim_buff_depth); in amdgpu_device_parse_gpu_info_fw()
1440 adev->gfx.config.double_offchip_lds_buf = in amdgpu_device_parse_gpu_info_fw()
[all …]
Damdgpu_ctx.c90 if (ring == &adev->gfx.kiq.ring) in amdgpu_ctx_init()
177 if (ctx->adev->rings[i] == &ctx->adev->gfx.kiq.ring) in amdgpu_ctx_do_release()
464 if (ctx->adev->rings[i] == &ctx->adev->gfx.kiq.ring) in amdgpu_ctx_mgr_entity_flush()
489 if (ctx->adev->rings[i] == &ctx->adev->gfx.kiq.ring) in amdgpu_ctx_mgr_entity_fini()
/Linux-v4.19/Documentation/devicetree/bindings/mfd/
Daspeed-gfx.txt8 - compatible: "aspeed,ast2500-gfx", "syscon"
14 gfx: display@1e6e6000 {
15 compatible = "aspeed,ast2500-gfx", "syscon";
/Linux-v4.19/drivers/gpu/drm/amd/powerplay/hwmgr/
Dvega10_powertune.c937 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_cac_driving_se_didt_config()
939 adev->gfx.rlc.funcs->enter_safe_mode(adev); in vega10_enable_cac_driving_se_didt_config()
964 adev->gfx.rlc.funcs->exit_safe_mode(adev); in vega10_enable_cac_driving_se_didt_config()
973 adev->gfx.rlc.funcs->enter_safe_mode(adev); in vega10_disable_cac_driving_se_didt_config()
977 adev->gfx.rlc.funcs->exit_safe_mode(adev); in vega10_disable_cac_driving_se_didt_config()
988 num_se = adev->gfx.config.max_shader_engines; in vega10_enable_psm_gc_didt_config()
990 adev->gfx.rlc.funcs->enter_safe_mode(adev); in vega10_enable_psm_gc_didt_config()
1009 adev->gfx.rlc.funcs->exit_safe_mode(adev); in vega10_enable_psm_gc_didt_config()
1026 adev->gfx.rlc.funcs->enter_safe_mode(adev); in vega10_disable_psm_gc_didt_config()
1030 adev->gfx.rlc.funcs->exit_safe_mode(adev); in vega10_disable_psm_gc_didt_config()
[all …]
/Linux-v4.19/arch/arm/boot/dts/
Daspeed-bmc-intel-s2600wf.dts114 &gfx {
119 aspeed,external-nodes = <&gfx &lhc>;
Daspeed-bmc-arm-centriq2400-rep.dts210 &gfx {
215 aspeed,external-nodes = <&gfx &lhc>;
/Linux-v4.19/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-aspeed.txt19 0: compatible with "aspeed,ast2500-gfx", "syscon"
129 aspeed,external-nodes = <&gfx &lhc>;
143 gfx: display@1e6e6000 {
144 compatible = "aspeed,ast2500-gfx", "syscon";
/Linux-v4.19/drivers/video/
Dvgastate.c29 __u8 *gfx; member
251 saved->gfx[i] = vga_rgfx(state->vgabase, i); in save_vga_mode()
291 vga_wgfx(state->vgabase, i, saved->gfx[i]); in restore_vga_mode()
390 saved->gfx = saved->crtc + state->num_crtc; in save_vga()
391 saved->seq = saved->gfx + state->num_gfx; in save_vga()
/Linux-v4.19/arch/arm/mach-omap2/
Dcm2xxx.h63 extern void omap2xxx_cm_set_mod_dividers(u32 mpu, u32 dsp, u32 gfx, u32 core,

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