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/Linux-v6.1/Documentation/devicetree/bindings/gpio/
Dnvidia,tegra186-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NVIDIA Tegra GPIO Controller (Tegra186 and later)
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
14 Tegra186 contains two GPIO controllers; a main controller and an "AON"
20 The Tegra186 GPIO controller allows software to set the IO direction of,
21 and read/write the value of, numerous GPIO signals. Routing of GPIO signals
[all …]
/Linux-v6.1/arch/arm64/boot/dts/nvidia/
Dtegra186.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra186-clock.h>
3 #include <dt-bindings/gpio/tegra186-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/memory/tegra186-mc.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
8 #include <dt-bindings/power/tegra186-powergate.h>
9 #include <dt-bindings/reset/tegra186-reset.h>
10 #include <dt-bindings/thermal/tegra186-bpmp-thermal.h>
[all …]
Dtegra186-p3310.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include "tegra186.dtsi"
4 #include <dt-bindings/mfd/max77620.h>
8 compatible = "nvidia,p3310", "nvidia,tegra186";
27 stdout-path = "serial0:115200n8";
38 phy-reset-gpios = <&gpio TEGRA186_MAIN_GPIO(M, 4)
40 phy-handle = <&phy>;
41 phy-mode = "rgmii";
44 #address-cells = <1>;
45 #size-cells = <0>;
[all …]
Dtegra194.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/tegra194-clock.h>
3 #include <dt-bindings/gpio/tegra194-gpio.h>
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mailbox/tegra186-hsp.h>
6 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
7 #include <dt-bindings/pinctrl/pinctrl-tegra.h>
8 #include <dt-bindings/power/tegra194-powergate.h>
9 #include <dt-bindings/reset/tegra194-reset.h>
10 #include <dt-bindings/thermal/tegra194-bpmp-thermal.h>
[all …]
Dtegra186-p3509-0000+p3636-0001.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
6 #include <dt-bindings/mfd/max77620.h>
8 #include "tegra186.dtsi"
12 compatible = "nvidia,p3509-0000+p3636-0001", "nvidia,tegra186";
30 stdout-path = "serial0:115200n8";
41 phy-reset-gpios = <&gpio_aon TEGRA186_AON_GPIO(AA, 6) GPIO_ACTIVE_LOW>;
42 phy-handle = <&phy>;
[all …]
Dtegra234.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/clock/tegra234-clock.h>
4 #include <dt-bindings/gpio/tegra234-gpio.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/mailbox/tegra186-hsp.h>
7 #include <dt-bindings/memory/tegra234-mc.h>
8 #include <dt-bindings/power/tegra234-powergate.h>
9 #include <dt-bindings/reset/tegra234-reset.h>
13 interrupt-parent = <&gic>;
14 #address-cells = <2>;
[all …]
Dtegra186-p2771-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra186-p3310.dtsi"
11 compatible = "nvidia,p2771-0000", "nvidia,tegra186";
16 dma-controller@2930000 {
20 interrupt-controller@2a40000 {
28 #address-cells = <1>;
29 #size-cells = <0>;
[all …]
Dtegra194-p3509-0000.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include <dt-bindings/input/linux-event-codes.h>
4 #include <dt-bindings/input/gpio-keys.h>
11 dma-controller@2930000 {
15 interrupt-controller@2a40000 {
23 #address-cells = <1>;
24 #size-cells = <0>;
30 remote-endpoint = <&admaif0_ep>;
38 remote-endpoint = <&admaif1_ep>;
46 remote-endpoint = <&admaif2_ep>;
[all …]
Dtegra234-p3737-0000+p3701-0000.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/linux-event-codes.h>
5 #include <dt-bindings/input/gpio-keys.h>
7 #include "tegra234-p3701-0000.dtsi"
8 #include "tegra234-p3737-0000.dtsi"
12 compatible = "nvidia,p3737-0000+p3701-0000", "nvidia,p3701-0000", "nvidia,tegra234";
28 #address-cells = <1>;
29 #size-cells = <0>;
35 remote-endpoint = <&admaif0>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/display/tegra/
Dnvidia,tegra20-dsi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-dsi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
16 - enum:
17 - nvidia,tegra20-dsi
18 - nvidia,tegra30-dsi
19 - nvidia,tegra114-dsi
[all …]
Dnvidia,tegra124-sor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra124-sor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
19 pattern: "^sor@[0-9a-f]+$"
23 - enum:
24 - nvidia,tegra124-sor
25 - nvidia,tegra210-sor
[all …]
Dnvidia,tegra20-host1x.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
13 description: The host1x top-level node defines a number of children, each
19 - enum:
20 - nvidia,tegra20-host1x
21 - nvidia,tegra30-host1x
[all …]
/Linux-v6.1/drivers/gpio/
Dgpio-tegra186.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2016-2022 NVIDIA Corporation
9 #include <linux/gpio/driver.h>
17 #include <dt-bindings/gpio/tegra186-gpio.h>
18 #include <dt-bindings/gpio/tegra194-gpio.h>
19 #include <dt-bindings/gpio/tegra234-gpio.h>
20 #include <dt-bindings/gpio/tegra241-gpio.h>
86 struct gpio_chip gpio; member
99 tegra186_gpio_get_port(struct tegra_gpio *gpio, unsigned int *pin) in tegra186_gpio_get_port() argument
103 for (i = 0; i < gpio->soc->num_ports; i++) { in tegra186_gpio_get_port()
[all …]
DTODO1 This is a place for planning the ongoing long-term work in the GPIO
5 GPIO descriptors
7 Starting with commit 79a9becda894 the GPIO subsystem embarked on a journey
8 to move away from the global GPIO numberspace and toward a descriptor-based
9 approach. This means that GPIO consumers, drivers and machine descriptions
10 ideally have no use or idea of the global GPIO numberspace that has/was
11 used in the inception of the GPIO subsystem.
16 The underlying motivation for this is that the GPIO numberspace has become
18 establish the numberspace at compile-time, making it hard to add any numbers
23 Linux GPIO number as those descriptions are external to the Linux kernel
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # generic gpio support: platform drivers, dedicated expander chips, etc
4 ccflags-$(CONFIG_DEBUG_GPIO) += -DDEBUG
6 obj-$(CONFIG_GPIOLIB) += gpiolib.o
7 obj-$(CONFIG_GPIOLIB) += gpiolib-devres.o
8 obj-$(CONFIG_GPIOLIB) += gpiolib-legacy.o
9 obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
10 obj-$(CONFIG_GPIO_CDEV) += gpiolib-cdev.o
11 obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
12 obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # GPIO infrastructure and drivers
10 the architecture to provide a custom asm/gpio.h implementation
15 bool "GPIO Support"
17 This enables GPIO support through the generic GPIO library.
19 one or more of the GPIO drivers below.
51 bool "Debug GPIO calls"
54 Say Y here to add some extra checks and diagnostics to GPIO calls.
57 non-sleeping contexts. They can make bitbanged serial protocols
62 bool "/sys/class/gpio/... (sysfs interface)" if EXPERT
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dnvidia,tegra20-sdhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
23 - enum:
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dsnps,dwc-qos-ethernet.txt13 - compatible: One of:
14 - "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10"
15 Represents the IP core when integrated into the Axis ARTPEC-6 SoC.
16 - "nvidia,tegra186-eqos", "snps,dwc-qos-ethernet-4.10"
17 Represents the IP core when integrated into the NVIDIA Tegra186 SoC.
18 - "snps,dwc-qos-ethernet-4.10"
20 "axis,artpec6-eqos", "snps,dwc-qos-ethernet-4.10". It is supported to be
22 - reg: Address and length of the register set for the device
23 - clocks: Phandle and clock specifiers for each entry in clock-names, in the
24 same order. See ../clock/clock-bindings.txt.
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/usb/
Dnvidia,tegra-xudc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
14 - Nagarjuna Kristam <nkristam@nvidia.com>
15 - JC Kuo <jckuo@nvidia.com>
16 - Thierry Reding <treding@nvidia.com>
21 - enum:
22 - nvidia,tegra210-xudc # For Tegra210
23 - nvidia,tegra186-xudc # For Tegra186
[all …]
/Linux-v6.1/include/dt-bindings/gpio/
Dtegra186-gpio.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * This header provides constants for binding nvidia,tegra186-gpio*.
5 * The first cell in Tegra's GPIO specifier is the GPIO ID. The macros below
8 * The second cell contains standard flag values specified in gpio.h.
14 #include <dt-bindings/gpio/gpio.h>
16 /* GPIOs implemented by main GPIO controller */
44 /* GPIOs implemented by AON GPIO controller */
/Linux-v6.1/drivers/soc/tegra/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
4 # 32-bit ARM SoCs
63 # 64-bit ARM SoCs
75 Tegra124's "4+1" Cortex-A15 CPU complex.
85 the Tegra210 has four Cortex-A57 cores paired with four Cortex-A53
88 and providing 256 CUDA cores. It supports hardware-accelerated en-
93 controllers, such as GPIO, I2C, SPI, SDHCI, PCIe, SATA and XHCI, to
97 bool "NVIDIA Tegra186 SoC"
104 Enable support for the NVIDIA Tegar186 SoC. The Tegra186 features a
105 combination of Denver and Cortex-A57 CPU cores and a GPU based on
[all …]
Dpmc.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * Copyright (c) 2018-2022, NVIDIA CORPORATION. All rights reserved.
12 #define pr_fmt(fmt) "tegra-pmc: " fmt
14 #include <linux/arm-smccc.h>
16 #include <linux/clk-provider.h>
18 #include <linux/clk/clk-conf.h>
36 #include <linux/pinctrl/pinconf-generic.h>
54 #include <dt-bindings/interrupt-controller/arm-gic.h>
55 #include <dt-bindings/pinctrl/pinctrl-tegra-io-pad.h>
56 #include <dt-bindings/gpio/tegra186-gpio.h>
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/serial/
D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - if:
16 - required:
17 - aspeed,lpc-io-reg
18 - required:
19 - aspeed,lpc-interrupts
20 - required:
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dnvidia,tegra124-xusb-padctl.txt11 Some of the lanes are high-speed lanes, which can be used for PCIe, SATA or
12 super-speed USB. Other lanes are for various types of low-speed, full-speed
13 or high-speed USB (such as UTMI, ULPI and HSIC). The XUSB pad controller
14 contains a software-configurable mux that sits between the I/O controller
17 In addition to per-lane configuration, USB 3.0 ports may require additional
18 settings on a per-board basis.
20 Pads will be represented as children of the top-level XUSB pad controller
23 PHY bindings, as described by the phy-bindings.txt file in this directory.
34 --------------------
35 - compatible: Must be:
[all …]
/Linux-v6.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-dwc-qos-eth.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Synopsys DWC Ethernet Quality-of-Service v4.10a linux driver
9 #include <linux/clk-provider.h>
11 #include <linux/gpio/consumer.h>
43 struct device *dev = &pdev->dev; in dwc_eth_dwmac_config_dt()
48 if (!plat_dat->axi) { in dwc_eth_dwmac_config_dt()
49 plat_dat->axi = kzalloc(sizeof(struct stmmac_axi), GFP_KERNEL); in dwc_eth_dwmac_config_dt()
51 if (!plat_dat->axi) in dwc_eth_dwmac_config_dt()
52 return -ENOMEM; in dwc_eth_dwmac_config_dt()
55 plat_dat->axi->axi_lpi_en = device_property_read_bool(dev, in dwc_eth_dwmac_config_dt()
[all …]

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