Lines Matching +full:tegra186 +full:- +full:gpio
1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mmc/nvidia,tegra20-sdhci.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
18 mmc-controller.yaml and the properties for the Tegra SDHCI controller.
23 - enum:
24 - nvidia,tegra20-sdhci
25 - nvidia,tegra30-sdhci
26 - nvidia,tegra114-sdhci
27 - nvidia,tegra124-sdhci
28 - nvidia,tegra210-sdhci
29 - nvidia,tegra186-sdhci
30 - nvidia,tegra194-sdhci
32 - items:
33 - const: nvidia,tegra132-sdhci
34 - const: nvidia,tegra124-sdhci
36 - items:
37 - enum:
38 - nvidia,tegra194-sdhci
39 - nvidia,tegra234-sdhci
40 - const: nvidia,tegra186-sdhci
48 assigned-clocks: true
49 assigned-clock-parents: true
50 assigned-clock-rates: true
56 clock-names:
62 - description: module reset
64 reset-names:
66 - const: sdhci
68 power-gpios:
74 - description: memory read client
75 - description: memory write client
77 interconnect-names:
79 - const: dma-mem # read
80 - const: write
85 operating-points-v2:
88 power-domains:
90 - description: phandle to the core power domain
92 nvidia,default-tap:
94 non-tunable modes.
102 timing. Only SDMMC4 on Tegra210 and Tegra186 supports HS400.
105 nvidia,default-trim:
109 nvidia,dqs-trim:
113 nvidia,pad-autocal-pull-down-offset-1v8:
118 nvidia,pad-autocal-pull-down-offset-1v8-timeout:
123 nvidia,pad-autocal-pull-down-offset-3v3:
128 nvidia,pad-autocal-pull-down-offset-3v3-timeout:
133 nvidia,pad-autocal-pull-down-offset-sdr104:
137 nvidia,pad-autocal-pull-down-offset-hs400:
141 nvidia,pad-autocal-pull-up-offset-1v8:
146 nvidia,pad-autocal-pull-up-offset-1v8-timeout:
151 nvidia,pad-autocal-pull-up-offset-3v3:
163 nvidia,pad-autocal-pull-up-offset-3v3-timeout:
168 nvidia,pad-autocal-pull-up-offset-sdr104:
172 nvidia,pad-autocal-pull-up-offset-hs400:
176 nvidia,only-1-8v:
182 - compatible
183 - reg
184 - interrupts
185 - clocks
186 - resets
187 - reset-names
190 - $ref: "mmc-controller.yaml"
191 - if:
196 - nvidia,tegra20-sdhci
197 - nvidia,tegra30-sdhci
198 - nvidia,tegra114-sdhci
199 - nvidia,tegra124-sdhci
204 - description: module clock
209 - description: module clock
210 - description: timeout clock
212 clock-names:
214 - const: sdhci
215 - const: tmclk
217 - clock-names
219 - if:
223 const: nvidia,tegra210-sdhci
226 pinctrl-names:
228 - items:
229 - const: sdmmc-3v3
231 - const: sdmmc-1v8
233 - const: sdmmc-3v3-drv
234 description: pull-up/down configuration for 3.3 V
235 - const: sdmmc-1v8-drv
236 description: pull-up/down configuration for 1.8 V
237 - items:
238 - const: sdmmc-3v3-drv
239 description: pull-up/down configuration for 3.3 V
240 - const: sdmmc-1v8-drv
241 description: pull-up/down configuration for 1.8 V
242 - items:
243 - const: sdmmc-1v8-drv
244 description: pull-up/down configuration for 1.8 V
246 - clock-names
247 - if:
252 - nvidia,tegra186-sdhci
253 - nvidia,tegra194-sdhci
256 pinctrl-names:
258 - const: sdmmc-3v3
260 - const: sdmmc-1v8
263 - clock-names
268 - |
269 #include <dt-bindings/interrupt-controller/arm-gic.h>
272 compatible = "nvidia,tegra20-sdhci";
277 reset-names = "sdhci";
278 cd-gpios = <&gpio 69 0>; /* gpio PI5 */
279 wp-gpios = <&gpio 57 0>; /* gpio PH1 */
280 power-gpios = <&gpio 155 0>; /* gpio PT3 */
281 bus-width = <8>;
284 - |
285 #include <dt-bindings/clock/tegra210-car.h>
286 #include <dt-bindings/interrupt-controller/arm-gic.h>
289 compatible = "nvidia,tegra210-sdhci";
294 clock-names = "sdhci", "tmclk";
296 reset-names = "sdhci";
297 pinctrl-names = "sdmmc-3v3", "sdmmc-1v8",
298 "sdmmc-3v3-drv", "sdmmc-1v8-drv";
299 pinctrl-0 = <&sdmmc1_3v3>;
300 pinctrl-1 = <&sdmmc1_1v8>;
301 pinctrl-2 = <&sdmmc1_3v3_drv>;
302 pinctrl-3 = <&sdmmc1_1v8_drv>;
303 nvidia,pad-autocal-pull-up-offset-3v3 = <0x00>;
304 nvidia,pad-autocal-pull-down-offset-3v3 = <0x7d>;
305 nvidia,pad-autocal-pull-up-offset-1v8 = <0x7b>;
306 nvidia,pad-autocal-pull-down-offset-1v8 = <0x7b>;
307 nvidia,default-tap = <0x2>;
308 nvidia,default-trim = <0x4>;
309 assigned-clocks = <&tegra_car TEGRA210_CLK_SDMMC4>,
312 assigned-clock-parents = <&tegra_car TEGRA210_CLK_PLL_C4_OUT0>;
313 assigned-clock-rates = <200000000>, <1000000000>, <1000000000>;