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12

/Linux-v5.10/Documentation/devicetree/bindings/mfd/
Dqcom,tcsr.txt5 registers via syscon.
8 - compatible: Should contain:
9 "qcom,tcsr-ipq8064", "syscon" for IPQ8064
10 "qcom,tcsr-apq8064", "syscon" for APQ8064
11 "qcom,tcsr-msm8660", "syscon" for MSM8660
12 "qcom,tcsr-msm8960", "syscon" for MSM8960
13 "qcom,tcsr-msm8974", "syscon" for MSM8974
14 "qcom,tcsr-apq8084", "syscon" for APQ8084
15 "qcom,tcsr-msm8916", "syscon" for MSM8916
16 - reg: Address range for TCSR registers
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/soc/qcom/
Dqcom,gsbi.txt4 representing a serial sub-node device that is mux'd as part of the GSBI
9 - compatible: Should contain "qcom,gsbi-v1.0.0"
10 - cell-index: Should contain the GSBI index
11 - reg: Address range for GSBI registers
12 - clocks: required clock
13 - clock-names: must contain "iface" entry
14 - qcom,mode : indicates MUX value for configuration of the serial interface.
15 Please reference dt-bindings/soc/qcom,gsbi.h for valid mux values.
18 - qcom,crci : indicates CRCI MUX value for QUP CRCI ports. Please reference
19 dt-bindings/soc/qcom,gsbi.h for valid CRCI mux values.
[all …]
/Linux-v5.10/drivers/soc/qcom/
Dqcom_gsbi.c1 // SPDX-License-Identifier: GPL-2.0-only
14 #include <linux/mfd/syscon.h>
15 #include <dt-bindings/soc/qcom,gsbi.h>
83 { /* ADM 0 - B */
88 { /* ADM 0 - B */
93 { /* ADM 1 - A */
98 { /* ADM 1 - B */
114 struct regmap *tcsr; member
118 { .compatible = "qcom,tcsr-ipq8064", .data = &config_ipq8064},
119 { .compatible = "qcom,tcsr-apq8064", .data = &config_apq8064},
[all …]
Dcpr.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
24 #include <linux/mfd/syscon.h>
27 #include <linux/nvmem-consumer.h>
29 /* Register Offsets for RB-CPR and Bit Definitions */
125 #define FUSE_REVISION_UNKNOWN (-1)
237 struct regmap *tcsr; member
254 return !drv->loop_disabled; in cpr_is_allowed()
259 writel_relaxed(value, drv->base + offset); in cpr_write()
264 return readl_relaxed(drv->base + offset); in cpr_read()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dqcom-msm8660.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/irq.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8660.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
6 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
9 #include <dt-bindings/soc/qcom,gsbi.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #address-cells = <1>;
[all …]
Dqcom-msm8960.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
6 #include <dt-bindings/mfd/qcom-rpm.h>
7 #include <dt-bindings/soc/qcom,gsbi.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
14 interrupt-parent = <&intc>;
17 #address-cells = <1>;
[all …]
Dqcom-mdm9615.dtsi7 * This file is dual-licensed: you can use it either under the terms
46 /dts-v1/;
48 #include <dt-bindings/interrupt-controller/arm-gic.h>
49 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
50 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
51 #include <dt-bindings/mfd/qcom-rpm.h>
52 #include <dt-bindings/soc/qcom,gsbi.h>
55 #address-cells = <1>;
56 #size-cells = <1>;
59 interrupt-parent = <&intc>;
[all …]
Dqcom-apq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
5 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
6 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/soc/qcom,gsbi.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #address-cells = <1>;
[all …]
Dqcom-msm8974.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interconnect/qcom,msm8974.h>
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
10 #include <dt-bindings/gpio/gpio.h>
13 #address-cells = <1>;
[all …]
Dqcom-apq8084.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
6 #include <dt-bindings/gpio/gpio.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
13 interrupt-parent = <&intc>;
15 reserved-memory {
16 #address-cells = <1>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/phy/
Dqcom,qusb2-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/phy/qcom,qusb2-phy.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Manu Gautam <mgautam@codeaurora.org>
19 - items:
20 - enum:
21 - qcom,ipq8074-qusb2-phy
22 - qcom,msm8996-qusb2-phy
23 - qcom,msm8998-qusb2-phy
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/remoteproc/
Dqcom,q6v5.txt6 - compatible:
10 "qcom,q6v5-pil",
11 "qcom,ipq8074-wcss-pil"
12 "qcom,msm8916-mss-pil",
13 "qcom,msm8974-mss-pil"
14 "qcom,msm8996-mss-pil"
15 "qcom,msm8998-mss-pil"
16 "qcom,sc7180-mss-pil"
17 "qcom,sdm845-mss-pil"
19 - reg:
[all …]
Dqcom,hexagon-v56.txt6 - compatible:
10 "qcom,qcs404-cdsp-pil",
11 "qcom,sdm845-adsp-pil"
13 - reg:
15 Value type: <prop-encoded-array>
18 - interrupts-extended:
20 Value type: <prop-encoded-array>
22 stop-ack IRQs
24 - interrupt-names:
27 Definition: must be "wdog", "fatal", "ready", "handover", "stop-ack"
[all …]
/Linux-v5.10/drivers/phy/qualcomm/
Dphy-qcom-qusb2.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <linux/mfd/syscon.h>
13 #include <linux/nvmem-consumer.h>
23 #include <dt-bindings/phy/phy-qcom-qusb2.h>
105 * if yes, then offset gives index in the reg-layout
123 /* set of registers with offsets different per-PHY */
231 /* offset to PHY_CLK_SCHEME register in TCSR map */
287 "vdda-pll", "vdda-phy-dpdm",
292 /* struct override_param - structure holding qusb2 v2 phy overriding param
301 /*struct override_params - structure holding qusb2 v2 phy overriding params
[all …]
/Linux-v5.10/drivers/hwspinlock/
Dqcom_hwspinlock.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/mfd/syscon.h>
24 struct regmap_field *field = lock->priv; in qcom_hwspinlock_trylock()
41 struct regmap_field *field = lock->priv; in qcom_hwspinlock_unlock()
67 { .compatible = "qcom,sfpb-mutex" },
68 { .compatible = "qcom,tcsr-mutex" },
76 struct device_node *syscon; in qcom_hwspinlock_probe_syscon() local
80 syscon = of_parse_phandle(pdev->dev.of_node, "syscon", 0); in qcom_hwspinlock_probe_syscon()
81 if (!syscon) in qcom_hwspinlock_probe_syscon()
82 return ERR_PTR(-ENODEV); in qcom_hwspinlock_probe_syscon()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/power/avs/
Dqcom,cpr.txt10 - compatible:
13 Definition: should be "qcom,qcs404-cpr", "qcom,cpr" for qcs404
15 - reg:
17 Value type: <prop-encoded-array>
20 - interrupts:
22 Value type: <prop-encoded-array>
25 - clocks:
27 Value type: <prop-encoded-array>
30 - clock-names:
35 - vdd-apc-supply:
[all …]
/Linux-v5.10/drivers/clk/ingenic/
Dtcu.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
11 #include <linux/mfd/syscon.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
67 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
68 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
70 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
78 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
[all …]
/Linux-v5.10/arch/arm64/boot/dts/qcom/
Dqcs404.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
6 #include <dt-bindings/clock/qcom,turingcc-qcs404.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/power/qcom-rpmpd.h>
9 #include <dt-bindings/thermal/thermal.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
[all …]
Dipq6018.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
11 #include <dt-bindings/clock/qcom,apss-ipq.h>
14 #address-cells = <2>;
15 #size-cells = <2>;
16 interrupt-parent = <&intc>;
19 sleep_clk: sleep-clk {
20 compatible = "fixed-clock";
[all …]
Dmsm8916.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2015, The Linux Foundation. All rights reserved.
6 #include <dt-bindings/arm/coresight-cti-dt.h>
7 #include <dt-bindings/clock/qcom,gcc-msm8916.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/interconnect/qcom,msm8916.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/reset/qcom,gcc-msm8916.h>
12 #include <dt-bindings/thermal/thermal.h>
15 interrupt-parent = <&intc>;
[all …]
Dmsm8996.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8996.h>
7 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
8 #include <dt-bindings/clock/qcom,rpmcc.h>
9 #include <dt-bindings/soc/qcom,apr.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
[all …]
Dmsm8994.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
9 interrupt-parent = <&intc>;
11 #address-cells = <2>;
12 #size-cells = <2>;
18 compatible = "fixed-clock";
19 #clock-cells = <0>;
20 clock-frequency = <19200000>;
[all …]
Dsdm630.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
7 #include <dt-bindings/clock/qcom,rpmcc.h>
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 interrupt-parent = <&intc>;
14 #address-cells = <2>;
15 #size-cells = <2>;
21 compatible = "fixed-clock";
22 #clock-cells = <0>;
[all …]
/Linux-v5.10/drivers/remoteproc/
Dqcom_q6v5_adsp.c1 // SPDX-License-Identifier: GPL-2.0
14 #include <linux/mfd/syscon.h>
44 /*TCSR register offsets*/
108 val = readl(adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
110 writel(val, adsp->qdsp6ss_base + RET_CFG_REG); in qcom_adsp_shutdown()
112 clk_bulk_disable_unprepare(adsp->num_clks, adsp->clks); in qcom_adsp_shutdown()
115 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
116 adsp->halt_lpass + LPASS_PWR_ON_REG, &val); in qcom_adsp_shutdown()
120 ret = regmap_read(adsp->halt_map, in qcom_adsp_shutdown()
121 adsp->halt_lpass + LPASS_MASTER_IDLE_REG, in qcom_adsp_shutdown()
[all …]

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