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/Linux-v5.10/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Marc Zyngier <marc.zyngier@arm.com>
15 Software Generated Interrupts (SGI), and Locality-specific Peripheral
19 - $ref: /schemas/interrupt-controller.yaml#
24 - items:
25 - enum:
26 - qcom,msm8996-gic-v3
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/Linux-v5.10/drivers/irqchip/
Dirq-gic-v3-its.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved.
14 #include <linux/dma-iommu.h>
34 #include <linux/irqchip/arm-gic-v3.h>
35 #include <linux/irqchip/arm-gic-v4.h>
40 #include "irq-gic-common.h"
63 * Collection structure - just an ID, and a redistributor address to
73 * The ITS_BASER structure - contains memory information, cached
74 * value of BASER register configuration and ITS page size.
86 * The ITS structure - contains most of the infrastructure, with the
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/Linux-v5.10/arch/arm64/boot/dts/ti/
Dk3-j7200-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
21 scm_conf: scm-conf@100000 {
22 compatible = "ti,j721e-system-controller", "syscon", "simple-mfd";
24 #address-cells = <1>;
25 #size-cells = <1>;
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Dk3-am65-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2018 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy-am654-serdes.h>
11 compatible = "mmio-sram";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 atf-sram@0 {
21 sysfw-sram@f0000 {
25 l3cache-sram@100000 {
30 gic500: interrupt-controller@1800000 {
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Dk3-j721e-main.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2016-2019 Texas Instruments Incorporated - https://www.ti.com/
7 #include <dt-bindings/phy/phy.h>
8 #include <dt-bindings/mux/mux.h>
9 #include <dt-bindings/mux/ti-serdes.h>
13 compatible = "mmio-sram";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 atf-sram@0 {
24 scm_conf: scm-conf@100000 {
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/Linux-v5.10/arch/arm64/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
161 if $(cc-option,-fpatchable-function-entry=2)
205 ARM 64-bit (AArch64) Linux support.
237 # VA_BITS - PAGE_SHIFT - 3
330 def_bool !$(as-instr,1:\n.inst 0\n.rept . - 1b\n\nnop\n.endr\n)
357 …bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is acce…
362 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
365 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
371 data cache clean-and-invalidate.
379 …bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to th…
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/Linux-v5.10/
DMAINTAINERS9 -------------------------
19 chips on a board and not its name. (Don't laugh! Look at the
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
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