/Linux-v5.10/Documentation/devicetree/bindings/pwm/ |
D | pwm-samsung.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/pwm/pwm-samsung.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Samsung SoC PWM timers 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Krzysztof Kozlowski <krzk@kernel.org> 14 Samsung SoCs contain PWM timer blocks which can be used for system clock source 15 and clock event timers, as well as to drive SoC outputs with PWM signal. Each 16 PWM timer block provides 5 PWM channels (not all of them can drive physical [all …]
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D | nxp,pca9685-pwm.txt | 1 NXP PCA9685 16-channel 12-bit PWM LED controller 5 - compatible: "nxp,pca9685-pwm" 6 - #pwm-cells: Should be 2. See pwm.yaml in this directory for a description of 8 The index 16 is the ALLCALL channel, that sets all PWM channels at the same 12 - invert (bool): boolean to enable inverted logic 13 - open-drain (bool): boolean to configure outputs with open-drain structure; 14 if omitted use totem-pole structure 22 compatible = "nxp,pca9685-pwm"; 23 #pwm-cells = <2>; 26 open-drain;
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/Linux-v5.10/Documentation/hwmon/ |
D | dme1737.rst | 18 Addresses scanned: none, address read from Super-I/O config space 34 Addresses scanned: none, address read from Super-I/O config space 43 ----------------- 47 and PWM output control functions. Using this parameter 52 Include non-standard LPC addresses 0x162e and 0x164e 55 - VIA EPIA SN18000 59 ----------- 63 and SCH5127 Super-I/O chips. These chips feature monitoring of 3 temp sensors 64 temp[1-3] (2 remote diodes and 1 internal), 8 voltages in[0-7] (7 external and 65 1 internal) and up to 6 fan speeds fan[1-6]. Additionally, the chips implement [all …]
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D | lm85.rst | 79 - Philip Pokorny <ppokorny@penguincomputing.com>, 80 - Frodo Looijaard <frodol@dds.nl>, 81 - Richard Barrington <rich_b_nz@clear.net.nz>, 82 - Margit Schubert-While <margitsw@t-online.de>, 83 - Justin Thiessen <jthiessen@penguincomputing.com> 86 ----------- 92 The LM85 uses the 2-wire interface compatible with the SMBUS 2.0 94 temperatures and five (5) voltages. It has four (4) 16-bit counters for 96 VID signals from the processor to the VRM. Lastly, there are three (3) PWM 97 outputs that can be used to control fan speed. [all …]
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D | adt7470.rst | 17 ----------- 22 The ADT7470 uses the 2-wire interface compatible with the SMBus 2.0 24 external temperatures. It has four (4) 16-bit counters for measuring fan speed. 25 There are four (4) PWM outputs that can be used to control fan speed. 27 A sophisticated control system for the PWM outputs is designed into the ADT7470 29 temperature sensors. Each PWM output is individually adjustable and 30 programmable. Once configured, the ADT7470 will adjust the PWM outputs in 32 feature can also be disabled for manual control of the PWM's. 40 automatic fan pwm control to set the fan speed. The driver will not read the 45 ---------------- [all …]
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D | max31790.rst | 10 Addresses scanned: - 18 ----------- 23 PWM outputs. The desired fan speeds (or PWM duty cycles) are written 24 through the I2C interface. The outputs drive "4-wire" fans directly, 28 Tachometer inputs monitor fan tachometer logic outputs for precise (+/-1%) 30 Six pins are dedicated tachometer inputs. Any of the six PWM outputs can 35 ------------- 38 fan[1-12]_input RO fan tachometer speed in RPM 39 fan[1-12]_fault RO fan experienced fault 40 fan[1-6]_target RW desired fan speed in RPM [all …]
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D | adt7475.rst | 39 - Jordan Crouse 40 - Hans de Goede 41 - Darrick J. Wong (documentation) 42 - Jean Delvare 46 ----------- 56 The ADT747x uses the 2-wire interface compatible with the SMBus 2.0 58 temperatures and two (2) or more voltages. It has four (4) 16-bit counters 59 for measuring fan speed. There are three (3) PWM outputs that can be used 62 A sophisticated control system for the PWM outputs is designed into the 64 three temperature sensors. Each PWM output is individually adjustable and [all …]
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D | adt7462.rst | 17 ----------- 27 A sophisticated control system for the PWM outputs is designed into the ADT7462 29 temperature sensors. Each PWM output is individually adjustable and 30 programmable. Once configured, the ADT7462 will adjust the PWM outputs in 32 feature can also be disabled for manual control of the PWM's. 43 ---------------- 45 The ADT7462 have a 10-bit ADC and can therefore measure temperatures 49 determining an optimal configuration for the automatic PWM control. 55 ------------------- 59 * PWM Control [all …]
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D | asc7621.rst | 20 Andigilog has both the PECI and pre-PECI versions of the Heceta-6, as 21 Intel calls them. Heceta-6e has high frequency PWM and Heceta-6p has 23 Heceta-6e part and aSC7621 is the Heceta-6p part. They are both in 28 have used registers below 20h for vendor-specific functions in addition 29 to those in the Intel-specified vendor range. 32 The fan speed control uses this finer value to produce a "step-less" fan 33 PWM output. These two bytes are "read-locked" to guarantee that once a 34 high or low byte is read, the other byte is locked-in until after the 37 sheet says 10-bits of resolution, although you may find the lower bits 42 data sheet. Our temperature reports and fan PWM outputs are very smooth [all …]
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D | w83792d.rst | 10 Addresses scanned: I2C 0x2c - 0x2f 19 ----------------- 35 ----------- 42 parameter; this will put it into a more well-behaved state first. 48 The driver also implements up to seven fan control outputs: pwm1-7. Pwm1-7 49 can be configured to PWM output or Analogue DC output via their associated 50 pwmX_mode. Outputs pwm4 through pwm7 may or may not be present depending on 53 Automatic fan control mode is possible only for fan1-fan3. 55 For all pwmX outputs, a value of 0 means minimum fan speed and a value of 116 ---------------- [all …]
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D | w83793.rst | 10 Addresses scanned: I2C 0x2c - 0x2f 15 - Yuan Mu (Winbond Electronics) 16 - Rudolf Marek <r.marek@assembler.cz> 20 ----------------- 36 ----------- 42 6 remote temperatures, up to 8 sets of PWM fan controls, SmartFan 43 (automatic fan speed control) on all temperature/PWM combinations, 2 44 sets of 6-pin CPU VID input. 48 voltage0-2 is 2mV, resolution of voltage3/4/5 is 16mV, 8mV for voltage6, 49 24mV for voltage7/8. Temp1-4 have a 0.25 degree Celsius resolution, [all …]
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D | adm1026.rst | 16 - Philip Pokorny <ppokorny@penguincomputing.com> for Penguin Computing 17 - Justin Thiessen <jthiessen@penguincomputing.com> 20 ----------------- 23 List of GPIO pins (0-16) to program as inputs 26 List of GPIO pins (0-16) to program as outputs 29 List of GPIO pins (0-16) to program as inverted 32 List of GPIO pins (0-16) to program as normal/non-inverted 35 List of GPIO pins (0-7) to program as fan tachs 39 ----------- 45 16 general purpose digital I/O lines, eight (8) fan speed sensors (8-bit), [all …]
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D | lm93.rst | 10 Addresses scanned: I2C 0x2c-0x2e 18 Addresses scanned: I2C 0x2c-0x2e 24 - Mark M. Hoffman <mhoffman@lightlink.com> 25 - Ported to 2.6 by Eric J. Bowersox <ericb@aspsys.com> 26 - Adapted to 2.6.20 by Carsten Emde <ce@osadl.org> 27 - Modified for mainline integration by Hans J. Koch <hjk@hansjkoch.de> 30 ----------------- 33 Set to non-zero to force some initializations (default is 0). 38 Configures in7 and in8 limit type, where 0 means absolute and non-zero 54 -------------------- [all …]
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D | vt1211.rst | 10 Addresses scanned: none, address read from Super-I/O config space 24 ----------------- 29 configuration for channels 1-5. 30 Legal values are in the range of 0-31. Bit 0 maps to 47 ----------- 49 The VIA VT1211 Super-I/O chip includes complete hardware monitoring 52 implements 5 universal input channels (UCH1-5) that can be individually 60 connected to the PWM outputs of the VT1211 :-(). 80 ------------------ 82 Voltages are sampled by an 8-bit ADC with a LSB of ~10mV. The supported input [all …]
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D | pc87427.rst | 21 ----------- 28 This chip also has fan controlling features (up to 4 PWM outputs), 36 -------------- 38 Fan rotation speeds are reported as 14-bit values from a gated clock 47 ----------------- 49 Fan speed can be controlled by PWM outputs. There are 4 possible modes: 56 ---------------------- 60 connected. The integer part can be 8-bit or 9-bit, and can be signed or 62 temperature format, so user-space adjustment (typically by a factor 2)
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D | aspeed-pwm-tacho.rst | 1 Kernel driver aspeed-pwm-tacho 11 ------------ 12 This driver implements support for ASPEED AST2400/2500 PWM and Fan Tacho 13 controller. The PWM controller supports upto 8 PWM outputs. The Fan tacho 22 pwmX rw get or set PWM fan control value. This is an integer
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D | npcm750-pwm-fan.rst | 1 Kernel driver npcm750-pwm-fan 13 ------------ 14 This driver implements support for NUVOTON NPCM7XX PWM and Fan Tacho 15 controller. The PWM controller supports up to 8 PWM outputs. The Fan tacho 24 pwmX rw get or set PWM fan control value. This is an integer
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/Linux-v5.10/Documentation/devicetree/bindings/mfd/ |
D | st,stm32-timers.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 This hardware block provides 3 types of timer along with PWM functionality: 11 - advanced-control timers consist of a 16-bit auto-reload counter driven 12 by a programmable prescaler, break input feature, PWM outputs and 13 complementary PWM outputs channels. 14 - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter 15 driven by a programmable prescaler and PWM outputs. [all …]
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D | max77693.txt | 1 Maxim MAX77693 multi-function device 4 - PMIC, 5 - CHARGER, 6 - LED, 7 - MUIC, 8 - HAPTIC 14 - compatible : Must be "maxim,max77693". 15 - reg : Specifies the i2c slave address of PMIC block. 16 - interrupts : This i2c device has an IRQ line connected to the main SoC. 19 - regulators : The regulators of max77693 have to be instantiated under subnode [all …]
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/Linux-v5.10/drivers/pwm/ |
D | pwm-lp3943.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * TI/National Semiconductor LP3943 PWM driver 15 #include <linux/pwm.h> 36 struct lp3943_platform_data *pdata = lp3943_pwm->pdata; in lp3943_pwm_request_map() 37 struct lp3943 *lp3943 = lp3943_pwm->lp3943; in lp3943_pwm_request_map() 43 return ERR_PTR(-ENOMEM); in lp3943_pwm_request_map() 45 pwm_map->output = pdata->pwms[hwpwm]->output; in lp3943_pwm_request_map() 46 pwm_map->num_outputs = pdata->pwms[hwpwm]->num_outputs; in lp3943_pwm_request_map() 48 for (i = 0; i < pwm_map->num_outputs; i++) { in lp3943_pwm_request_map() 49 offset = pwm_map->output[i]; in lp3943_pwm_request_map() [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/hwmon/ |
D | aspeed-pwm-tacho.txt | 1 ASPEED AST2400/AST2500 PWM and Fan Tacho controller device driver 3 The ASPEED PWM controller can support upto 8 PWM outputs. The ASPEED Fan Tacho 6 There can be upto 8 fans supported. Each fan can have one PWM output and 9 Required properties for pwm-tacho node: 10 - #address-cells : should be 1. 12 - #size-cells : should be 1. 14 - #cooling-cells: should be 2. 16 - reg : address and length of the register set for the device. 18 - pinctrl-names : a pinctrl state named "default" must be defined. 20 - pinctrl-0 : phandle referencing pin configuration of the PWM ports. [all …]
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D | npcm750-pwm-fan.txt | 1 Nuvoton NPCM7xx PWM and Fan Tacho controller device 3 The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM) 4 controller outputs and 16 Fan tachometer controller inputs. 6 Required properties for pwm-fan node 7 - #address-cells : should be 1. 8 - #size-cells : should be 0. 9 - compatible : "nuvoton,npcm750-pwm-fan" for Poleg NPCM7XX. 10 - reg : specifies physical base address and size of the registers. 11 - reg-names : must contain: 12 * "pwm" for the PWM registers. [all …]
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D | adt7475.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Jean Delvare <jdelvare@suse.com> 23 https://www.onsemi.com/pub/Collateral/ADT7473-D.PDF 24 https://www.onsemi.com/pub/Collateral/ADT7475-D.PDF 25 https://www.onsemi.com/pub/Collateral/ADT7476-D.PDF 26 https://www.onsemi.com/pub/Collateral/ADT7490-D.PDF 34 - adi,adt7473 35 - adi,adt7475 [all …]
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/Linux-v5.10/arch/arm/boot/dts/ |
D | exynos5422-odroidxu4.dts | 1 // SPDX-License-Identifier: GPL-2.0 7 * Copyright (c) 2013-2015 Samsung Electronics Co., Ltd. 11 /dts-v1/; 12 #include <dt-bindings/sound/samsung-i2s.h> 13 #include "exynos5422-odroidxu3-common.dtsi" 17 compatible = "hardkernel,odroid-xu4", "samsung,exynos5800", \ 21 compatible = "pwm-leds"; 25 pwms = <&pwm 2 2000000 0>; 26 pwm-names = "pwm2"; 28 linux,default-trigger = "heartbeat"; [all …]
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/Linux-v5.10/drivers/clocksource/ |
D | samsung_pwm_timer.c | 1 // SPDX-License-Identifier: GPL-2.0-only 6 * samsung - Common hr-timer support (s3c and s5p) 80 static struct samsung_pwm_clocksource pwm; variable 93 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale() 95 reg |= (prescale - 1) << shift; in samsung_timer_set_prescale() 96 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale() 108 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor() 112 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor() 115 writel(reg, pwm.base + REG_TCFG1); in samsung_timer_set_divisor() 130 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_stop() [all …]
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