Lines Matching +full:pwm +full:- +full:outputs
1 // SPDX-License-Identifier: GPL-2.0-only
6 * samsung - Common hr-timer support (s3c and s5p)
80 static struct samsung_pwm_clocksource pwm; variable
93 reg = readl(pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
95 reg |= (prescale - 1) << shift; in samsung_timer_set_prescale()
96 writel(reg, pwm.base + REG_TCFG0); in samsung_timer_set_prescale()
108 bits = (fls(divisor) - 1) - pwm.variant.div_base; in samsung_timer_set_divisor()
112 reg = readl(pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
115 writel(reg, pwm.base + REG_TCFG1); in samsung_timer_set_divisor()
130 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_stop()
132 writel_relaxed(tcon, pwm.base + REG_TCON); in samsung_time_stop()
148 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_setup()
153 writel_relaxed(tcnt, pwm.base + REG_TCNTB(channel)); in samsung_time_setup()
154 writel_relaxed(tcnt, pwm.base + REG_TCMPB(channel)); in samsung_time_setup()
155 writel_relaxed(tcon, pwm.base + REG_TCON); in samsung_time_setup()
170 tcon = readl_relaxed(pwm.base + REG_TCON); in samsung_time_start()
180 writel_relaxed(tcon, pwm.base + REG_TCON); in samsung_time_start()
201 samsung_time_setup(pwm.event_id, cycles); in samsung_set_next_event()
202 samsung_time_start(pwm.event_id, false); in samsung_set_next_event()
209 samsung_time_stop(pwm.event_id); in samsung_shutdown()
215 samsung_time_stop(pwm.event_id); in samsung_set_periodic()
216 samsung_time_setup(pwm.event_id, pwm.clock_count_per_tick - 1); in samsung_set_periodic()
217 samsung_time_start(pwm.event_id, true); in samsung_set_periodic()
223 samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div); in samsung_clockevent_resume()
224 samsung_timer_set_divisor(pwm.event_id, pwm.tdiv); in samsung_clockevent_resume()
226 if (pwm.variant.has_tint_cstat) { in samsung_clockevent_resume()
227 u32 mask = (1 << pwm.event_id); in samsung_clockevent_resume()
228 writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); in samsung_clockevent_resume()
249 if (pwm.variant.has_tint_cstat) { in samsung_clock_event_isr()
250 u32 mask = (1 << pwm.event_id); in samsung_clock_event_isr()
251 writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); in samsung_clock_event_isr()
254 evt->event_handler(evt); in samsung_clock_event_isr()
265 pclk = clk_get_rate(pwm.timerclk); in samsung_clockevent_init()
267 samsung_timer_set_prescale(pwm.event_id, pwm.tscaler_div); in samsung_clockevent_init()
268 samsung_timer_set_divisor(pwm.event_id, pwm.tdiv); in samsung_clockevent_init()
270 clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); in samsung_clockevent_init()
271 pwm.clock_count_per_tick = clock_rate / HZ; in samsung_clockevent_init()
275 clock_rate, 1, pwm.tcnt_max); in samsung_clockevent_init()
277 irq_number = pwm.irq[pwm.event_id]; in samsung_clockevent_init()
283 if (pwm.variant.has_tint_cstat) { in samsung_clockevent_init()
284 u32 mask = (1 << pwm.event_id); in samsung_clockevent_init()
285 writel(mask | (mask << 5), pwm.base + REG_TINT_CSTAT); in samsung_clockevent_init()
291 samsung_time_stop(pwm.source_id); in samsung_clocksource_suspend()
296 samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div); in samsung_clocksource_resume()
297 samsung_timer_set_divisor(pwm.source_id, pwm.tdiv); in samsung_clocksource_resume()
299 samsung_time_setup(pwm.source_id, pwm.tcnt_max); in samsung_clocksource_resume()
300 samsung_time_start(pwm.source_id, true); in samsung_clocksource_resume()
305 return ~readl_relaxed(pwm.source_reg); in samsung_clocksource_read()
334 pclk = clk_get_rate(pwm.timerclk); in samsung_clocksource_init()
336 samsung_timer_set_prescale(pwm.source_id, pwm.tscaler_div); in samsung_clocksource_init()
337 samsung_timer_set_divisor(pwm.source_id, pwm.tdiv); in samsung_clocksource_init()
339 clock_rate = pclk / (pwm.tscaler_div * pwm.tdiv); in samsung_clocksource_init()
341 samsung_time_setup(pwm.source_id, pwm.tcnt_max); in samsung_clocksource_init()
342 samsung_time_start(pwm.source_id, true); in samsung_clocksource_init()
344 if (pwm.source_id == 4) in samsung_clocksource_init()
345 pwm.source_reg = pwm.base + 0x40; in samsung_clocksource_init()
347 pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14; in samsung_clocksource_init()
350 pwm.variant.bits, clock_rate); in samsung_clocksource_init()
352 samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits); in samsung_clocksource_init()
358 clk_prepare_enable(pwm.timerclk); in samsung_timer_resources()
360 pwm.tcnt_max = (1UL << pwm.variant.bits) - 1; in samsung_timer_resources()
361 if (pwm.variant.bits == 16) { in samsung_timer_resources()
362 pwm.tscaler_div = 25; in samsung_timer_resources()
363 pwm.tdiv = 2; in samsung_timer_resources()
365 pwm.tscaler_div = 2; in samsung_timer_resources()
366 pwm.tdiv = 1; in samsung_timer_resources()
371 * PWM master driver
378 mask = ~pwm.variant.output_mask & ((1 << SAMSUNG_PWM_NUM) - 1); in _samsung_pwm_clocksource_init()
379 channel = fls(mask) - 1; in _samsung_pwm_clocksource_init()
381 pr_crit("failed to find PWM channel for clocksource\n"); in _samsung_pwm_clocksource_init()
382 return -EINVAL; in _samsung_pwm_clocksource_init()
384 pwm.source_id = channel; in _samsung_pwm_clocksource_init()
387 channel = fls(mask) - 1; in _samsung_pwm_clocksource_init()
389 pr_crit("failed to find PWM channel for clock event\n"); in _samsung_pwm_clocksource_init()
390 return -EINVAL; in _samsung_pwm_clocksource_init()
392 pwm.event_id = channel; in _samsung_pwm_clocksource_init()
403 pwm.base = base; in samsung_pwm_clocksource_init()
404 memcpy(&pwm.variant, variant, sizeof(pwm.variant)); in samsung_pwm_clocksource_init()
405 memcpy(pwm.irq, irqs, SAMSUNG_PWM_NUM * sizeof(*irqs)); in samsung_pwm_clocksource_init()
407 pwm.timerclk = clk_get(NULL, "timers"); in samsung_pwm_clocksource_init()
408 if (IS_ERR(pwm.timerclk)) in samsung_pwm_clocksource_init()
423 memcpy(&pwm.variant, variant, sizeof(pwm.variant)); in samsung_pwm_alloc()
425 pwm.irq[i] = irq_of_parse_and_map(np, i); in samsung_pwm_alloc()
427 of_property_for_each_u32(np, "samsung,pwm-outputs", prop, cur, val) { in samsung_pwm_alloc()
429 pr_warn("%s: invalid channel index in samsung,pwm-outputs property\n", __func__); in samsung_pwm_alloc()
432 pwm.variant.output_mask |= 1 << val; in samsung_pwm_alloc()
435 pwm.base = of_iomap(np, 0); in samsung_pwm_alloc()
436 if (!pwm.base) { in samsung_pwm_alloc()
437 pr_err("%s: failed to map PWM registers\n", __func__); in samsung_pwm_alloc()
438 return -ENXIO; in samsung_pwm_alloc()
441 pwm.timerclk = of_clk_get_by_name(np, "timers"); in samsung_pwm_alloc()
442 if (IS_ERR(pwm.timerclk)) { in samsung_pwm_alloc()
444 return PTR_ERR(pwm.timerclk); in samsung_pwm_alloc()
461 TIMER_OF_DECLARE(s3c2410_pwm, "samsung,s3c2410-pwm", s3c2410_pwm_clocksource_init);
474 TIMER_OF_DECLARE(s3c6400_pwm, "samsung,s3c6400-pwm", s3c64xx_pwm_clocksource_init);
487 TIMER_OF_DECLARE(s5p6440_pwm, "samsung,s5p6440-pwm", s5p64x0_pwm_clocksource_init);
500 TIMER_OF_DECLARE(s5pc100_pwm, "samsung,s5pc100-pwm", s5p_pwm_clocksource_init);