Lines Matching +full:pwm +full:- +full:outputs

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10   This hardware block provides 3 types of timer along with PWM functionality:
11     - advanced-control timers consist of a 16-bit auto-reload counter driven
12       by a programmable prescaler, break input feature, PWM outputs and
13       complementary PWM outputs channels.
14     - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
15       driven by a programmable prescaler and PWM outputs.
16     - basic timers consist of a 16-bit auto-reload counter driven by a
20   - Benjamin Gaignard <benjamin.gaignard@st.com>
21   - Fabrice Gasnier <fabrice.gasnier@st.com>
25     const: st,stm32-timers
33   clock-names:
35       - const: int
44   dma-names:
50   "#address-cells":
53   "#size-cells":
56   pwm:
61         const: st,stm32-pwm
63       "#pwm-cells":
70         $ref: /schemas/types.yaml#/definitions/uint32-matrix
73             - description: |
77             - description: |
81             - description: |
88       - "#pwm-cells"
89       - compatible
92   "^timer@[0-9]+$":
98           - st,stm32-timer-trigger
99           - st,stm32h7-timer-trigger
108       - compatible
109       - reg
116         const: st,stm32-timer-counter
119       - compatible
122   - "#address-cells"
123   - "#size-cells"
124   - compatible
125   - reg
126   - clocks
127   - clock-names
132   - |
133     #include <dt-bindings/clock/stm32mp1-clks.h>
135       #address-cells = <1>;
136       #size-cells = <0>;
137       compatible = "st,stm32-timers";
140       clock-names = "int";
146       dma-names = "ch1", "ch2", "ch3", "ch4", "up";
147       pwm {
148         compatible = "st,stm32-pwm";
149         #pwm-cells = <3>;
153         compatible = "st,stm32-timer-trigger";
157         compatible = "st,stm32-timer-counter";