Searched +full:ppi +full:- +full:partitions (Results 1 – 4 of 4) sorted by relevance
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/interrupt-controller/arm,gic-v3.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Marc Zyngier <marc.zyngier@arm.com>14 Peripheral Interrupts (PPI), Shared Peripheral Interrupts (SPI),15 Software Generated Interrupts (SGI), and Locality-specific Peripheral19 - $ref: /schemas/interrupt-controller.yaml#24 - items:25 - enum:[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (C) 2013-2017 ARM Limited, All Rights Reserved.23 #include <linux/irqchip/arm-gic-common.h>24 #include <linux/irqchip/arm-gic-v3.h>25 #include <linux/irqchip/irq-partition-percpu.h>32 #include "irq-gic-common.h"70 * SCR_EL3.FIQ, and the behaviour of non-secure priority registers of the74 * When security is enabled, non-secure priority values from the (re)distributor78 * If SCR_EL3.FIQ == 1, the values writen to/read from PMR and RPR at non-secure84 * - section 4.8.1 Non-secure accesses to register fields for Secure interrupt[all …]
1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)8 #include <dt-bindings/clock/mt8183-clk.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/interrupt-controller/irq.h>11 #include <dt-bindings/reset-controller/mt8183-resets.h>12 #include <dt-bindings/phy/phy.h>13 #include "mt8183-pinfunc.h"17 interrupt-parent = <&sysirq>;18 #address-cells = <2>;19 #size-cells = <2>;[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/rk3399-cru.h>7 #include <dt-bindings/gpio/gpio.h>8 #include <dt-bindings/interrupt-controller/arm-gic.h>9 #include <dt-bindings/interrupt-controller/irq.h>10 #include <dt-bindings/pinctrl/rockchip.h>11 #include <dt-bindings/power/rk3399-power.h>12 #include <dt-bindings/thermal/thermal.h>17 interrupt-parent = <&gic>;18 #address-cells = <2>;[all …]
