Home
last modified time | relevance | path

Searched +full:nand +full:- +full:int +full:- +full:base (Results 1 – 25 of 143) sorted by relevance

123456

/Linux-v6.1/drivers/mtd/nand/raw/atmel/
Dnand-controller.c1 // SPDX-License-Identifier: GPL-2.0
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
13 * Derived from drivers/mtd/nand/autcpu12.c (removed in v3.8)
23 * Derived from Das U-Boot source code
24 * (u-boot-1.1.5/board/atmel/at91sam9263ek/nand.c)
30 * Add Nand Flash Controller support for SAMA5 SoC
38 * - atmel_nand_: all generic structures/functions
39 * - atmel_smc_nand_: all structures/functions specific to the SMC interface
41 * - atmel_hsmc_nand_: all structures/functions specific to the HSMC interface
43 * - atmel_nfc_: all structures/functions used to manipulate the NFC sub-block
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/ingenic/
Dingenic_nand_drv.c1 // SPDX-License-Identifier: GPL-2.0
3 * Ingenic JZ47xx NAND driver
24 #include <linux/jz4780-nemc.h>
28 #define DRV_NAME "ingenic-nand"
39 unsigned int bank;
40 void __iomem *base; member
48 unsigned int num_banks;
59 unsigned int reading: 1;
72 static int qi_lb60_ooblayout_ecc(struct mtd_info *mtd, int section, in qi_lb60_ooblayout_ecc()
76 struct nand_ecc_ctrl *ecc = &chip->ecc; in qi_lb60_ooblayout_ecc()
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/
Dau1550nd.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <asm/mach-au1x00/au1000.h>
16 #include <asm/mach-au1x00/au1550nd.h>
23 int cs;
24 void __iomem *base; member
33 * au_write_buf - write buffer to chip
34 * @this: NAND chip object
41 unsigned int len) in au_write_buf()
45 int i; in au_write_buf()
48 writeb(p[i], ctx->base + MEM_STNAND_DATA); in au_write_buf()
[all …]
Dfsmc_nand.c1 // SPDX-License-Identifier: GPL-2.0
5 * Driver for NAND portions
11 * Based on drivers/mtd/nand/nomadik_nand.c (removed in v3.8)
20 #include <linux/dma-direction.h>
21 #include <linux/dma-mapping.h>
29 #include <linux/mtd/nand-ecc-sw-hamming.h>
37 #include <mtd/mtd-abi.h>
57 #define FSMC_NOR_REG(base, bank, reg) ((base) + \ argument
61 /* fsmc controller registers for NAND flash */
99 * TOUDEL = 7ns (Output delay from the flip-flops to the board)
[all …]
Dnand_base.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * This is the generic MTD driver for NAND flash devices. It should be
5 * capable of working with almost all NAND chips currently available.
8 * http://www.linux-mtd.infradead.org/doc/nand.html
11 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
21 * Check, if mtd->ecctype should be set to MTD_ECC_HW
37 #include <linux/mtd/nand.h>
38 #include <linux/mtd/nand-ecc-sw-hamming.h>
39 #include <linux/mtd/nand-ecc-sw-bch.h>
50 static int nand_pairing_dist3_get_info(struct mtd_info *mtd, int page, in nand_pairing_dist3_get_info()
[all …]
Dcs553x_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * This is a device driver for the NAND flash controller found on
11 * mtd-id for command line partitioning is cs553x_nand_cs[0-3]
12 * where 0-3 reflects the chip select for NAND.
33 /* NAND Timing MSRs */
34 #define MSR_NANDF_DATA 0x5140001b /* NAND Flash Data Timing MSR */
35 #define MSR_NANDF_CTL 0x5140001c /* NAND Flash Control Timing */
38 /* NAND BAR MSRs */
45 #define FLSH_NOR_NAND (1ULL<<33) /* 1 for NAND */
54 /* Registers within the NAND flash controller BAR -- memory mapped */
[all …]
Dgpio.c1 // SPDX-License-Identifier: GPL-2.0-only
10 * Device driver for NAND flash that uses a memory mapped interface to
11 * read/write the NAND commands and data, and GPIO pins for control signals
12 * (the DT binding refers to this as "GPIO assisted NAND flash")
25 #include <linux/mtd/nand-gpio.h>
31 struct nand_controller base; member
52 * Make sure the GPIO state changes occur in-order with writes to NAND
54 * Needed on PXA due to bus-reordering within the SoC itself (see section on
61 if (gpiomtd->io_sync) { in gpio_nand_dosync()
64 * What's required is what's here - a read from a separate in gpio_nand_dosync()
[all …]
Doxnas_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Oxford Semiconductor OXNAS NAND driver
24 /* Nand commands */
31 struct nand_controller base; member
35 unsigned int nchips;
42 return readb(oxnas->io_base); in oxnas_nand_read_byte()
45 static void oxnas_nand_read_buf(struct nand_chip *chip, u8 *buf, int len) in oxnas_nand_read_buf()
49 ioread8_rep(oxnas->io_base, buf, len); in oxnas_nand_read_buf()
53 int len) in oxnas_nand_write_buf()
57 iowrite8_rep(oxnas->io_base, buf, len); in oxnas_nand_write_buf()
[all …]
Darasan-nand-controller.c1 // SPDX-License-Identifier: GPL-2.0
3 * Arasan NAND Flash Controller Driver
5 * Copyright (C) 2014 - 2020 Xilinx, Inc.
17 #include <linux/dma-mapping.h>
114 #define ANFC_MAX_PKT_SIZE (SZ_2K - 1)
124 * struct anfc_op - Defines how to execute an operation
142 int steps;
143 unsigned int rdy_timeout_ms;
144 unsigned int len;
150 * struct anand - Defines the NAND chip related information
[all …]
Ddavinci_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * davinci_nand.c - NAND Flash Driver for DaVinci family chips
8 * Sander Huijsen <Shuijsen@optelecom-nkf.com>
24 #include <linux/platform_data/mtd-davinci.h>
25 #include <linux/platform_data/mtd-davinci-aemif.h>
28 * This is a device driver for the NAND flash controller found on the
33 * The 1-bit ECC hardware is supported, as well as the newer 4-bit ECC
34 * available on chips like the DM355 and OMAP-L137 and needed with the
35 * more error-prone MLC NAND chips.
37 * This driver assumes EM_WAIT connects all the NAND devices' RDY/nBUSY
[all …]
Dnand_bbt.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Bad block table support for the NAND driver
26 * For manufacturer created BBTs like the one found on M-SYS DOC devices
32 * number which indicates which of both tables is more up to date. If the NAND
52 * - bbts start at a page boundary, if autolocated on a block boundary
53 * - the space necessary for a bbt in FLASH does not exceed a block boundary
76 static inline uint8_t bbt_get_entry(struct nand_chip *chip, int block) in bbt_get_entry()
78 uint8_t entry = chip->bbt[block >> BBT_ENTRY_SHIFT]; in bbt_get_entry()
83 static inline void bbt_mark_entry(struct nand_chip *chip, int block, in bbt_mark_entry()
87 chip->bbt[block >> BBT_ENTRY_SHIFT] |= msk; in bbt_mark_entry()
[all …]
Dfsl_elbc_nand.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* Freescale Enhanced Local Bus Controller NAND driver
4 * Copyright © 2006-2007, 2010 Freescale Semiconductor
9 * Roy Zang <tie-fei.zang@freescale.com>
41 int bank; /* Chip select bank number */
42 u8 __iomem *vbase; /* Chip select base virtual address */
43 int page_size; /* NAND page size (0=512, 1=2048) */
44 unsigned int fmr; /* FCM Flash Mode Register value */
54 unsigned int page; /* Last page written to / read from */
55 unsigned int read_bytes; /* Number of bytes read during command */
[all …]
Dams-delta.c1 // SPDX-License-Identifier: GPL-2.0
5 * Derived from drivers/mtd/nand/toto.c (removed in v2.6.28)
13 * This is a device driver for the NAND flash device found on the
22 #include <linux/mtd/nand-gpio.h>
33 struct nand_controller base; member
44 unsigned int tRP;
45 unsigned int tWP;
52 gpiod_set_value(priv->gpiod_nwe, 1); in gpio_nand_write_commit()
53 ndelay(priv->tWP); in gpio_nand_write_commit()
54 gpiod_set_value(priv->gpiod_nwe, 0); in gpio_nand_write_commit()
[all …]
Ddenali.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * NAND Flash Controller Device Driver
4 * Copyright (c) 2009 - 2010, Intel Corporation and its suppliers.
295 * struct denali_chip_sel - per-CS data of Denali NAND
308 int bank;
320 * struct denali_chip - per-chip data of Denali NAND
322 * @chip: base NAND chip structure
325 * @sels: the array of per-cs data
330 unsigned int nsels;
335 * struct denali_controller - Denali NAND controller data
[all …]
Dtegra_nand.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2014-2015 Lucas Stach <dev@lynxeye.de>
10 #include <linux/dma-mapping.h>
34 #define COMMAND_TRANS_SIZE(size) ((((size) - 1) & 0xf) << 20)
40 #define COMMAND_CLE_SIZE(size) ((((size) - 1) & 0x3) << 4)
41 #define COMMAND_ALE_SIZE(size) ((((size) - 1) & 0xf) << 0)
156 #define OFFSET(val, off) ((val) < (off) ? 0 : (val) - (off))
173 int irq;
178 int cur_cs;
189 int cs[1];
[all …]
Dnand_hynix.c1 // SPDX-License-Identifier: GPL-2.0-or-later
6 * Author: Boris Brezillon <boris.brezillon@free-electrons.com>
20 * struct hynix_read_retry - read-retry data
21 * @nregs: number of register to set when applying a new read-retry mode
22 * @regs: register offsets (NAND chip dependent)
27 int nregs;
33 * struct hynix_nand - private Hynix NAND struct
35 * @read_retry: read-retry information
42 * struct hynix_read_retry_otp - structure describing how the read-retry OTP
48 * @page: the address to pass to the READ_PAGE command. Depends on the NAND
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dbrcm,brcmnand.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom STB NAND Controller
10 - Brian Norris <computersforpeace@gmail.com>
11 - Kamal Dasu <kdasu.kdev@gmail.com>
14 The Broadcom Set-Top Box NAND controller supports low-level access to raw NAND
15 flash chips. It has a memory-mapped register interface for both control
25 -- Additional SoC-specific NAND controller properties --
27 The NAND controller is integrated differently on the variety of SoCs on which
[all …]
/Linux-v6.1/include/linux/mtd/
Dspinand.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2016-2017 Micron Technology, Inc.
15 #include <linux/mtd/nand.h>
17 #include <linux/spi/spi-mem.h>
20 * Standard SPI NAND flash operations
144 * Standard SPI NAND flash commands
197 * struct spinand_id - SPI NAND id structure
204 int len;
214 * struct spinand_devid - SPI NAND device id structure
222 * read_id opcode + 1-byte address.
[all …]
Drawnand.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
8 * Contains standard defines and IDs for NAND flash devices
17 #include <linux/mtd/nand.h>
29 /* The maximum number of NAND chips in an array */
50 * Standard NAND flash commands
73 #define NAND_CMD_NONE -1
82 #define NAND_DATA_IFACE_CHECK_ONLY -1
95 * Enable generic NAND 'page erased' check. This check is only done when
96 * ecc.correct() returns -EBADMSG.
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/brcmnand/
Dbcm63138_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
19 void __iomem *base; member
33 void __iomem *mmio = priv->base + BCM63138_NAND_INT_STATUS; in bcm63138_nand_intc_ack()
48 void __iomem *mmio = priv->base + BCM63138_NAND_INT_EN; in bcm63138_nand_intc_set()
59 static int bcm63138_nand_probe(struct platform_device *pdev) in bcm63138_nand_probe()
61 struct device *dev = &pdev->dev; in bcm63138_nand_probe()
68 return -ENOMEM; in bcm63138_nand_probe()
69 soc = &priv->soc; in bcm63138_nand_probe()
71 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "nand-int-base"); in bcm63138_nand_probe()
72 priv->base = devm_ioremap_resource(dev, res); in bcm63138_nand_probe()
[all …]
Dbcm6368_nand.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * Copyright 2000-2010 Broadcom Corporation
12 * Copyright 2000-2010 Broadcom Corporation
28 void __iomem *base; member
54 void __iomem *mmio = priv->base + BCM6368_NAND_INT; in bcm6368_nand_intc_ack()
72 void __iomem *mmio = priv->base + BCM6368_NAND_INT; in bcm6368_nand_intc_set()
86 static int bcm6368_nand_probe(struct platform_device *pdev) in bcm6368_nand_probe()
88 struct device *dev = &pdev->dev; in bcm6368_nand_probe()
94 return -ENOMEM; in bcm6368_nand_probe()
95 soc = &priv->soc; in bcm6368_nand_probe()
[all …]
/Linux-v6.1/arch/mips/rb532/
Ddevices.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 #include <asm/mach-rc32434/rc32434.h>
25 #include <asm/mach-rc32434/dma.h>
26 #include <asm/mach-rc32434/dma_v.h>
27 #include <asm/mach-rc32434/eth.h>
28 #include <asm/mach-rc32434/rb.h>
29 #include <asm/mach-rc32434/integ.h>
30 #include <asm/mach-rc32434/gpio.h>
31 #include <asm/mach-rc32434/irq.h>
36 extern unsigned int idt_cpu_freq;
[all …]
/Linux-v6.1/drivers/mtd/nand/raw/gpmi-nand/
Dgpmi-nand.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Freescale GPMI NAND Flash Driver
5 * Copyright (C) 2010-2011 Freescale Semiconductor, Inc.
13 #include <linux/dma-mapping.h>
20 unsigned int dma_low_channel;
21 unsigned int dma_high_channel;
26 * struct bch_geometry - BCH geometry description.
41 * @block_mark_byte_offset: The byte offset in the ECC-based page view at
43 * @block_mark_bit_offset: The bit offset into the ECC-based page view at
49 unsigned int gf_len;
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dintel-ixp4xx-reference-design.dtsi1 // SPDX-License-Identifier: ISC
5 * set-up for IXDP425, IXCDP1100, KIXRP435 and IXDP465.
20 stdout-path = "uart0:115200n8";
28 compatible = "i2c-gpio";
29 sda-gpios = <&gpio0 7 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
30 scl-gpios = <&gpio0 6 (GPIO_ACTIVE_HIGH|GPIO_OPEN_DRAIN)>;
31 #address-cells = <1>;
32 #size-cells = <0>;
36 * Philips PCF8582C-2T/03 512byte I2C EEPROM
43 read-only;
[all …]
/Linux-v6.1/drivers/memory/
Dfsl_ifc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
29 * convert_ifc_address - convert the base address
30 * @addr_base: base address of the memory bank
32 unsigned int convert_ifc_address(phys_addr_t addr_base) in convert_ifc_address()
39 * fsl_ifc_find - find IFC bank
40 * @addr_base: base address of the memory bank
42 * This function walks IFC banks comparing "Base address" field of the CSPR
47 int fsl_ifc_find(phys_addr_t addr_base) in fsl_ifc_find()
49 int i = 0; in fsl_ifc_find()
51 if (!fsl_ifc_ctrl_dev || !fsl_ifc_ctrl_dev->gregs) in fsl_ifc_find()
[all …]

123456