Lines Matching +full:nand +full:- +full:int +full:- +full:base

1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2000-2010 David Woodhouse <dwmw2@infradead.org>
8 * Contains standard defines and IDs for NAND flash devices
17 #include <linux/mtd/nand.h>
29 /* The maximum number of NAND chips in an array */
50 * Standard NAND flash commands
73 #define NAND_CMD_NONE -1
82 #define NAND_DATA_IFACE_CHECK_ONLY -1
95 * Enable generic NAND 'page erased' check. This check is only done when
96 * ecc.correct() returns -EBADMSG.
122 * Chip requires ready check on read (for auto-incremented sequential read).
131 /* Device is one of 'new' xD cards that expose fake nand command set */
134 /* Device behaves just like nand, but is readonly */
140 #define NAND_HAS_SUBPAGE_READ(chip) ((chip->options & NAND_SUBPAGE_READ))
158 * Autodetect nand buswidth with readid/onfi.
172 * In case your controller is implementing ->legacy.cmd_ctrl() and is relying
173 * on the default ->cmdfunc() implementation, you may want to let the core
182 * Whether the NAND chip is a boot medium. Drivers might use this information
223 * struct nand_parameters - NAND generic parameters from the parameter page
225 * @supports_set_get_features: The NAND chip supports setting/getting features
241 /* The maximum expected count of bytes in the NAND ID sequence */
245 * struct nand_id - NAND id structure
251 int len;
255 * struct nand_ecc_step_info - ECC step information of ECC engine
261 int stepsize;
262 const int *strengths;
263 int nstrengths;
267 * struct nand_ecc_caps - capability of ECC engine
274 int nstepinfos;
275 int (*calc_ecc_bytes)(int step_size, int strength);
280 static const int __name##_strengths[] = { __VA_ARGS__ }; \
293 * struct nand_ecc_ctrl - Control structure for ECC
312 * corrected bitflips, -EBADMSG if the number of bitflips exceed
315 * If -EBADMSG is returned the input buffers should be left
319 * controller and always return contiguous in-band and
320 * out-of-band data even if they're not stored
321 * contiguously on the NAND chip (e.g.
322 * NAND_ECC_PLACEMENT_INTERLEAVED interleaves in-band and
323 * out-of-band data).
327 * in-band and out-of-band data. ECC controller is
330 * NAND_ECC_PLACEMENT_INTERLEAVED interleaves in-band and
331 * out-of-band data).
334 * any single ECC step, -EIO hw error
349 int steps;
350 int size;
351 int bytes;
352 int total;
353 int strength;
354 int prepad;
355 int postpad;
356 unsigned int options;
359 void (*hwctl)(struct nand_chip *chip, int mode);
360 int (*calculate)(struct nand_chip *chip, const uint8_t *dat,
362 int (*correct)(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc,
364 int (*read_page_raw)(struct nand_chip *chip, uint8_t *buf,
365 int oob_required, int page);
366 int (*write_page_raw)(struct nand_chip *chip, const uint8_t *buf,
367 int oob_required, int page);
368 int (*read_page)(struct nand_chip *chip, uint8_t *buf,
369 int oob_required, int page);
370 int (*read_subpage)(struct nand_chip *chip, uint32_t offs,
371 uint32_t len, uint8_t *buf, int page);
372 int (*write_subpage)(struct nand_chip *chip, uint32_t offset,
374 int oob_required, int page);
375 int (*write_page)(struct nand_chip *chip, const uint8_t *buf,
376 int oob_required, int page);
377 int (*write_oob_raw)(struct nand_chip *chip, int page);
378 int (*read_oob_raw)(struct nand_chip *chip, int page);
379 int (*read_oob)(struct nand_chip *chip, int page);
380 int (*write_oob)(struct nand_chip *chip, int page);
384 * struct nand_sdr_timings - SDR NAND chip timings
386 * This struct defines the timing requirements of a SDR NAND chip.
387 * These information can be found in every NAND datasheets and the timings
389 * https://media-www.micron.com/-/media/client/onfi/specs/onfi_3_1_spec.pdf
405 * @tCHZ_max: CE# high to output hi-Z
414 * @tIR_min: Output hi-Z to RE# low
421 * @tRHZ_max: RE# high to output hi-Z
476 * struct nand_nvddr_timings - NV-DDR NAND chip timings
478 * This struct defines the timing requirements of a NV-DDR NAND data interface.
479 * These information can be found in every NAND datasheets and the timings
481 * https://media-www.micron.com/-/media/client/onfi/specs/onfi_4_1_gold.pdf
482 * (chapter 4.18.2 NV-DDR)
507 * @tDQSHZ_max: W/R_n high to DQS/DQ tri-state by device
508 * @tDQSQ_max: DQS-DQ skew, DQS to last DQ valid, per access
563 * between SDR and NV-DDR, timings related to the internal chip behavior are
565 * the same definition and are shared in both SDR and NV-DDR timing structures:
566 * - tADL_min
567 * - tBERS_max
568 * - tCCS_min
569 * - tFEAT_max
570 * - tPROG_max
571 * - tR_max
572 * - tRR_min
573 * - tRST_max
574 * - tWB_max
580 nand_get_sdr_timings(conf)->timing_name : \
581 nand_get_nvddr_timings(conf)->timing_name
590 * enum nand_interface_type - NAND interface type
600 * struct nand_interface_config - NAND interface timing
610 unsigned int mode;
619 * nand_interface_is_sdr - get the interface type
624 return conf->type == NAND_SDR_IFACE; in nand_interface_is_sdr()
628 * nand_interface_is_nvddr - get the interface type
633 return conf->type == NAND_NVDDR_IFACE; in nand_interface_is_nvddr()
637 * nand_get_sdr_timings - get SDR timing from data interface
644 return ERR_PTR(-EINVAL); in nand_get_sdr_timings()
646 return &conf->timings.sdr; in nand_get_sdr_timings()
650 * nand_get_nvddr_timings - get NV-DDR timing from data interface
657 return ERR_PTR(-EINVAL); in nand_get_nvddr_timings()
659 return &conf->timings.nvddr; in nand_get_nvddr_timings()
663 * struct nand_op_cmd_instr - Definition of a command instruction
671 * struct nand_op_addr_instr - Definition of an address instruction
676 unsigned int naddrs;
681 * struct nand_op_data_instr - Definition of a data instruction
684 * @buf.in: buffer to fill when reading from the NAND chip
685 * @buf.out: buffer to read from when writing to the NAND chip
686 * @force_8bit: force 8-bit access
689 * and are from the controller perspective, so a "in" is a read from the NAND
690 * chip while a "out" is a write to the NAND chip.
693 unsigned int len;
702 * struct nand_op_waitrdy_instr - Definition of a wait ready instruction
706 unsigned int timeout_ms;
710 * enum nand_op_instr_type - Definition of all instruction types
726 * struct nand_op_instr - Instruction object
748 unsigned int delay_ns;
841 * struct nand_subop - a sub operation
842 * @cs: the CS line to select for this NAND sub-operation
846 * of the sub-operation
848 * of the sub-operation
853 * When an operation cannot be handled as is by the NAND controller, it will
854 * be split by the parser into sub-operations which will be passed to the
858 unsigned int cs;
860 unsigned int ninstrs;
861 unsigned int first_instr_start_off;
862 unsigned int last_instr_end_off;
865 unsigned int nand_subop_get_addr_start_off(const struct nand_subop *subop,
866 unsigned int op_id);
867 unsigned int nand_subop_get_num_addr_cyc(const struct nand_subop *subop,
868 unsigned int op_id);
869 unsigned int nand_subop_get_data_start_off(const struct nand_subop *subop,
870 unsigned int op_id);
871 unsigned int nand_subop_get_data_len(const struct nand_subop *subop,
872 unsigned int op_id);
875 * struct nand_op_parser_addr_constraints - Constraints for address instructions
880 unsigned int maxcycles;
884 * struct nand_op_parser_data_constraints - Constraints for data instructions
888 unsigned int maxlen;
892 * struct nand_op_parser_pattern_elem - One element of a pattern
942 * struct nand_op_parser_pattern - NAND sub-operation pattern descriptor
945 * @exec: the function that will issue a sub-operation
948 * with its constraints. The pattern itself is used by the core to match NAND
949 * chip operation with NAND controller operations.
950 * Once a match between a NAND controller operation pattern and a NAND chip
951 * operation (or a sub-set of a NAND operation) is found, the pattern ->exec()
961 unsigned int nelems;
962 int (*exec)(struct nand_chip *chip, const struct nand_subop *subop);
974 * struct nand_op_parser - NAND controller operation parser descriptor
980 * NAND operation (or tries to determine if a specific operation is supported).
989 unsigned int npatterns;
1000 * struct nand_operation - NAND operation descriptor
1001 * @cs: the CS line to select for this NAND operation
1005 * The actual operation structure that will be passed to chip->exec_op().
1008 unsigned int cs;
1010 unsigned int ninstrs;
1020 int nand_op_parser_exec_op(struct nand_chip *chip,
1028 switch (instr->type) { in nand_op_trace()
1031 instr->ctx.cmd.opcode); in nand_op_trace()
1035 instr->ctx.addr.naddrs, in nand_op_trace()
1036 instr->ctx.addr.naddrs < 64 ? in nand_op_trace()
1037 instr->ctx.addr.naddrs : 64, in nand_op_trace()
1038 instr->ctx.addr.addrs); in nand_op_trace()
1042 instr->ctx.data.len, in nand_op_trace()
1043 instr->ctx.data.force_8bit ? in nand_op_trace()
1044 ", force 8-bit" : ""); in nand_op_trace()
1048 instr->ctx.data.len, in nand_op_trace()
1049 instr->ctx.data.force_8bit ? in nand_op_trace()
1050 ", force 8-bit" : ""); in nand_op_trace()
1054 instr->ctx.waitrdy.timeout_ms); in nand_op_trace()
1061 * struct nand_controller_ops - Controller operations
1063 * @attach_chip: this method is called after the NAND detection phase after
1066 * provided by the NAND chip or device tree. Typically used to
1071 * nand_controller_ops->attach_chip().
1073 * @exec_op: controller specific method to execute NAND operations.
1074 * This method replaces chip->legacy.cmdfunc(),
1075 * chip->legacy.{read,write}_{buf,byte,word}(),
1076 * chip->legacy.dev_ready() and chip->legacy.waifunc().
1083 int (*attach_chip)(struct nand_chip *chip);
1085 int (*exec_op)(struct nand_chip *chip,
1088 int (*setup_interface)(struct nand_chip *chip, int chipnr,
1093 * struct nand_controller - Structure used to describe a NAND controller
1095 * @lock: lock used to serialize accesses to the NAND controller
1096 * @ops: NAND controller operations.
1105 mutex_init(&nfc->lock); in nand_controller_init()
1109 * struct nand_legacy - NAND chip legacy fields/hooks
1126 * @set_features: set the NAND chip features
1127 * @get_features: get the NAND chip features
1139 void (*select_chip)(struct nand_chip *chip, int cs);
1142 void (*write_buf)(struct nand_chip *chip, const u8 *buf, int len);
1143 void (*read_buf)(struct nand_chip *chip, u8 *buf, int len);
1144 void (*cmd_ctrl)(struct nand_chip *chip, int dat, unsigned int ctrl);
1145 void (*cmdfunc)(struct nand_chip *chip, unsigned command, int column,
1146 int page_addr);
1147 int (*dev_ready)(struct nand_chip *chip);
1148 int (*waitfunc)(struct nand_chip *chip);
1149 int (*block_bad)(struct nand_chip *chip, loff_t ofs);
1150 int (*block_markbad)(struct nand_chip *chip, loff_t ofs);
1151 int (*set_features)(struct nand_chip *chip, int feature_addr,
1153 int (*get_features)(struct nand_chip *chip, int feature_addr,
1155 int chip_delay;
1160 * struct nand_chip_ops - NAND chip operations
1165 * @setup_read_retry: Set the read-retry mode (mostly needed for MLC NANDs)
1169 int (*suspend)(struct nand_chip *chip);
1171 int (*lock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
1172 int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);
1173 int (*setup_read_retry)(struct nand_chip *chip, int retry_mode);
1174 int (*choose_interface_config)(struct nand_chip *chip,
1179 * struct nand_manufacturer - NAND manufacturer structure
1189 * struct nand_secure_region - NAND secure region structure
1199 * struct nand_chip - NAND Private Flash Chip Data
1200 * @base: Inherit from the generic NAND device
1201 * @id: Holds NAND ID
1204 * @ops: NAND chip operations
1212 * @current_interface_config: The currently used NAND interface configuration
1213 * @best_interface_config: The best NAND interface configuration which fits both
1214 * the NAND chip and NAND controller constraints. If
1231 * @pagemask: Page number mask = number of (pages / chip) - 1
1237 * @pagecache.page: Page number currently in the cache. -1 means no page is
1241 * to the NAND device
1244 * @cur_cs: Currently selected target. -1 means no target selected, otherwise we
1246 * NAND Controller drivers should not modify this value, but they're
1257 struct nand_device base; member
1263 unsigned int options;
1270 unsigned int bbt_erase_shift;
1271 unsigned int bbt_options;
1272 unsigned int badblockpos;
1273 unsigned int badblockbits;
1280 unsigned int page_shift;
1281 unsigned int phys_erase_shift;
1282 unsigned int chip_shift;
1283 unsigned int pagemask;
1284 unsigned int subpagesize;
1290 unsigned int bitflips;
1291 int page;
1297 unsigned int suspended : 1;
1299 int cur_cs;
1300 int read_retries;
1312 return container_of(mtd, struct nand_chip, base.mtd); in mtd_to_nand()
1317 return &chip->base.mtd; in nand_to_mtd()
1322 return chip->priv; in nand_get_controller_data()
1327 chip->priv = priv; in nand_set_controller_data()
1333 chip->manufacturer.priv = priv; in nand_set_manufacturer_data()
1338 return chip->manufacturer.priv; in nand_get_manufacturer_data()
1353 * nand_get_interface_config - Retrieve the current interface configuration
1354 * of a NAND chip
1355 * @chip: The NAND chip
1360 return chip->current_interface_config; in nand_get_interface_config()
1364 * A helper for defining older NAND chips where the second ID byte fully
1366 * size). All these chips have 512 bytes NAND page size.
1388 #define NAND_ECC_STRENGTH(type) ((type)->ecc.strength_ds)
1389 #define NAND_ECC_STEP(type) ((type)->ecc.step_ds)
1392 * struct nand_flash_dev - NAND Flash Device ID Structure
1393 * @name: a human-readable name of the NAND chip
1400 * @pagesize: size of the NAND page in bytes; if 0, then the real page size (as
1401 * well as the eraseblock size) is determined from the extended NAND
1425 unsigned int pagesize;
1426 unsigned int chipsize;
1427 unsigned int erasesize;
1428 unsigned int options;
1437 int nand_create_bbt(struct nand_chip *chip);
1440 * Check if it is a SLC nand.
1441 * The !nand_is_slc() can be used to check the MLC/TLC nand chips.
1446 WARN(nanddev_bits_per_cell(&chip->base) == 0, in nand_is_slc()
1447 "chip->bits_per_cell is used uninitialized\n"); in nand_is_slc()
1448 return nanddev_bits_per_cell(&chip->base) == 1; in nand_is_slc()
1452 * nand_opcode_8bits - Check if the opcode's address should be sent only on the
1456 static inline int nand_opcode_8bits(unsigned int command) in nand_opcode_8bits()
1470 int rawnand_sw_hamming_init(struct nand_chip *chip);
1471 int rawnand_sw_hamming_calculate(struct nand_chip *chip,
1474 int rawnand_sw_hamming_correct(struct nand_chip *chip,
1479 int rawnand_sw_bch_init(struct nand_chip *chip);
1480 int rawnand_sw_bch_correct(struct nand_chip *chip, unsigned char *buf,
1484 int nand_check_erased_ecc_chunk(void *data, int datalen,
1485 void *ecc, int ecclen,
1486 void *extraoob, int extraooblen,
1487 int threshold);
1489 int nand_ecc_choose_conf(struct nand_chip *chip,
1490 const struct nand_ecc_caps *caps, int oobavail);
1493 int nand_write_oob_std(struct nand_chip *chip, int page);
1496 int nand_read_oob_std(struct nand_chip *chip, int page);
1499 int nand_get_set_features_notsupp(struct nand_chip *chip, int addr,
1503 int nand_read_page_raw(struct nand_chip *chip, uint8_t *buf, int oob_required,
1504 int page);
1505 int nand_monolithic_read_page_raw(struct nand_chip *chip, uint8_t *buf,
1506 int oob_required, int page);
1509 int nand_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
1510 int oob_required, int page);
1511 int nand_monolithic_write_page_raw(struct nand_chip *chip, const uint8_t *buf,
1512 int oob_required, int page);
1514 /* Reset and initialize a NAND device */
1515 int nand_reset(struct nand_chip *chip, int chipnr);
1517 /* NAND operation helpers */
1518 int nand_reset_op(struct nand_chip *chip);
1519 int nand_readid_op(struct nand_chip *chip, u8 addr, void *buf,
1520 unsigned int len);
1521 int nand_status_op(struct nand_chip *chip, u8 *status);
1522 int nand_erase_op(struct nand_chip *chip, unsigned int eraseblock);
1523 int nand_read_page_op(struct nand_chip *chip, unsigned int page,
1524 unsigned int offset_in_page, void *buf, unsigned int len);
1525 int nand_change_read_column_op(struct nand_chip *chip,
1526 unsigned int offset_in_page, void *buf,
1527 unsigned int len, bool force_8bit);
1528 int nand_read_oob_op(struct nand_chip *chip, unsigned int page,
1529 unsigned int offset_in_page, void *buf, unsigned int len);
1530 int nand_prog_page_begin_op(struct nand_chip *chip, unsigned int page,
1531 unsigned int offset_in_page, const void *buf,
1532 unsigned int len);
1533 int nand_prog_page_end_op(struct nand_chip *chip);
1534 int nand_prog_page_op(struct nand_chip *chip, unsigned int page,
1535 unsigned int offset_in_page, const void *buf,
1536 unsigned int len);
1537 int nand_change_write_column_op(struct nand_chip *chip,
1538 unsigned int offset_in_page, const void *buf,
1539 unsigned int len, bool force_8bit);
1540 int nand_read_data_op(struct nand_chip *chip, void *buf, unsigned int len,
1542 int nand_write_data_op(struct nand_chip *chip, const void *buf,
1543 unsigned int len, bool force_8bit);
1544 int nand_read_page_hwecc_oob_first(struct nand_chip *chip, uint8_t *buf,
1545 int oob_required, int page);
1547 /* Scan and identify a NAND device */
1548 int nand_scan_with_ids(struct nand_chip *chip, unsigned int max_chips,
1551 static inline int nand_scan(struct nand_chip *chip, unsigned int max_chips) in nand_scan()
1560 * Free resources held by the NAND device, must be called on error after a
1569 int nand_soft_waitrdy(struct nand_chip *chip, unsigned long timeout_ms);
1570 int nand_gpio_waitrdy(struct nand_chip *chip, struct gpio_desc *gpiod,
1573 /* Select/deselect a NAND target. */
1574 void nand_select_target(struct nand_chip *chip, unsigned int cs);
1578 void nand_extract_bits(u8 *dst, unsigned int dst_off, const u8 *src,
1579 unsigned int src_off, unsigned int nbits);
1582 * nand_get_data_buf() - Get the internal page buffer
1583 * @chip: NAND chip object
1585 * Returns the pre-allocated page buffer after invalidating the cache. This
1597 chip->pagecache.page = -1; in nand_get_data_buf()
1599 return chip->data_buf; in nand_get_data_buf()
1602 /* Parse the gpio-cs property */
1603 int rawnand_dt_parse_gpio_cs(struct device *dev, struct gpio_desc ***cs_array,
1604 unsigned int *ncs_array);