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/Linux-v5.15/Documentation/devicetree/bindings/soc/imx/
Dimx8m-soc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/imx/imx8m-soc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Series SoC
10 - Alice Guo <alice.guo@nxp.com>
13 NXP i.MX8M series SoCs contain fuse entries from which SoC Unique ID can be
21 - fsl,imx8mm
22 - fsl,imx8mn
23 - fsl,imx8mp
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/Linux-v5.15/Documentation/devicetree/bindings/interconnect/
Dfsl,imx8m-noc.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/interconnect/fsl,imx8m-noc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Leonard Crestez <leonard.crestez@nxp.com>
13 The i.MX SoC family has multiple buses for which clock frequency (and
18 for normal (non-secure) world.
20 The buses are based on externally licensed IPs such as ARM NIC-301 and
27 - items:
28 - enum:
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/Linux-v5.15/Documentation/devicetree/bindings/nvmem/
Dimx-ocotp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/nvmem/imx-ocotp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale i.MX6 On-Chip OTP Controller (OCOTP) device tree bindings
10 - Anson Huang <Anson.Huang@nxp.com>
13 This binding represents the on-chip eFuse OTP controller found on
18 - $ref: "nvmem.yaml#"
23 - items:
24 - enum:
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/Linux-v5.15/arch/arm64/boot/dts/freescale/
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mm-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mn-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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Dimx8mp.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mp-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/thermal/thermal.h>
12 #include "imx8mp-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
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/Linux-v5.15/drivers/interconnect/imx/
Dimx8mm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Interconnect framework driver for i.MX8MM SoC
6 * Copyright (c) 2019-2020, NXP
13 #include <dt-bindings/interconnect/imx8mm.h>
98 .name = "imx8mm-interconnect",
105 MODULE_ALIAS("platform:imx8mm-interconnect");
/Linux-v5.15/drivers/soc/imx/
Dsoc-imx8m.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/arm-smccc.h>
60 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mq-ocotp"); in imx8mq_soc_revision()
68 * SOC revision on older imx8mq is not available in fuses so query in imx8mq_soc_revision()
95 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-ocotp"); in imx8mm_soc_uid()
116 np = of_find_compatible_node(NULL, NULL, "fsl,imx8mm-anatop"); in imx8mm_soc_revision()
155 { .compatible = "fsl,imx8mm", .data = &imx8mm_soc_data, },
177 return -ENOMEM; in imx8_soc_init()
179 soc_dev_attr->family = "Freescale i.MX"; in imx8_soc_init()
181 ret = of_property_read_string(of_root, "model", &soc_dev_attr->machine); in imx8_soc_init()
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/Linux-v5.15/Documentation/devicetree/bindings/pwm/
Dimx-pwm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pwm/imx-pwm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Philipp Zabel <p.zabel@pengutronix.de>
13 "#pwm-cells":
18 - 2
19 - 3
23 - enum:
24 - fsl,imx1-pwm
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/Linux-v5.15/drivers/clk/imx/
DKconfig1 # SPDX-License-Identifier: GPL-2.0
2 # common clock support for NXP i.MX SoC family.
67 tristate "IMX8MM CCM Clock Driver"
/Linux-v5.15/Documentation/devicetree/bindings/mtd/
Dgpmi-nand.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mtd/gpmi-nand.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale General-Purpose Media Interface (GPMI) binding
10 - Han Xu <han.xu@nxp.com>
14 flash chips. The device tree may optionally contain sub-nodes
21 - enum:
22 - fsl,imx23-gpmi-nand
23 - fsl,imx28-gpmi-nand
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/Linux-v5.15/Documentation/devicetree/bindings/spi/
Dfsl-imx-cspi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/fsl-imx-cspi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
13 - $ref: "/schemas/spi/spi-controller.yaml#"
18 - const: fsl,imx1-cspi
19 - const: fsl,imx21-cspi
20 - const: fsl,imx27-cspi
21 - const: fsl,imx31-cspi
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/Linux-v5.15/Documentation/devicetree/bindings/arm/
Dfsl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shawn Guo <shawnguo@kernel.org>
11 - Li Yang <leoyang.li@nxp.com>
18 - description: i.MX1 based Boards
20 - enum:
21 - armadeus,imx1-apf9328
22 - fsl,imx1ads
23 - const: fsl,imx1
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/Linux-v5.15/Documentation/devicetree/bindings/mailbox/
Dfsl,mu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Dong Aisheng <aisheng.dong@nxp.com>
13 The Messaging Unit module enables two processors within the SoC to
22 registers (Processor A-facing, Processor B-facing).
27 - const: fsl,imx6sx-mu
28 - const: fsl,imx7ulp-mu
29 - const: fsl,imx8ulp-mu
30 - const: fsl,imx8-mu-scu
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/Linux-v5.15/Documentation/devicetree/bindings/sound/
Dfsl,spdif.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Shengjiu Wang <shengjiu.wang@nxp.com>
20 - fsl,imx35-spdif
21 - fsl,vf610-spdif
22 - fsl,imx6sx-spdif
23 - fsl,imx8qm-spdif
24 - fsl,imx8qxp-spdif
25 - fsl,imx8mq-spdif
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/Linux-v5.15/Documentation/devicetree/bindings/net/
Dfsl,fec.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Joakim Zhang <qiangqing.zhang@nxp.com>
13 - $ref: ethernet-controller.yaml#
18 - enum:
19 - fsl,imx25-fec
20 - fsl,imx27-fec
21 - fsl,imx28-fec
22 - fsl,imx6q-fec
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/Linux-v5.15/sound/soc/fsl/
Dfsl_rpmsg.c1 // SPDX-License-Identifier: GPL-2.0+
2 // Copyright 2018-2021 NXP
5 #include <linux/clk-provider.h>
19 #include "imx-pcm.h"
45 struct clk *p = rpmsg->mclk, *pll = NULL, *npll = NULL; in fsl_rpmsg_hw_params()
50 while (p && rpmsg->pll8k && rpmsg->pll11k) { in fsl_rpmsg_hw_params()
53 if (clk_is_match(pp, rpmsg->pll8k) || in fsl_rpmsg_hw_params()
54 clk_is_match(pp, rpmsg->pll11k)) { in fsl_rpmsg_hw_params()
63 npll = (do_div(rate, 8000) ? rpmsg->pll11k : rpmsg->pll8k); in fsl_rpmsg_hw_params()
67 dev_warn(dai->dev, "failed to set parent %s: %d\n", in fsl_rpmsg_hw_params()
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Dfsl_micfil.c1 // SPDX-License-Identifier: GPL-2.0
20 #include <sound/soc.h>
25 #include "imx-pcm.h"
33 const struct fsl_micfil_soc_data *soc; member
41 int quality; /*QUALITY 2-0 bits */
61 { .compatible = "fsl,imx8mm-micfil", .data = &fsl_micfil_imx8mm },
118 regmap_read(micfil->regmap, REG_MICFIL_CTRL2, &ctrl2_reg); in get_pdm_clk()
119 osr = 16 - ((ctrl2_reg & MICFIL_CTRL2_CICOSR_MASK) in get_pdm_clk()
122 regmap_read(micfil->regmap, REG_MICFIL_CTRL2, &ctrl2_reg); in get_pdm_clk()
141 dev_err(&micfil->pdev->dev, in get_pdm_clk()
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Dfsl_spdif.c1 // SPDX-License-Identifier: GPL-2.0
3 // Freescale S/PDIF ALSA SoC Digital Audio Interface (DAI) driver
23 #include <sound/soc.h>
26 #include "imx-pcm.h"
47 * struct fsl_spdif_soc_data: soc specific data
94 * struct fsl_spdif_priv - Freescale SPDIF private data
95 * @soc: SPDIF soc data
110 * @spbaclk: SPBA clock (optional, depending on SoC design)
116 const struct fsl_spdif_soc_data *soc; member
192 return (clk == STC_TXCLK_SPDIF_ROOT) && !spdif->soc->shared_root_clock; in fsl_spdif_can_set_clk_rate()
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/Linux-v5.15/drivers/crypto/caam/
Dctrl.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* * CAAM control-plane driver backend
3 * Controller-level driver, kernel property detection, initialization
5 * Copyright 2008-2012 Freescale Semiconductor, Inc.
6 * Copyright 2018-2019 NXP
44 /* INIT RNG in non-test mode */ in build_instantiation_desc()
83 * run_descriptor_deco0 - runs a descriptor on DECO0, under direct control of
85 * @ctrldev - pointer to device
86 * @status - descriptor status, after being run
88 * Return: - 0 if no error occurred
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/Linux-v5.15/drivers/staging/media/imx/
Dimx7-mipi-csis.c1 // SPDX-License-Identifier: GPL-2.0
3 * Freescale i.MX7 SoC series MIPI-CSI V3.3 receiver driver
6 * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. All Rights Reserved.
7 * Copyright (C) 2011 - 2013 Samsung Electronics Co., Ltd.
28 #include <media/v4l2-common.h>
29 #include <media/v4l2-device.h>
30 #include <media/v4l2-fwnode.h>
31 #include <media/v4l2-mc.h>
32 #include <media/v4l2-subdev.h>
34 #define CSIS_DRIVER_NAME "imx7-mipi-csis"
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/Linux-v5.15/drivers/mmc/host/
Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-pltfm.h"
29 #include "sdhci-esdhc.h"
81 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
138 * open ended multi-blk IO. Otherwise the TC INT wouldn't
194 * do not has this limitation. so when these SoC use ADMA mode, it need to
213 * struct esdhc_platform_data - platform data for esdhc on i.MX
337 { .compatible = "fsl,imx25-esdhc", .data = &esdhc_imx25_data, },
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/Linux-v5.15/drivers/net/can/spi/mcp251xfd/
Dmcp251xfd-core.c1 // SPDX-License-Identifier: GPL-2.0
3 // mcp251xfd - Microchip MCP251xFD Family CAN controller driver
6 // Marc Kleine-Budde <kernel@pengutronix.de>
90 return __mcp251xfd_get_model_str(priv->devtype_data.model); in mcp251xfd_get_model_str()
119 if (!priv->reg_vdd) in mcp251xfd_vdd_enable()
122 return regulator_enable(priv->reg_vdd); in mcp251xfd_vdd_enable()
127 if (!priv->reg_vdd) in mcp251xfd_vdd_disable()
130 return regulator_disable(priv->reg_vdd); in mcp251xfd_vdd_disable()
136 if (!priv->reg_xceiver) in mcp251xfd_transceiver_enable()
139 return regulator_enable(priv->reg_xceiver); in mcp251xfd_transceiver_enable()
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