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Searched +full:gcc +full:- +full:sdx55 (Results 1 – 18 of 18) sorted by relevance

/Linux-v6.1/arch/arm/boot/dts/
Dqcom-sdx55.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
3 * SDX55 SoC device tree source
9 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sdx55.h>
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
15 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
18 #address-cells = <1>;
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Dqcom-sdx65.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
9 #include <dt-bindings/clock/qcom,gcc-sdx65.h>
10 #include <dt-bindings/clock/qcom,rpmh.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
16 #address-cells = <1>;
17 #size-cells = <1>;
18 qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
19 interrupt-parent = <&intc>;
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/Linux-v6.1/Documentation/devicetree/bindings/clock/
Dqcom,gcc-sdx55.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for SDX55
10 - Vinod Koul <vkoul@kernel.org>
11 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 power domains on SDX55
18 - dt-bindings/clock/qcom,gcc-sdx55.h
22 const: qcom,gcc-sdx55
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Dqcom,rpmhcc.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Taniya Das <tdas@codeaurora.org>
20 - qcom,sc7180-rpmh-clk
21 - qcom,sc7280-rpmh-clk
22 - qcom,sc8180x-rpmh-clk
23 - qcom,sc8280xp-rpmh-clk
24 - qcom,sdm670-rpmh-clk
25 - qcom,sdm845-rpmh-clk
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/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dqcom,pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pci/qcom,pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,sdx55-pcie-ep
16 - qcom,sm8450-pcie-ep
20 - description: Qualcomm-specific PARF configuration registers
21 - description: DesignWare PCIe registers
22 - description: External local bus interface registers
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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dqcom,qmp-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,ipq6018-qmp-pcie-phy
20 - qcom,ipq8074-qmp-gen3-pcie-phy
21 - qcom,ipq8074-qmp-pcie-phy
22 - qcom,msm8998-qmp-pcie-phy
23 - qcom,sc8180x-qmp-pcie-phy
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Dqcom,qmp-usb-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/qcom,qmp-usb-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vinod Koul <vkoul@kernel.org>
19 - qcom,ipq6018-qmp-usb3-phy
20 - qcom,ipq8074-qmp-usb3-phy
21 - qcom,msm8996-qmp-usb3-phy
22 - qcom,msm8998-qmp-usb3-phy
23 - qcom,qcm2290-qmp-usb3-phy
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/Linux-v6.1/Documentation/devicetree/bindings/usb/
Dqcom,dwc3.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Wesley Cheng <quic_wcheng@quicinc.com>
15 - enum:
16 - qcom,ipq4019-dwc3
17 - qcom,ipq6018-dwc3
18 - qcom,ipq8064-dwc3
19 - qcom,ipq8074-dwc3
20 - qcom,msm8953-dwc3
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/Linux-v6.1/drivers/clk/qcom/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_QCOM) += clk-qcom.o
4 clk-qcom-y += common.o
5 clk-qcom-y += clk-regmap.o
6 clk-qcom-y += clk-alpha-pll.o
7 clk-qcom-y += clk-pll.o
8 clk-qcom-y += clk-rcg.o
9 clk-qcom-y += clk-rcg2.o
10 clk-qcom-y += clk-branch.o
11 clk-qcom-y += clk-regmap-divider.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
32 tristate "A7 PLL driver for SDX55 and SDX65"
34 Support for the A7 PLL on SDX55 and SDX65 devices. It provides the CPU with
36 Say Y if you want to support higher CPU frequencies on SDX55 and SDX65
58 tristate "SDX55 and SDX65 APCS Clock Controller"
61 Support for the APCS Clock Controller on SDX55, SDX65 platforms. The
64 such as SDX55, SDX65.
606 tristate "SDX55 Global Clock Controller"
609 Support for the global clock controller on SDX55 devices.
802 tristate "High-Frequency PLL (HFPLL) Clock Controller"
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Dgcc-sdx55.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
12 #include <dt-bindings/clock/qcom,gcc-sdx55.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-pll.h"
18 #include "clk-rcg.h"
19 #include "clk-regmap.h"
1613 { .compatible = "qcom,gcc-sdx55" },
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/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dqcom,nandc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15 - qcom,ipq806x-nand
16 - qcom,ipq4019-nand
17 - qcom,ipq6018-nand
18 - qcom,ipq8074-nand
19 - qcom,sdx55-nand
26 - description: Core Clock
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/Linux-v6.1/Documentation/devicetree/bindings/firmware/
Dqcom,scm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
16 - Bjorn Andersson <bjorn.andersson@linaro.org>
17 - Robert Marko <robimarko@gmail.com>
18 - Guru Das Srinagesh <quic_gurus@quicinc.com>
23 - enum:
24 - qcom,scm-apq8064
25 - qcom,scm-apq8084
26 - qcom,scm-ipq4019
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/Linux-v6.1/drivers/mailbox/
Dqcom-apcs-ipc-mailbox.c1 // SPDX-License-Identifier: GPL-2.0-only
33 .offset = 8, .clk_name = "qcom,apss-ipq6018-clk"
37 .offset = 8, .clk_name = "qcom-apcs-msm8916-clk"
53 .offset = 0x1008, .clk_name = "qcom-sdx55-acps-clk"
66 struct qcom_apcs_ipc *apcs = container_of(chan->mbox, in qcom_apcs_ipc_send_data()
68 unsigned long idx = (unsigned long)chan->con_priv; in qcom_apcs_ipc_send_data()
70 return regmap_write(apcs->regmap, apcs->offset, BIT(idx)); in qcom_apcs_ipc_send_data()
86 apcs = devm_kzalloc(&pdev->dev, sizeof(*apcs), GFP_KERNEL); in qcom_apcs_ipc_probe()
88 return -ENOMEM; in qcom_apcs_ipc_probe()
94 regmap = devm_regmap_init_mmio(&pdev->dev, base, &apcs_regmap_config); in qcom_apcs_ipc_probe()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mailbox/
Dqcom,apcs-kpss-global.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/mailbox/qcom,apcs-kpss-global.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
14 - Jassi Brar <jassisinghbrar@gmail.com>
19 - items:
20 - enum:
21 - qcom,ipq6018-apcs-apps-global
22 - qcom,ipq8074-apcs-apps-global
23 - qcom,msm8976-apcs-kpss-global
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dsdhci-msm.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/mmc/sdhci-msm.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: Qualcomm SDHCI controller (sdhci-msm)
11 - Bhupesh Sharma <bhupesh.sharma@linaro.org>
20 - enum:
21 - qcom,sdhci-msm-v4
23 - items:
24 - enum:
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/Linux-v6.1/drivers/phy/qualcomm/
Dphy-qcom-qmp-usb.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
74 * if yes, then offset gives index in the reg-layout
106 /* set of registers with offsets different per-PHY */
1430 /* struct qmp_phy_cfg - per-PHY initialization config */
1434 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
1478 * struct qmp_phy - per-lane phy descriptor
1511 * struct qcom_qmp - structure holding QMP phy block attributes
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Dphy-qcom-qmp-pcie.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
46 * if yes, then offset gives index in the reg-layout
78 /* set of registers with offsets different per-PHY */
1303 /* struct qmp_phy_cfg - per-PHY initialization config */
1307 /* Init sequence for PHY blocks - serdes, tx, rx, pcs */
1358 * struct qmp_phy - per-lane phy descriptor
1387 * struct qcom_qmp - structure holding QMP phy block attributes
[all …]