Lines Matching +full:gcc +full:- +full:sdx55

1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/qcom,gcc-sdx55.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Global Clock & Reset Controller Binding for SDX55
10   - Vinod Koul <vkoul@kernel.org>
11   - Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
15   power domains on SDX55
18   - dt-bindings/clock/qcom,gcc-sdx55.h
22     const: qcom,gcc-sdx55
26       - description: Board XO source
27       - description: Sleep clock source
28       - description: PLL test clock source (Optional clock)
31   clock-names:
33       - const: bi_tcxo
34       - const: sleep_clk
35       - const: core_bi_pll_test_se # Optional clock
39   - compatible
40   - clocks
41   - clock-names
44   - $ref: qcom,gcc.yaml#
49   - |
50     #include <dt-bindings/clock/qcom,rpmh.h>
51     clock-controller@100000 {
52       compatible = "qcom,gcc-sdx55";
56       clock-names = "bi_tcxo", "sleep_clk", "core_bi_pll_test_se";
57       #clock-cells = <1>;
58       #reset-cells = <1>;
59       #power-domain-cells = <1>;