| /Linux-v5.4/arch/arm/boot/dts/ |
| D | imx7ulp.dtsi | 161 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART4>;
162 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
163 assigned-clock-rates = <24000000>;
173 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPUART5>;
174 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
175 assigned-clock-rates = <48000000>;
182 assigned-clocks = <&pcc2 IMX7ULP_CLK_LPTPM4>;
183 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
233 assigned-clocks = <&pcc2 IMX7ULP_CLK_USDHC0>;
234 assigned-clock-parents = <&scg1 IMX7ULP_CLK_NIC1_DIV>;
[all …]
|
| D | imx7d-pico.dtsi | 75 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
77 assigned-clock-parents = <&clks IMX7D_CKIL>;
78 assigned-clock-rates = <0>, <32768>;
91 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
93 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
94 assigned-clock-rates = <0>, <100000000>;
236 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
238 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
239 assigned-clock-rates = <0>, <24576000>;
269 assigned-clocks = <&clks IMX7D_UART5_ROOT_SRC>;
[all …]
|
| D | exynos5422-odroidxu3-audio.dtsi | 32 assigned-clocks = <&clock CLK_MOUT_EPLL>,
41 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
47 assigned-clock-rates = <0>,
66 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
68 assigned-clock-rates = <(196608000 / 256)>,
87 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
88 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
|
| D | exynos4412-odroid-common.dtsi | 144 assigned-clocks = <&clock CLK_FOUT_EPLL>;
145 assigned-clock-rates = <45158401>;
149 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
155 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
158 assigned-clock-rates = <0>, <0>,
202 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
204 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
205 assigned-clock-rates = <0>, <176000000>;
210 assigned-clocks = <&clock CLK_MOUT_FIMC1>,
212 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
[all …]
|
| D | exynos5422-odroidxu4.dts | 38 assigned-clocks = <&clock CLK_MOUT_EPLL>,
47 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
53 assigned-clock-rates = <0>,
73 assigned-clocks = <&clock_audss EXYNOS_DOUT_SRP>,
75 assigned-clock-rates = <(196608000 / 256)>,
81 assigned-clocks = <&i2s0 CLK_I2S_RCLK_SRC>;
82 assigned-clock-parents = <&clock_audss EXYNOS_SCLK_I2S>;
|
| D | imx7d-zii-rpu2.dts | 189 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
190 assigned-clock-rates = <884736000>;
211 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
213 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
214 assigned-clock-rates = <0>, <100000000>;
294 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
296 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
297 assigned-clock-rates = <0>, <100000000>;
457 assigned-clocks = <&cs2000>;
458 assigned-clock-rates = <24000000>;
[all …]
|
| D | imx7d-cl-som-imx7.dts | 43 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
45 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
46 assigned-clock-rates = <0>, <100000000>;
71 assigned-clocks = <&clks IMX7D_ENET2_TIME_ROOT_SRC>,
73 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
74 assigned-clock-rates = <0>, <100000000>;
193 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
194 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
208 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
209 assigned-clock-rates = <400000000>;
|
| D | imx7s-warp.dts | 84 assigned-clocks = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
85 assigned-clock-rates = <884736000>;
268 assigned-clocks = <&clks IMX7D_SAI1_ROOT_SRC>,
270 assigned-clock-parents = <&clks IMX7D_PLL_AUDIO_POST_DIV>;
271 assigned-clock-rates = <0>, <36864000>;
278 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
279 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
286 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
287 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
295 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
[all …]
|
| D | imx7d-nitrogen7.dts | 114 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
116 assigned-clock-parents = <&clks IMX7D_CKIL>;
117 assigned-clock-rates = <0>, <32768>;
127 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
129 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
130 assigned-clock-rates = <0>, <100000000>;
318 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
319 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
326 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
327 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
[all …]
|
| D | exynos4412-itop-elite.dts | 130 assigned-clocks = <&clock CLK_MOUT_CAM0>;
131 assigned-clock-parents = <&clock CLK_XUSBXTI>;
135 assigned-clocks = <&clock_audss EXYNOS_MOUT_AUDSS>,
139 assigned-clock-parents = <&clock CLK_FOUT_EPLL>,
141 assigned-clock-rates = <0>, <0>, <112896000>, <11289600>;
159 assigned-clocks = <&clock CLK_MOUT_FIMC0>,
161 assigned-clock-parents = <&clock CLK_MOUT_MPLL_USER_T>;
162 assigned-clock-rates = <0>, <176000000>;
|
| /Linux-v5.4/include/media/ |
| D | v4l2-mem2mem.h | 129 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
139 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
163 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
186 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
196 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
209 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
220 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
231 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
242 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
253 * @m2m_ctx: m2m context assigned to the instance given by struct &v4l2_m2m_ctx
[all …]
|
| /Linux-v5.4/Documentation/devicetree/bindings/sound/ |
| D | brcm,cygnus-audio.txt | 13 - assigned-clocks: PLL and leaf clocks
14 - assigned-clock-parents: parent clocks of the assigned clocks
16 - assigned-clock-rates: List of clock frequencies of the
17 assigned clocks
36 assigned-clocks = <&audiopll BCM_CYGNUS_AUDIOPLL>,
40 assigned-clock-parents = <&audiopll BCM_CYGNUS_AUDIOPLL>;
41 assigned-clock-rates = <1769470191>,
|
| D | mt2701-afe-pcm.txt | 47 - assigned-clocks: list of input clocks and dividers for the audio system.
49 - assigned-clocks-parents: parent of input clocks of assigned clocks.
50 - assigned-clock-rates: list of clock frequencies of assigned clocks.
138 assigned-clocks = <&topckgen CLK_TOP_AUD_MUX1_SEL>,
142 assigned-clock-parents = <&topckgen CLK_TOP_AUD1PLL_98M>,
144 assigned-clock-rates = <0>, <0>, <49152000>, <45158400>;
|
| /Linux-v5.4/drivers/clk/ |
| D | clk-conf.c | 20 num_parents = of_count_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
27 rc = of_parse_phandle_with_args(node, "assigned-clock-parents", in __set_clk_parents()
46 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_parents()
57 pr_warn("clk: couldn't get assigned clock %d for %pOF\n", in __set_clk_parents()
85 of_property_for_each_u32(node, "assigned-clock-rates", prop, cur, rate) { in __set_clk_rates()
87 rc = of_parse_phandle_with_args(node, "assigned-clocks", in __set_clk_rates()
120 * of_clk_set_defaults() - parse and set assigned clocks configuration
124 * This function parses 'assigned-{clocks/clock-parents/clock-rates}' properties
127 * listed in its 'assigned-clocks' or 'assigned-clock-parents' properties.
|
| /Linux-v5.4/Documentation/devicetree/bindings/display/msm/ |
| D | dpu.txt | 38 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
39 - assigned-clock-rates: list of clock frequencies sorted in the same order as
40 the assigned-clocks property.
70 - assigned-clocks: list of clock specifiers for clocks needing rate assignment
71 - assigned-clock-rates: list of clock frequencies sorted in the same order as
72 the assigned-clocks property.
87 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>;
88 assigned-clock-rates = <300000000>;
116 assigned-clocks = <&clock_dispcc DISP_CC_MDSS_MDP_CLK>,
118 assigned-clock-rates = <0 0 300000000 19200000>;
|
| /Linux-v5.4/Documentation/devicetree/bindings/clock/ |
| D | clock-bindings.txt | 135 ==Assigned clock parents and rates==
139 node through assigned-clocks, assigned-clock-parents and assigned-clock-rates
140 properties. The assigned-clock-parents property should contain a list of parent
142 assigned-clock-rates property should contain a list of frequencies in Hz. Both
143 these properties should correspond to the clocks listed in the assigned-clocks
156 assigned-clocks = <&clkcon 0>, <&pll 2>;
157 assigned-clock-parents = <&pll 2>;
158 assigned-clock-rates = <0>, <460800>;
162 the <&pll 2> clock is assigned a frequency value of 460800 Hz.
|
| D | cirrus,lochnagar.txt | 55 - assigned-clocks : A list of Lochnagar clocks to be reparented, see
57 - assigned-clock-parents : Parents to be assigned to the clocks
58 listed in "assigned-clocks".
83 assigned-clocks = <&lochnagar-clk LOCHNAGAR_CDC_MCLK1>,
85 assigned-clock-parents = <&clk-audio>,
|
| /Linux-v5.4/arch/mips/boot/dts/img/ |
| D | pistachio.dtsi | 51 assigned-clocks = <&clk_periph PERIPH_CLK_I2C0_PRE_DIV>,
53 assigned-clock-rates = <100000000>, <33333334>;
69 assigned-clocks = <&clk_periph PERIPH_CLK_I2C1_PRE_DIV>,
71 assigned-clock-rates = <100000000>, <33333334>;
87 assigned-clocks = <&clk_periph PERIPH_CLK_I2C2_PRE_DIV>,
89 assigned-clock-rates = <100000000>, <33333334>;
105 assigned-clocks = <&clk_periph PERIPH_CLK_I2C3_PRE_DIV>,
107 assigned-clock-rates = <100000000>, <33333334>;
141 assigned-clocks = <&clk_core CLK_I2S_DIV>;
142 assigned-clock-rates = <12288000>;
[all …]
|
| /Linux-v5.4/Documentation/s390/ |
| D | vfio-ap.rst | 10 The AP devices provide cryptographic functions to all CPUs assigned to a
27 functions. There can be from 0 to 256 adapters assigned to an LPAR. Adapters
28 assigned to the LPAR in which a linux host is running will be available to
34 The AP adapter cards are assigned to a given LPAR via the system's Activation
36 in the LPAR, the AP bus detects the AP adapter cards assigned to the LPAR and
37 creates a sysfs device for each assigned adapter. For example, if AP adapters
38 4 and 10 (0x0a) are assigned to the LPAR, the AP bus will create the following
68 The AP usage and control domains are assigned to a given LPAR via the system's
71 domains assigned to the LPAR. The domain number of each usage domain and
91 domains 6 and 71 (0x47) are assigned to the LPAR, the AP bus will create the
[all …]
|
| /Linux-v5.4/Documentation/devicetree/bindings/rtc/ |
| D | st,stm32-rtc.txt | 25 - assigned-clocks: reference to the rtc_ck clock entry.
26 - assigned-clock-parents: phandle of the new parent clock of rtc_ck.
34 assigned-clocks = <&rcc 1 CLK_RTC>;
35 assigned-clock-parents = <&rcc 1 CLK_LSE>;
46 assigned-clocks = <&rcc RTC_CK>;
47 assigned-clock-parents = <&rcc LSE_CK>;
|
| /Linux-v5.4/Documentation/devicetree/bindings/phy/ |
| D | phy-rockchip-typec.txt | 11 - assigned-clocks: main clock, should be <&cru SCLK_UPHY0_TCPDCORE> or
13 - assigned-clock-rates : the phy core clk frequency, shall be: 50000000
46 assigned-clocks = <&cru SCLK_UPHY0_TCPDCORE>;
47 assigned-clock-rates = <50000000>;
70 assigned-clocks = <&cru SCLK_UPHY1_TCPDCORE>;
71 assigned-clock-rates = <50000000>;
|
| D | ti,phy-am654-serdes.txt | 27 - assigned-clocks: As defined in
29 - assigned-clock-parents: As defined in
56 The assigned-clocks and assigned-clock-parents is used here to set the
70 assigned-clocks = <&k3_clks 153 4>, <&serdes0 AM654_SERDES_CMU_REFCLK>;
71 assigned-clock-parents = <&k3_clks 153 8>, <&k3_clks 153 4>;
|
| /Linux-v5.4/arch/mips/boot/dts/ingenic/ |
| D | gcw0.dts | 50 assigned-clocks =
53 assigned-clock-parents =
56 assigned-clock-rates =
67 assigned-clocks = <&tcu TCU_CLK_TIMER0>, <&tcu TCU_CLK_TIMER2>;
68 assigned-clock-rates = <750000>, <750000>;
|
| /Linux-v5.4/Documentation/devicetree/bindings/display/hisilicon/ |
| D | hisi-ade.txt | 20 - assigned-clocks: Should contain "clk_ade_core" and "clk_codec_jpeg" clocks'
22 - assigned-clock-rates: clock rates, one for each entry in assigned-clocks.
54 assigned-clocks = <&media_ctrl HI6220_ADE_CORE>,
56 assigned-clock-rates = <360000000>, <288000000>;
|
| /Linux-v5.4/drivers/staging/wilc1000/ |
| D | microchip,wilc1000,spi.txt | 13 - rtc_clk : Clock connected on the rtc clock line. Must be assigned
14 a frequency with assigned-clocks property, and must be
30 assigned-clocks = <&pck1>;
31 assigned-clock-rates = <32768>;
|
