Lines Matching full:assigned
114 assigned-clocks = <&clks IMX7D_CLKO2_ROOT_SRC>,
116 assigned-clock-parents = <&clks IMX7D_CKIL>;
117 assigned-clock-rates = <0>, <32768>;
127 assigned-clocks = <&clks IMX7D_ENET1_TIME_ROOT_SRC>,
129 assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;
130 assigned-clock-rates = <0>, <100000000>;
318 assigned-clocks = <&clks IMX7D_UART1_ROOT_SRC>;
319 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
326 assigned-clocks = <&clks IMX7D_UART2_ROOT_SRC>;
327 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
334 assigned-clocks = <&clks IMX7D_UART3_ROOT_SRC>;
335 assigned-clock-parents = <&clks IMX7D_OSC_24M_CLK>;
342 assigned-clocks = <&clks IMX7D_UART6_ROOT_SRC>;
343 assigned-clock-parents = <&clks IMX7D_PLL_SYS_MAIN_240M_CLK>;
400 assigned-clocks = <&clks IMX7D_USDHC3_ROOT_CLK>;
401 assigned-clock-rates = <400000000>;