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/Linux-v5.10/drivers/scsi/qla2xxx/
Dqla_devtbl.h1 /* SPDX-License-Identifier: GPL-2.0 */
8 "QLA2340", "133MHz PCI-X to 2Gb FC, Single Channel", /* 0x100 */
9 "QLA2342", "133MHz PCI-X to 2Gb FC, Dual Channel", /* 0x101 */
10 "QLA2344", "133MHz PCI-X to 2Gb FC, Quad Channel", /* 0x102 */
11 "QCP2342", "cPCI to 2Gb FC, Dual Channel", /* 0x103 */
12 "QSB2340", "SBUS to 2Gb FC, Single Channel", /* 0x104 */
13 "QSB2342", "SBUS to 2Gb FC, Dual Channel", /* 0x105 */
14 "QLA2310", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x106 */
15 "QLA2332", "Sun 66MHz PCI-X to 2Gb FC, Single Channel", /* 0x107 */
16 "QCP2332", "Sun cPCI to 2Gb FC, Dual Channel", /* 0x108 */
[all …]
/Linux-v5.10/sound/soc/codecs/
Dtas5086.c1 // SPDX-License-Identifier: GPL-2.0-or-later
8 * - implement DAPM and input muxing
9 * - implement modulation limit
10 * - implement non-default PWM start
13 * because the registers are of unequal size, and multi-byte registers
18 * it doesn't matter because the entire map can be accessed as 8-bit
21 * routines have to be open-coded.
71 #define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
89 * Default TAS5086 power-up configuration
130 return 4; in tas5086_register_size()
[all …]
/Linux-v5.10/sound/soc/sprd/
Dsprd-mcdt.c1 // SPDX-License-Identifier: GPL-2.0
14 #include "sprd-mcdt.h"
57 /* Channel water mark definition */
62 /* DMA channel select definition */
65 #define MCDT_DMA_CH1_SEL_MASK GENMASK(7, 4)
66 #define MCDT_DMA_CH1_SEL_SHIFT 4
75 /* DMA channel ACK select definition */
78 /* Channel FIFO definition */
121 u32 orig = readl_relaxed(mcdt->base + reg); in sprd_mcdt_update()
125 writel_relaxed(tmp, mcdt->base + reg); in sprd_mcdt_update()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/powerpc/fsl/
Ddma.txt4 This is a little-endian 4-channel DMA controller, used in Freescale mpc83xx
9 - compatible : must include "fsl,elo-dma"
10 - reg : DMA General Status Register, i.e. DGSR which contains
11 status for all the 4 DMA channels
12 - ranges : describes the mapping between the address space of the
14 - cell-index : controller index. 0 for controller @ 0x8100
15 - interrupts : interrupt specifier for DMA IRQ
17 - DMA channel nodes:
18 - compatible : must include "fsl,elo-dma-channel"
20 - reg : DMA channel specific registers
[all …]
/Linux-v5.10/drivers/media/platform/rcar-vin/
Drcar-core.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Driver for Renesas R-Car VIN
6 * Copyright (C) 2011-2013 Renesas Solutions Corp.
10 * Based on the soc-camera rcar_vin driver
22 #include <media/v4l2-async.h>
23 #include <media/v4l2-fwnode.h>
24 #include <media/v4l2-mc.h>
26 #include "rcar-vin.h"
29 * The companion CSI-2 receiver driver (rcar-csi2) is known
31 * pads (pad 1-4). So to translate a pad on the remote
[all …]
/Linux-v5.10/drivers/hsi/controllers/
Domap_ssi_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
23 # define SSI_SIDLEMODE_SMART (1 << 4)
33 # define SSI_DATAACCEPT(channel) (1 << (channel)) argument
34 # define SSI_DATAAVAILABLE(channel) (1 << ((channel) + 8)) argument
35 # define SSI_DATAOVERRUN(channel) (1 << ((channel) + 16)) argument
40 # define SSI_GDD_LCH(channel) (1 << (channel)) argument
44 # define SSI_WAKE(channel) (1 << (channel)) argument
51 #define SSI_SST_MODE_REG 4
62 # define SSI_FULL(channel) (1 << (channel)) argument
67 # define SSI_CHANNELS_DEFAULT 4
[all …]
/Linux-v5.10/drivers/net/ethernet/stmicro/stmmac/
Ddwmac4_dma.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
4 * DWC Ether MAC version 4.xx has been used for developing this code.
25 if (axi->axi_lpi_en) in dwmac4_dma_axi()
27 if (axi->axi_xit_frm) in dwmac4_dma_axi()
31 value |= (axi->axi_wr_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
35 value |= (axi->axi_rd_osr_lmt & DMA_AXI_OSR_MAX) << in dwmac4_dma_axi()
43 switch (axi->axi_blen[i]) { in dwmac4_dma_axi()
62 case 4: in dwmac4_dma_axi()
76 u32 rxpbl = dma_cfg->rxpbl ?: dma_cfg->pbl; in dwmac4_dma_init_rx_chan()
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/iio/dac/
Dad5755.txt1 * Analog Devices AD5755 IIO Multi-Channel DAC Linux Driver
4 - compatible: Has to contain one of the following:
6 adi,ad5755-1
11 - reg: spi chip select number for the device
12 - spi-cpha or spi-cpol: is the only modes that is supported
15 - spi-max-frequency: Definition as per
16 Documentation/devicetree/bindings/spi/spi-bus.txt
19 See include/dt-bindings/iio/ad5755.h
20 - adi,ext-dc-dc-compenstation-resistor: boolean set if the hardware have an
23 - adi,dc-dc-phase:
[all …]
/Linux-v5.10/drivers/media/pci/tw5864/
Dtw5864-reg.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * TW5864 driver - registers description
8 /* According to TW5864_datasheet_0.6d.pdf, tw5864b1-ds.pdf */
10 /* Register Description - Direct Map Space */
11 /* 0x0000 ~ 0x1ffc - H264 Register Map */
26 #define TW5864_EMU_EN_LPF BIT(4)
47 #define TW5864_MAS_SLICE_END BIT(4)
52 * [15:0] Two bit for each channel (channel 0 ~ 7). Each two bits are the buffer
53 * pointer for the last encoded frame of the corresponding channel.
76 * 0->3 4 VLC data buffer in DDR (1M each)
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/sound/
Dtlv320adcx140.yaml1 # SPDX-License-Identifier: (GPL-2.0+ OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Texas Instruments TLV320ADCX140 Quad Channel Analog-to-Digital Converter
11 - Dan Murphy <dmurphy@ti.com>
14 The TLV320ADCX140 are multichannel (4-ch analog recording or 8-ch digital
15 PDM microphones recording), high-performance audio, analog-to-digital
28 - const: ti,tlv320adc3140
29 - const: ti,tlv320adc5140
30 - const: ti,tlv320adc6140
[all …]
/Linux-v5.10/sound/pci/ca0106/
Dca0106.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright (c) 2004 James Courtier-Dutton <James@superbug.demon.co.uk>
12 * Removed noise from Center/LFE channel when in Analog mode.
50 * Implement support for Line-in capture on SB Live 24bit.
73 #define IPR_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
74 #define IPR_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
87 #define IPR_MIDI_RX_A 0x00000004 /* MIDI UART-A Receive buffer non-empty */
88 #define IPR_MIDI_TX_A 0x00000002 /* MIDI UART-A Transmit buffer empty */
93 #define INTE_MIDI_RX_B 0x00020000 /* MIDI UART-B Receive buffer non-empty */
94 #define INTE_MIDI_TX_B 0x00010000 /* MIDI UART-B Transmit buffer empty */
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/dma/
Dste-dma40.txt4 - compatible: "stericsson,dma40"
5 - reg: Address range of the DMAC registers
6 - reg-names: Names of the above areas to use during resource look-up
7 - interrupt: Should contain the DMAC interrupt number
8 - #dma-cells: must be <3>
9 - memcpy-channels: Channels to be used for memcpy
12 - dma-channels: Number of channels supported by hardware - if not present
14 - disabled-channels: Channels which can not be used
18 dma: dma-controller@801c0000 {
19 compatible = "stericsson,db8500-dma40", "stericsson,dma40";
[all …]
/Linux-v5.10/drivers/clk/bcm/
Dclk-ns2.c16 #include <linux/clk-provider.h>
21 #include <dt-bindings/clock/bcm-ns2.h>
22 #include "clk-iproc.h"
45 .dig_filter = DF_VAL(0x0, 9, 3, 5, 4, 2, 3),
46 .ndiv_int = REG_VAL(0x8, 4, 10),
47 .pdiv = REG_VAL(0x8, 0, 4),
59 .channel = BCM_NS2_GENPLL_SCR_SCR_CLK,
65 .channel = BCM_NS2_GENPLL_SCR_FS_CLK,
71 .channel = BCM_NS2_GENPLL_SCR_AUDIO_CLK,
77 .channel = BCM_NS2_GENPLL_SCR_CH3_UNUSED,
[all …]
Dclk-sr.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/bcm-sr.h>
12 #include "clk-iproc.h"
39 .dig_filter = DF_VAL(0x0, 4, 3, 0, 4, 7, 3),
43 .pdiv = REG_VAL(0x14, 0, 4),
49 .channel = BCM_SR_GENPLL0_125M_CLK,
55 .channel = BCM_SR_GENPLL0_SCR_CLK,
61 .channel = BCM_SR_GENPLL0_250M_CLK,
67 .channel = BCM_SR_GENPLL0_PCIE_AXI_CLK,
[all …]
Dclk-cygnus.c16 #include <linux/clk-provider.h>
23 #include <dt-bindings/clock/bcm-cygnus.h>
24 #include "clk-iproc.h"
55 CLK_OF_DECLARE(cygnus_armpll, "brcm,cygnus-armpll", cygnus_armpll_init);
62 .dig_filter = DF_VAL(0x0, 4, 3, 0, 4, 7, 3),
66 .pdiv = REG_VAL(0x14, 0, 4),
73 .channel = BCM_CYGNUS_GENPLL_AXI21_CLK,
79 .channel = BCM_CYGNUS_GENPLL_250MHZ_CLK,
85 .channel = BCM_CYGNUS_GENPLL_IHOST_SYS_CLK,
91 .channel = BCM_CYGNUS_GENPLL_ENET_SW_CLK,
[all …]
/Linux-v5.10/drivers/hwmon/
Dnct7904.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * nct7904.c - driver for Nuvoton NCT7904D.
17 * nct7904d 20 12 4 5 8 0xc5
45 #define FANCTL_MAX 4 /* Counted from 1 */
47 #define TEMP_MAX 4 /* Counted from 1 */
92 #define FANCTL1_FMR_REG 0x00 /* Bank 3; 1 reg per channel */
93 #define FANCTL1_OUT_REG 0x10 /* Bank 3; 1 reg per channel */
110 /*The timeout range is 1-255 minutes*/
149 mutex_lock(&data->bank_lock); in nct7904_bank_lock()
150 if (data->bank_sel == bank) in nct7904_bank_lock()
[all …]
Dmax197.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (c) 2012 Savoir-faire Linux Inc.
21 #include <linux/hwmon-sysfs.h>
25 #define MAX199_LIMIT 4000 /* 4V */
32 #define MAX197_RNG (1 << 4) /* Full range */
40 * struct max197_data - device instance specific data
44 * @limit: Max range value (10V for MAX197, 4V for MAX199).
57 static inline void max197_set_unipolarity(struct max197_data *data, int channel) in max197_set_unipolarity() argument
59 data->ctrl_bytes[channel] &= ~MAX197_BIP; in max197_set_unipolarity()
62 static inline void max197_set_bipolarity(struct max197_data *data, int channel) in max197_set_bipolarity() argument
[all …]
/Linux-v5.10/drivers/net/ethernet/microchip/
Dlan743x_main.h1 /* SPDX-License-Identifier: GPL-2.0+ */
31 #define HW_CFG_EE_OTP_RELOAD_ BIT(4)
43 #define PMT_CTL_ETH_PHY_RST_ BIT(4)
89 #define FCT_RX_CTL_EN_(channel) BIT(28 + (channel)) argument
90 #define FCT_RX_CTL_DIS_(channel) BIT(24 + (channel)) argument
91 #define FCT_RX_CTL_RESET_(channel) BIT(20 + (channel)) argument
94 #define FCT_TX_CTL_EN_(channel) BIT(28 + (channel)) argument
95 #define FCT_TX_CTL_DIS_(channel) BIT(24 + (channel)) argument
96 #define FCT_TX_CTL_RESET_(channel) BIT(20 + (channel)) argument
162 #define MAC_WUF_CFG(index) (MAC_WUF_CFG_BEGIN + (4 * (index)))
[all …]
/Linux-v5.10/sound/usb/caiaq/
Dcontrol.c1 // SPDX-License-Identifier: GPL-2.0-or-later
24 struct snd_usb_caiaqdev *cdev = caiaqdev(chip->card); in control_info()
25 int pos = kcontrol->private_value; in control_info()
29 uinfo->count = 1; in control_info()
32 switch (cdev->chip.usb_id) { in control_info()
37 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
38 uinfo->value.integer.min = 0; in control_info()
39 uinfo->value.integer.max = 2; in control_info()
54 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; in control_info()
55 uinfo->value.integer.min = 0; in control_info()
[all …]
/Linux-v5.10/drivers/clocksource/
Dsamsung_pwm_timer.c1 // SPDX-License-Identifier: GPL-2.0-only
6 * samsung - Common hr-timer support (s3c and s5p)
41 #define TCFG1_SHIFT(x) ((x) * 4)
45 * Each channel occupies 4 bits in TCON register, but there is a gap of 4
46 * bits (one channel) after channel 0, so channels have different numbering
49 * In addition, the location of autoreload bit for channel 4 (TCON channel 5)
52 #define TCON_START(chan) (1 << (4 * (chan) + 0))
53 #define TCON_MANUALUPDATE(chan) (1 << (4 * (chan) + 1))
54 #define TCON_INVERT(chan) (1 << (4 * (chan) + 2))
55 #define _TCON_AUTORELOAD(chan) (1 << (4 * (chan) + 3))
[all …]
/Linux-v5.10/drivers/iio/dac/
Dti-dac5571.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * ti-dac5571.c - Texas Instruments 8/10/12-bit 1/4-channel DAC driver
38 [quad_8bit] = {.num_channels = 4, .resolution = 8},
39 [quad_10bit] = {.num_channels = 4, .resolution = 10},
40 [quad_12bit] = {.num_channels = 4, .resolution = 12},
48 u16 val[4];
49 bool powerdown[4];
50 u8 powerdown_mode[4];
52 int (*dac5571_cmd)(struct dac5571_data *data, int channel, u16 val);
53 int (*dac5571_pwrdwn)(struct dac5571_data *data, int channel, u8 pwrdwn);
[all …]
/Linux-v5.10/include/linux/
Dhyperv.h1 /* SPDX-License-Identifier: GPL-2.0-only */
27 #include <asm/hyperv-tlfs.h>
48 * gva: |-- 64k --|-- 64k --| ... |
49 * gpa: | 4k | 4k | ... | 4k | 4k | 4k | ... | 4k |
53 * gpadl: | 4k | 4k | ... | 4k | 4k | 4k | ... | 4k | ... |
59 * gva: |-- 64k --|-- 64k --| ... |-- 64k --|-- 64k --| ... |
60 * gpa: | 4k | .. | 4k | 4k | ... | 4k | ... | 4k | .. | 4k | .. | ... |
68 * gpadl: | 4k | 4k | ... | ... | 4k | 4k | ... |
69 * index: 0 1 2 ... 16 ... n-15 n-14 n-13 ... 2n-30
76 /* Single-page buffer */
[all …]
/Linux-v5.10/drivers/net/wireless/mediatek/mt76/mt76x2/
Deeprom.c1 // SPDX-License-Identifier: ISC
17 void *src = dev->mt76.eeprom.data + MT_EE_MAC_ADDR; in mt76x2_eeprom_get_macaddr()
19 memcpy(dev->mt76.macaddr, src, ETH_ALEN); in mt76x2_eeprom_get_macaddr()
69 GROUP_5G(4), in mt76x2_apply_cal_free_data()
80 struct device_node *np = dev->mt76.dev->of_node; in mt76x2_apply_cal_free_data()
81 u8 *eeprom = dev->mt76.eeprom.data; in mt76x2_apply_cal_free_data()
82 u8 prev_grp0[4] = { in mt76x2_apply_cal_free_data()
91 if (!np || !of_property_read_bool(np, "mediatek,eeprom-merge-otp")) in mt76x2_apply_cal_free_data()
125 u16 val = get_unaligned_le16(dev->mt76.eeprom.data); in mt76x2_check_eeprom()
128 val = get_unaligned_le16(dev->mt76.eeprom.data + MT_EE_PCI_ID); in mt76x2_check_eeprom()
[all …]
Dmcu.c1 // SPDX-License-Identifier: ISC
15 int mt76x2_mcu_set_channel(struct mt76x02_dev *dev, u8 channel, u8 bw, in mt76x2_mcu_set_channel() argument
28 } __packed __aligned(4) msg = { in mt76x2_mcu_set_channel()
29 .idx = channel, in mt76x2_mcu_set_channel()
32 .chainmask = cpu_to_le16(dev->chainmask), in mt76x2_mcu_set_channel()
35 /* first set the channel without the extension channel info */ in mt76x2_mcu_set_channel()
47 u8 channel) in mt76x2_mcu_load_cr() argument
56 } __packed __aligned(4) msg = { in mt76x2_mcu_load_cr()
59 .ch = channel, in mt76x2_mcu_load_cr()
68 /* first set the channel without the extension channel info */ in mt76x2_mcu_load_cr()
[all …]
/Linux-v5.10/drivers/s390/net/
Dlcs.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Linux for S/390 Lan Channel Station Network Driver
86 lcs_dbf_trace = debug_register("lcs_trace", 4, 1, 8); in lcs_register_debug_facility()
90 return -ENOMEM; in lcs_register_debug_facility()
103 lcs_alloc_channel(struct lcs_channel *channel) in lcs_alloc_channel() argument
110 channel->iob[cnt].data = in lcs_alloc_channel()
112 if (channel->iob[cnt].data == NULL) in lcs_alloc_channel()
114 channel->iob[cnt].state = LCS_BUF_STATE_EMPTY; in lcs_alloc_channel()
119 while (cnt-- > 0) in lcs_alloc_channel()
120 kfree(channel->iob[cnt].data); in lcs_alloc_channel()
[all …]

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