1 /* SPDX-License-Identifier: GPL-2.0+ */
31 #define HW_CFG_EE_OTP_RELOAD_			BIT(4)
43 #define PMT_CTL_ETH_PHY_RST_			BIT(4)
89 #define FCT_RX_CTL_EN_(channel)		BIT(28 + (channel))  argument
90 #define FCT_RX_CTL_DIS_(channel)	BIT(24 + (channel))  argument
91 #define FCT_RX_CTL_RESET_(channel)	BIT(20 + (channel))  argument
94 #define FCT_TX_CTL_EN_(channel)		BIT(28 + (channel))  argument
95 #define FCT_TX_CTL_DIS_(channel)	BIT(24 + (channel))  argument
96 #define FCT_TX_CTL_RESET_(channel)	BIT(20 + (channel))  argument
162 #define MAC_WUF_CFG(index)		(MAC_WUF_CFG_BEGIN + (4 * (index)))
182 /* offset 0x400 - 0x500, x may range from 0 to 32, for a total of 33 entries */
186 /* offset 0x404 - 0x504, x may range from 0 to 32, for a total of 33 entries */
218 #define INT_BIT_DMA_RX_(channel)	BIT(24 + (channel))  argument
220 #define INT_BIT_DMA_TX_(channel)	BIT(16 + (channel))  argument
241 #define INT_VEC_MAP0_RX_VEC_(channel, vector)	\  argument
242 	(((u32)(vector)) << ((channel) << 2))
245 #define INT_VEC_MAP1_TX_VEC_(channel, vector)	\  argument
246 	(((u32)(vector)) << ((channel) << 2))
268 #define PTP_CMD_CTL_PTP_CLOCK_LOAD_			BIT(4)
274 #define PTP_GENERAL_CONFIG_CLOCK_EVENT_X_MASK_(channel) \  argument
275 	(0x7 << (1 + ((channel) << 2)))
280 #define PTP_GENERAL_CONFIG_CLOCK_EVENT_10MS_	(4)
282 #define PTP_GENERAL_CONFIG_CLOCK_EVENT_X_SET_(channel, value) \  argument
283 	(((value) & 0x7) << (1 + ((channel) << 2)))
284 #define PTP_GENERAL_CONFIG_RELOAD_ADD_X_(channel)	(BIT((channel) << 2))  argument
302 #define PTP_CLOCK_TARGET_SEC_X(channel)		(0x0A30 + ((channel) << 4))  argument
303 #define PTP_CLOCK_TARGET_NS_X(channel)		(0x0A34 + ((channel) << 4))  argument
304 #define PTP_CLOCK_TARGET_RELOAD_SEC_X(channel)	(0x0A38 + ((channel) << 4))  argument
305 #define PTP_CLOCK_TARGET_RELOAD_NS_X(channel)	(0x0A3C + ((channel) << 4))  argument
311 #define PTP_CAP_INFO_TX_TS_CNT_GET_(reg_val)	(((reg_val) & 0x00000070) >> 4)
335 	((((u32)(val)) << 4) & DMAC_CFG_MAX_READ_REQ_MASK_)
366 #define DMAC_CMD_TX_SWR_(channel)		BIT(24 + (channel))  argument
367 #define DMAC_CMD_START_T_(channel)		BIT(20 + (channel))  argument
368 #define DMAC_CMD_STOP_T_(channel)		BIT(16 + (channel))  argument
369 #define DMAC_CMD_RX_SWR_(channel)		BIT(8 + (channel))  argument
370 #define DMAC_CMD_START_R_(channel)		BIT(4 + (channel))  argument
371 #define DMAC_CMD_STOP_R_(channel)		BIT(0 + (channel))  argument
376 #define DMAC_INT_BIT_RXFRM_(channel)		BIT(16 + (channel))  argument
377 #define DMAC_INT_BIT_TX_IOC_(channel)		BIT(0 + (channel))  argument
379 #define RX_CFG_A(channel)			(0xC40 + ((channel) << 6))  argument
392 #define RX_CFG_B(channel)			(0xC44 + ((channel) << 6))  argument
400 #define RX_BASE_ADDRH(channel)			(0xC48 + ((channel) << 6))  argument
402 #define RX_BASE_ADDRL(channel)			(0xC4C + ((channel) << 6))  argument
404 #define RX_HEAD_WRITEBACK_ADDRH(channel)	(0xC50 + ((channel) << 6))  argument
406 #define RX_HEAD_WRITEBACK_ADDRL(channel)	(0xC54 + ((channel) << 6))  argument
408 #define RX_HEAD(channel)			(0xC58 + ((channel) << 6))  argument
410 #define RX_TAIL(channel)			(0xC5C + ((channel) << 6))  argument
414 #define RX_CFG_C(channel)			(0xC64 + ((channel) << 6))  argument
416 #define RX_CFG_C_RX_INT_EN_R2C_			BIT(4)
420 #define TX_CFG_A(channel)			(0xD40 + ((channel) << 6))  argument
434 #define TX_CFG_B(channel)			(0xD44 + ((channel) << 6))  argument
438 #define TX_BASE_ADDRH(channel)			(0xD48 + ((channel) << 6))  argument
440 #define TX_BASE_ADDRL(channel)			(0xD4C + ((channel) << 6))  argument
442 #define TX_HEAD_WRITEBACK_ADDRH(channel)	(0xD50 + ((channel) << 6))  argument
444 #define TX_HEAD_WRITEBACK_ADDRL(channel)	(0xD54 + ((channel) << 6))  argument
446 #define TX_HEAD(channel)			(0xD58 + ((channel) << 6))  argument
448 #define TX_TAIL(channel)			(0xD5C + ((channel) << 6))  argument
453 #define TX_CFG_C(channel)			(0xD64 + ((channel) << 6))  argument
456 #define TX_CFG_C_TX_INT_EN_R2C_			BIT(4)
541 #define LAN743X_MAX_RX_CHANNELS		(4)
545 #define LAN743X_USED_RX_CHANNELS	(4)
585 #define LAN743X_VECTOR_FLAG_SOURCE_ENABLE_CHECK		BIT(4)
728 #define LAN743X_COMPONENT_FLAG_RX(channel)  BIT(20 + (channel))  argument