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/Linux-v5.4/arch/arm/include/asm/hardware/
Dentry-macro-iomd.S104 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
105 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
106 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
107 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
108 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
109 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
110 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
111 .byte 31,31,31,31,31,31,31,31,31,31,31,31,31,31,31,31
/Linux-v5.4/drivers/media/platform/omap3isp/
Dnoise_filter_table.h16 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31,
17 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31, 31
/Linux-v5.4/drivers/infiniband/hw/i40iw/
Di40iw_register.h45 #define I40E_PFHMC_SDCMD_PMSDWR_SHIFT 31
63 #define I40E_GLHMC_VFPDINV(_i) (0x000C8300 + ((_i) * 4)) /* _i=0...31 */ /* Reset: CO…
90 #define I40E_PFPE_CCQPSTATUS_CCQP_ERR_SHIFT 31
109 #define I40E_PFPE_CQPTAIL_CQP_OP_ERR_SHIFT 31
158 #define I40E_VFPE_CCQPSTATUS_CCQP_ERR_SHIFT 31
182 #define I40E_VFPE_CQPTAIL_CQP_OP_ERR_SHIFT 31
259 #define I40E_GLPE_RUPM_GCTL_SWLB_MODE_SHIFT 31
270 #define I40E_GLPE_VFAEQEDROPCNT(_i) (0x00132540 + ((_i) * 4)) /* _i=0...31 */ /* Rese…
271 #define I40E_GLPE_VFAEQEDROPCNT_MAX_INDEX 31
274 #define I40E_GLPE_VFCEQEDROPCNT(_i) (0x00132440 + ((_i) * 4)) /* _i=0...31 */ /* Rese…
[all …]
/Linux-v5.4/arch/powerpc/lib/
Dfeature-fixups-test.S47 or 31,31,31
51 or 31,31,31
67 or 31,31,31
68 or 31,31,31
82 or 31,31,31
83 or 31,31,31
97 or 31,31,31
98 or 31,31,31
301 or 31,31,31; \
302 or 31,31,31; \
[all …]
/Linux-v5.4/arch/powerpc/xmon/
Dppc-opc.c1018 else if (value >= 24 && value <= 31) in insert_rx()
1047 else if (value >= 24 && value <= 31) in insert_ry()
1589 for (mx = 0, mask = 1L << 31; mx < 32; ++mx, mask >>= 1) in insert_mbe()
1630 ret |= 1L << (31 - i); in extract_mbe()
1638 ret &= ~(1L << (31 - i)); in extract_mbe()
3159 {"ps_nmadd", A (4, 31,0), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
3161 {"ps_nmadd.", A (4, 31,1), A_MASK, PPCPS, 0, {FRT, FRA, FRC, FRB}},
3688 {"bcdsetsgn.", VXVA(4,1409,31), VXVAPS_MASK, PPCVEC3, 0, {VD, VB, PS}},
3748 {"vctzd", VXVA(4,1538,31), VXVA_MASK, PPCVEC3, 0, {VD, VB}},
4593 {"rotlwi", MME(21,31,0), MMBME_MASK, PPCCOM, PPCVLE, {RA, RS, SH}},
[all …]
/Linux-v5.4/Documentation/media/uapi/v4l/
Dpixfmt-meta-vsp1-hgo.rst58 - [31:24]
78 - :cspan:`4` R/Cr/H sum [31:0]
80 - :cspan:`4` G/Y/S sum [31:0]
82 - :cspan:`4` B/Cb/V sum [31:0]
84 - :cspan:`4` R/Cr/H bin 0 [31:0]
88 - :cspan:`4` R/Cr/H bin 63 [31:0]
90 - :cspan:`4` G/Y/S bin 0 [31:0]
94 - :cspan:`4` G/Y/S bin 63 [31:0]
96 - :cspan:`4` B/Cb/V bin 0 [31:0]
100 - :cspan:`4` B/Cb/V bin 63 [31:0]
[all …]
Dpixfmt-meta-vsp1-hgt.rst35 The Saturation position **n** (0 - 31) of the bucket in the matrix is
96 - [31:24]
106 - :cspan:`4` S sum [31:0]
108 - :cspan:`4` Histogram bucket (m=0, n=0) [31:0]
110 - :cspan:`4` Histogram bucket (m=0, n=1) [31:0]
114 - :cspan:`4` Histogram bucket (m=0, n=31) [31:0]
116 - :cspan:`4` Histogram bucket (m=1, n=0) [31:0]
120 - :cspan:`4` Histogram bucket (m=2, n=0) [31:0]
124 - :cspan:`4` Histogram bucket (m=3, n=0) [31:0]
128 - :cspan:`4` Histogram bucket (m=4, n=0) [31:0]
[all …]
/Linux-v5.4/drivers/infiniband/hw/hns/
Dhns_roce_hw_v2.h315 #define V2_CQC_BYTE_4_PAGE_OFFSET_M GENMASK(31, 24)
324 #define V2_CQC_BYTE_16_CQE_HOP_NUM_M GENMASK(31, 30)
333 #define V2_CQC_BYTE_24_CQE_BUF_PG_SZ_M GENMASK(31, 28)
347 #define V2_CQC_BYTE_44_DB_RECORD_ADDR_M GENMASK(31, 1)
356 #define V2_CQC_BYTE_56_CQ_PERIOD_M GENMASK(31, 16)
390 #define SRQC_BYTE_4_SRQN_M GENMASK(31, 8)
402 #define SRQC_BYTE_16_SRQ_CONSUMER_IDX_M GENMASK(31, 16)
426 #define SRQC_BYTE_44_SRQ_IDX_BUF_PG_SZ_M GENMASK(31, 28)
438 #define SRQC_BYTE_56_SRQ_WQE_BUF_PG_SZ_M GENMASK(31, 28)
443 #define SRQC_BYTE_60_SRQ_DB_RECORD_ADDR_M GENMASK(31, 1)
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/Linux-v5.4/arch/x86/include/asm/
Drequired-features.h15 # define NEED_FPU (1<<(X86_FEATURE_FPU & 31))
21 # define NEED_PAE (1<<(X86_FEATURE_PAE & 31))
27 # define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
33 # define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
39 # define NEED_3DNOW (1<<(X86_FEATURE_3DNOW & 31))
45 # define NEED_NOPL (1<<(X86_FEATURE_NOPL & 31))
51 # define NEED_MOVBE (1<<(X86_FEATURE_MOVBE & 31))
62 #define NEED_PSE (1<<(X86_FEATURE_PSE) & 31)
63 #define NEED_PGE (1<<(X86_FEATURE_PGE) & 31)
65 #define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
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Ddisabled-features.h16 # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
22 # define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31))
28 # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
32 # define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
33 # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
34 # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
35 # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
42 # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
49 # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
50 # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
[all …]
/Linux-v5.4/tools/arch/x86/include/asm/
Drequired-features.h15 # define NEED_FPU (1<<(X86_FEATURE_FPU & 31))
21 # define NEED_PAE (1<<(X86_FEATURE_PAE & 31))
27 # define NEED_CX8 (1<<(X86_FEATURE_CX8 & 31))
33 # define NEED_CMOV (1<<(X86_FEATURE_CMOV & 31))
39 # define NEED_3DNOW (1<<(X86_FEATURE_3DNOW & 31))
45 # define NEED_NOPL (1<<(X86_FEATURE_NOPL & 31))
51 # define NEED_MOVBE (1<<(X86_FEATURE_MOVBE & 31))
62 #define NEED_PSE (1<<(X86_FEATURE_PSE) & 31)
63 #define NEED_PGE (1<<(X86_FEATURE_PGE) & 31)
65 #define NEED_MSR (1<<(X86_FEATURE_MSR & 31))
[all …]
Ddisabled-features.h16 # define DISABLE_MPX (1<<(X86_FEATURE_MPX & 31))
22 # define DISABLE_SMAP (1<<(X86_FEATURE_SMAP & 31))
28 # define DISABLE_UMIP (1<<(X86_FEATURE_UMIP & 31))
32 # define DISABLE_VME (1<<(X86_FEATURE_VME & 31))
33 # define DISABLE_K6_MTRR (1<<(X86_FEATURE_K6_MTRR & 31))
34 # define DISABLE_CYRIX_ARR (1<<(X86_FEATURE_CYRIX_ARR & 31))
35 # define DISABLE_CENTAUR_MCR (1<<(X86_FEATURE_CENTAUR_MCR & 31))
42 # define DISABLE_PCID (1<<(X86_FEATURE_PCID & 31))
49 # define DISABLE_PKU (1<<(X86_FEATURE_PKU & 31))
50 # define DISABLE_OSPKE (1<<(X86_FEATURE_OSPKE & 31))
[all …]
/Linux-v5.4/arch/mips/include/asm/octeon/
Dcvmx-ciu2-defs.h31 #define CVMX_CIU2_ACK_PPX_IP2(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0000ull) + ((block_id) & 31)…
32 #define CVMX_CIU2_ACK_PPX_IP3(block_id) (CVMX_ADD_IO_SEG(0x00010701000C0200ull) + ((block_id) & 31)…
33 …EN_PPX_IP2_RML(block_id) (CVMX_ADD_IO_SEG(0x0001070100092000ull) + ((block_id) & 31) * 0x200000ull)
34 …N_PPX_IP2_WDOG(block_id) (CVMX_ADD_IO_SEG(0x0001070100091000ull) + ((block_id) & 31) * 0x200000ull)
35 …N_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100090000ull) + ((block_id) & 31) * 0x200000ull)
36 …X_IP2_WRKQ_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B0000ull) + ((block_id) & 31) * 0x200000ull)
37 …X_IP2_WRKQ_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A0000ull) + ((block_id) & 31) * 0x200000ull)
38 …X_IP3_MBOX_W1C(block_id) (CVMX_ADD_IO_SEG(0x00010701000B8200ull) + ((block_id) & 31) * 0x200000ull)
39 …X_IP3_MBOX_W1S(block_id) (CVMX_ADD_IO_SEG(0x00010701000A8200ull) + ((block_id) & 31) * 0x200000ull)
41 …W_PPX_IP2_WRKQ(block_id) (CVMX_ADD_IO_SEG(0x0001070100040000ull) + ((block_id) & 31) * 0x200000ull)
[all …]
Dcvmx-pexp-defs.h31 #define CVMX_PEXP_NPEI_BAR1_INDEXX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008000ull) + ((offset) & 31
68 …I_MEM_ACCESS_SUBIDX(offset) (CVMX_ADD_IO_SEG(0x00011F0000008280ull) + ((offset) & 31) * 16 - 16*12)
92 #define CVMX_PEXP_NPEI_PKTX_CNTS(offset) (CVMX_ADD_IO_SEG(0x00011F000000A400ull) + ((offset) & 31) …
93 …_PEXP_NPEI_PKTX_INSTR_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F000000A800ull) + ((offset) & 31) * 16)
94 …NPEI_PKTX_INSTR_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F000000AC00ull) + ((offset) & 31) * 16)
95 …_NPEI_PKTX_INSTR_FIFO_RSIZE(offset) (CVMX_ADD_IO_SEG(0x00011F000000B000ull) + ((offset) & 31) * 16)
96 …PEXP_NPEI_PKTX_INSTR_HEADER(offset) (CVMX_ADD_IO_SEG(0x00011F000000B400ull) + ((offset) & 31) * 16)
97 #define CVMX_PEXP_NPEI_PKTX_IN_BP(offset) (CVMX_ADD_IO_SEG(0x00011F000000B800ull) + ((offset) & 31)…
98 …_PEXP_NPEI_PKTX_SLIST_BADDR(offset) (CVMX_ADD_IO_SEG(0x00011F0000009400ull) + ((offset) & 31) * 16)
99 …NPEI_PKTX_SLIST_BAOFF_DBELL(offset) (CVMX_ADD_IO_SEG(0x00011F0000009800ull) + ((offset) & 31) * 16)
[all …]
/Linux-v5.4/drivers/video/fbdev/nvidia/
Dnv_dma.h58 #define SURFACE_PITCH_DST 31:16
75 #define CLIP_POINT_Y 31:16
78 #define CLIP_SIZE_HEIGHT 31:16
89 #define LINE_LINES_POINT0_Y 31:16
95 #define BLIT_POINT_SRC_Y 31:16
98 #define BLIT_POINT_DST_Y 31:16
101 #define BLIT_SIZE_HEIGHT 31:16
112 #define RECT_SOLID_RECTS_X 31:16
118 #define RECT_EXPAND_ONE_COLOR_CLIP_POINT0_Y 31:16
124 #define RECT_EXPAND_ONE_COLOR_SIZE_HEIGHT 31:16
[all …]
/Linux-v5.4/arch/alpha/include/asm/
Dxor.h383 ldq $31, 0($17) \n\
384 ldq $31, 0($18) \n\
386 ldq $31, 64($17) \n\
387 ldq $31, 64($18) \n\
389 ldq $31, 128($17) \n\
390 ldq $31, 128($18) \n\
392 ldq $31, 192($17) \n\
393 ldq $31, 192($18) \n\
416 ldq $31,256($17) \n\
418 ldq $31,256($18) \n\
[all …]
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h7 #define MT_RXD0_PKT_TYPE GENMASK(31, 29)
27 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26)
41 #define MT_RXD2_NORMAL_NON_AMPDU BIT(31)
61 #define MT_RXD3_NORMAL_PF_STS GENMASK(31, 30)
72 #define MT_RXV1_VHTA1_B5_B4 GENMASK(31, 30)
86 #define MT_RXV2_VHTA1_B16_B6 GENMASK(31, 21)
89 #define MT_RXV3_F_AGC1_CAL_GAIN GENMASK(31, 29)
100 #define MT_RXV4_F_AGC_CAL_GAIN GENMASK(31, 29)
107 #define MT_RXV5_LTF_SNR0 GENMASK(31, 26)
130 #define MT_TXD0_P_IDX BIT(31)
[all …]
Dregs.h15 #define MT_MCU_PCIE_REMAP_1_BASE GENMASK(31, 18)
19 #define MT_MCU_PCIE_REMAP_2_BASE GENMASK(31, 19)
51 #define MT_WPDMA_GLO_CFG_RX_2B_OFFSET BIT(31)
58 #define MT_WPDMA_DEBUG_IDX GENMASK(31, 28)
130 #define MT_PSE_RTA_BUSY BIT(31)
167 #define MT_PHYCTRL_STAT_PD_OFDM GENMASK(31, 16)
171 #define MT_PHYCTRL_STAT_MDRDY_OFDM GENMASK(31, 16)
213 #define MT_AGG_PCR_RTS_PKT_THR GENMASK(31, 25)
221 #define MT_AGG_CONTROL_BAR_RATE GENMASK(31, 20)
250 #define MT_DMA_FQCR0_BUSY BIT(31)
[all …]
/Linux-v5.4/drivers/net/wireless/mediatek/mt76/mt7615/
Dmac.h11 #define MT_RXD0_PKT_TYPE GENMASK(31, 29)
32 #define MT_RXD1_NORMAL_BSSID GENMASK(31, 26)
48 #define MT_RXD2_NORMAL_NON_AMPDU BIT(31)
68 #define MT_RXD3_NORMAL_PF_STS GENMASK(31, 30)
79 #define MT_RXV1_ACID_DET_H BIT(31)
95 #define MT_RXV2_SEL_ANT BIT(31)
101 #define MT_RXV4_RCPI3 GENMASK(31, 24)
159 #define MT_TXD0_P_IDX BIT(31)
166 #define MT_TXD1_OWN_MAC GENMASK(31, 26)
178 #define MT_TXD2_FIX_RATE BIT(31)
[all …]
/Linux-v5.4/arch/alpha/lib/
Dclear_page.S20 1: stq $31,0($16)
21 stq $31,8($16)
22 stq $31,16($16)
23 stq $31,24($16)
25 stq $31,32($16)
26 stq $31,40($16)
27 stq $31,48($16)
30 stq $31,56($16)
Dev6-clear_page.S26 stq $31,0($16)
30 stq $31,8($16)
31 stq $31,16($16)
35 stq $31,24($16)
36 stq $31,32($16)
40 stq $31,40($16)
41 stq $31,48($16)
45 stq $31,56($16)
Dmemset.S41 ldq_u $31,0($30) /* .. E1 */
65 bis $31,$31,$31 /* E0 */
66 ldq_u $31,0($30) /* .. E1 */
68 bis $31,$31,$31 /* .. E1 */
85 bis $31,$31,$31 /* E0 */
93 ret $31,($26),1 /* .. E1 */
108 ret $31,($26),1 /* E1 */
/Linux-v5.4/arch/m68k/include/asm/
Dbitops.h33 char *p = (char *)vaddr + (nr ^ 31) / 8; in bset_reg_set_bit()
43 char *p = (char *)vaddr + (nr ^ 31) / 8; in bset_mem_set_bit()
54 : "d" (nr ^ 31), "o" (*vaddr) in bfset_mem_set_bit()
73 char *p = (char *)vaddr + (nr ^ 31) / 8; in bclr_reg_clear_bit()
83 char *p = (char *)vaddr + (nr ^ 31) / 8; in bclr_mem_clear_bit()
94 : "d" (nr ^ 31), "o" (*vaddr) in bfclr_mem_clear_bit()
113 char *p = (char *)vaddr + (nr ^ 31) / 8; in bchg_reg_change_bit()
123 char *p = (char *)vaddr + (nr ^ 31) / 8; in bchg_mem_change_bit()
134 : "d" (nr ^ 31), "o" (*vaddr) in bfchg_mem_change_bit()
153 return (vaddr[nr >> 5] & (1UL << (nr & 31))) != 0; in test_bit()
[all …]
/Linux-v5.4/tools/testing/selftests/powerpc/tm/
Dtm-signal-context-chk-vsx.c47 {25,26,27,28},{29,30,31,32},{33,34,35,36},
53 {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
68 * FP registers (f0-31) overlap the most significant 64 bits of VSX in signal_usr1()
69 * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like in signal_usr1()
71 * i.e. vr0-31 overlaps fully vsr32-63. in signal_usr1()
74 * appeared first on the architecture), VMX registers vr0-31 (so VSX in signal_usr1()
80 * The other VSX half (vsr0-31) is hence stored below vr0-31/vsr32-63 in signal_usr1()
81 * registers, but only the least significant 64 bits of vsr0-31. The in signal_usr1()
82 * most significant 64 bits of vsr0-31 (f0-31), as it overlaps the FP in signal_usr1()
87 * exists, so v_regs points to where vr0-31 / vsr32-63 registers are in signal_usr1()
[all …]
/Linux-v5.4/arch/parisc/math-emu/
Dfloat.h56 #define Sexponentmantissa(object) Bitfield_mask( 1, 31,object)
62 #define Slow(object) Bitfield_mask( 31, 1,object)
64 #define Slow31(object) Bitfield_mask( 1, 31,object)
65 #define Shigh31(object) Bitfield_extract( 0, 31,object)
66 #define Ssignedhigh31(object) Bitfield_signed_extract( 0, 31,object)
72 #define Sbit31(object) Bitfield_mask( 31, 1,object)
79 Bitfield_deposit(value,1,31,object)
81 #define Deposit_slow(object,value) Bitfield_deposit(value,31,1,object)
88 #define Is_slow(object) Bitfield_mask( 31, 1,object)
93 #define Is_sbit31(object) Bitfield_mask( 31, 1,object)
[all …]

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