Lines Matching full:31
47 {25,26,27,28},{29,30,31,32},{33,34,35,36},
53 {-25,-26,-27,-28},{-29,-30,-31,-32},{-33,-34,-35,-36},
68 * FP registers (f0-31) overlap the most significant 64 bits of VSX in signal_usr1()
69 * registers vsr0-31, whilst VMX registers vr0-31, being 128-bit like in signal_usr1()
71 * i.e. vr0-31 overlaps fully vsr32-63. in signal_usr1()
74 * appeared first on the architecture), VMX registers vr0-31 (so VSX in signal_usr1()
80 * The other VSX half (vsr0-31) is hence stored below vr0-31/vsr32-63 in signal_usr1()
81 * registers, but only the least significant 64 bits of vsr0-31. The in signal_usr1()
82 * most significant 64 bits of vsr0-31 (f0-31), as it overlaps the FP in signal_usr1()
87 * exists, so v_regs points to where vr0-31 / vsr32-63 registers are in signal_usr1()
89 * skips all the slots used to store vr0-31 / vsr32-64 and points to in signal_usr1()
91 * 64 bits of vsr0-31. The other part of this half (the most significant in signal_usr1()
92 * part of vsr0-31) is stored in fp_regs. in signal_usr1()
95 /* Get pointer to least significant doubleword of vsr0-31 */ in signal_usr1()