Home
last modified time | relevance | path

Searched +full:12 +full:- +full:bit (Results 1 – 25 of 1082) sorted by relevance

12345678910>>...44

/Linux-v6.1/drivers/net/dsa/
Dmv88e6060.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * drivers/net/dsa/mv88e6060.h - Marvell 88e6060 switch chip support
17 #define PORT_STATUS_PAUSE_EN BIT(15)
18 #define PORT_STATUS_MY_PAUSE BIT(14)
20 #define PORT_STATUS_RESOLVED BIT(13)
21 #define PORT_STATUS_LINK BIT(12)
22 #define PORT_STATUS_PORTMODE BIT(11)
23 #define PORT_STATUS_PHYMODE BIT(10)
24 #define PORT_STATUS_DUPLEX BIT(9)
25 #define PORT_STATUS_SPEED BIT(8)
[all …]
/Linux-v6.1/drivers/soc/mediatek/
Dmt8195-pm-domains.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
10 #include "mtk-pm-domains.h"
11 #include <dt-bindings/power/mt8195-power.h>
20 .sta_mask = BIT(11),
25 .sram_pdn_ack_bits = GENMASK(12, 12),
39 .sta_mask = BIT(12),
44 .sram_pdn_ack_bits = GENMASK(12, 12),
58 .sta_mask = BIT(13),
66 .sta_mask = BIT(14),
[all …]
Dmt8192-pm-domains.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 #include "mtk-pm-domains.h"
7 #include <dt-bindings/power/mt8192-power.h>
16 .sta_mask = BIT(21),
21 .sram_pdn_ack_bits = GENMASK(12, 12),
55 .sta_mask = BIT(2),
60 .sram_pdn_ack_bits = GENMASK(12, 12),
65 .sta_mask = BIT(3),
70 .sram_pdn_ack_bits = GENMASK(12, 12),
93 .sta_mask = BIT(4),
[all …]
Dmt8186-pm-domains.h1 /* SPDX-License-Identifier: GPL-2.0-only */
4 * Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
10 #include "mtk-pm-domains.h"
11 #include <dt-bindings/power/mt8186-power.h>
20 .sta_mask = BIT(2),
24 .sram_pdn_bits = BIT(8),
25 .sram_pdn_ack_bits = BIT(12),
30 .sta_mask = BIT(3),
34 .sram_pdn_bits = BIT(8),
35 .sram_pdn_ack_bits = BIT(12),
[all …]
Dmtk-scpsys.c1 // SPDX-License-Identifier: GPL-2.0-only
16 #include <dt-bindings/power/mt2701-power.h>
17 #include <dt-bindings/power/mt2712-power.h>
18 #include <dt-bindings/power/mt6797-power.h>
19 #include <dt-bindings/power/mt7622-power.h>
20 #include <dt-bindings/power/mt7623a-power.h>
21 #include <dt-bindings/power/mt8173-power.h>
26 #define MTK_SCPD_ACTIVE_WAKEUP BIT(0)
27 #define MTK_SCPD_FWAIT_SRAM BIT(1)
28 #define MTK_SCPD_CAPS(_scpd, _x) ((_scpd)->data->caps & (_x))
[all …]
/Linux-v6.1/drivers/gpu/drm/mediatek/
Dmtk_dp_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
3 * Copyright (c) 2019-2022 MediaTek Inc.
11 #define MTK_DP_HPD_DISCONNECT BIT(1)
12 #define MTK_DP_HPD_CONNECT BIT(2)
13 #define MTK_DP_HPD_INTERRUPT BIT(3)
21 #define DA_XTP_GLB_CKDET_EN_FORCE_VAL BIT(15)
22 #define DA_XTP_GLB_CKDET_EN_FORCE_EN BIT(14)
23 #define DA_CKM_INTCKTX_EN_FORCE_VAL BIT(13)
24 #define DA_CKM_INTCKTX_EN_FORCE_EN BIT(12)
25 #define DA_CKM_CKTX0_EN_FORCE_VAL BIT(11)
[all …]
/Linux-v6.1/sound/firewire/bebob/
Dbebob_command.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * bebob_command.c - driver for BeBoB based devices
5 * Copyright (c) 2013-2014 Takashi Sakamoto
16 buf = kzalloc(12, GFP_KERNEL); in avc_audio_set_selector()
18 return -ENOMEM; in avc_audio_set_selector()
30 err = fcp_avc_transaction(unit, buf, 12, buf, 12, in avc_audio_set_selector()
31 BIT(1) | BIT(2) | BIT(3) | BIT(4) | BIT(5) | in avc_audio_set_selector()
32 BIT(6) | BIT(7) | BIT(8)); in avc_audio_set_selector()
36 err = -EIO; in avc_audio_set_selector()
38 err = -ENOSYS; in avc_audio_set_selector()
[all …]
/Linux-v6.1/include/soc/mscc/
Docelot_dev.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
11 #define DEV_CLOCK_CFG_MAC_TX_RST BIT(7)
12 #define DEV_CLOCK_CFG_MAC_RX_RST BIT(6)
13 #define DEV_CLOCK_CFG_PCS_TX_RST BIT(5)
14 #define DEV_CLOCK_CFG_PCS_RX_RST BIT(4)
15 #define DEV_CLOCK_CFG_PORT_RST BIT(3)
16 #define DEV_CLOCK_CFG_PHY_RST BIT(2)
20 #define DEV_PORT_MISC_FWD_ERROR_ENA BIT(4)
21 #define DEV_PORT_MISC_FWD_PAUSE_ENA BIT(3)
22 #define DEV_PORT_MISC_FWD_CTRL_ENA BIT(2)
[all …]
Docelot_hsio.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
85 #define HSIO_PLL5G_CFG0_ENA_ROT BIT(31)
86 #define HSIO_PLL5G_CFG0_ENA_LANE BIT(30)
87 #define HSIO_PLL5G_CFG0_ENA_CLKTREE BIT(29)
88 #define HSIO_PLL5G_CFG0_DIV4 BIT(28)
89 #define HSIO_PLL5G_CFG0_ENA_LOCK_FINE BIT(27)
99 #define HSIO_PLL5G_CFG0_ENA_VCO_CONTRH BIT(15)
100 #define HSIO_PLL5G_CFG0_ENA_CP1 BIT(14)
101 #define HSIO_PLL5G_CFG0_ENA_VCO_BUF BIT(13)
102 #define HSIO_PLL5G_CFG0_ENA_BIAS BIT(12)
[all …]
Docelot_ana.h1 /* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
11 #define ANA_ANAGEFIL_B_DOM_EN BIT(22)
12 #define ANA_ANAGEFIL_B_DOM_VAL BIT(21)
13 #define ANA_ANAGEFIL_AGE_LOCKED BIT(20)
14 #define ANA_ANAGEFIL_PID_EN BIT(19)
18 #define ANA_ANAGEFIL_VID_EN BIT(13)
19 #define ANA_ANAGEFIL_VID_VAL(x) ((x) & GENMASK(12, 0))
20 #define ANA_ANAGEFIL_VID_VAL_M GENMASK(12, 0)
27 #define ANA_STORMLIMIT_CFG_STORM_UNIT BIT(2)
31 #define ANA_AUTOAGE_AGE_FAST BIT(21)
[all …]
/Linux-v6.1/drivers/staging/sm750fb/
Dddk750_reg.h1 /* SPDX-License-Identifier: GPL-2.0 */
7 #define DE_STATE1_DE_ABORT BIT(0)
10 #define DE_STATE2_DE_FIFO_EMPTY BIT(3)
11 #define DE_STATE2_DE_STATUS_BUSY BIT(2)
12 #define DE_STATE2_DE_MEM_FIFO_EMPTY BIT(1)
20 #define SYSTEM_CTRL_PCI_BURST BIT(29)
21 #define SYSTEM_CTRL_PCI_MASTER BIT(25)
22 #define SYSTEM_CTRL_LATENCY_TIMER_OFF BIT(24)
23 #define SYSTEM_CTRL_DE_FIFO_EMPTY BIT(23)
24 #define SYSTEM_CTRL_DE_STATUS_BUSY BIT(22)
[all …]
/Linux-v6.1/tools/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
19 * [20-19] : Op0
20 * [18-16] : Op1
21 * [15-12] : CRn
22 * [11-8] : CRm
23 * [7-5] : Op2
29 #define CRn_shift 12
80 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
236 #define SYS_PAR_EL1_F BIT(0)
250 #define SYS_PMSIDR_EL1_MAXSIZE_SHIFT 12
[all …]
/Linux-v6.1/sound/soc/mediatek/mt8186/
Dmt8186-reg.h1 /* SPDX-License-Identifier: GPL-2.0
3 * mt8186-reg.h -- Mediatek 8186 audio driver reg definition
12 /* reg bit enum */
26 #define RESERVED_MASK_SFT BIT(31)
28 #define AHB_IDLE_EN_INT_MASK_SFT BIT(30)
30 #define AHB_IDLE_EN_EXT_MASK_SFT BIT(29)
32 #define PDN_NLE_MASK_SFT BIT(28)
34 #define PDN_TML_MASK_SFT BIT(27)
36 #define PDN_DAC_PREDIS_MASK_SFT BIT(26)
38 #define PDN_DAC_MASK_SFT BIT(25)
[all …]
/Linux-v6.1/arch/arm64/include/asm/
Dsysreg.h1 /* SPDX-License-Identifier: GPL-2.0-only */
14 #include <linux/kasan-tags.h>
16 #include <asm/gpr-num.h>
22 * [20-19] : Op0
23 * [18-16] : Op1
24 * [15-12] : CRn
25 * [11-8] : CRm
26 * [7-5] : Op2
32 #define CRn_shift 12
83 * As per Arm ARM for v8-A, Section "C.5.1.3 op0 == 0b00, architectural hints,
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtw88/
Drtw8821c.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
19 static const s8 lna_gain_table_0[8] = {22, 8, -6, -22, -31, -40, -46, -52};
20 static const s8 lna_gain_table_1[16] = {10, 6, 2, -2, -6, -10, -14, -17,
21 -20, -24, -28, -31, -34, -37, -40, -44};
26 ether_addr_copy(efuse->addr, map->e.mac_addr); in rtw8821ce_efuse_parsing()
38 struct rtw_efuse *efuse = &rtwdev->efuse; in rtw8821c_read_efuse()
44 efuse->rfe_option = map->rfe_option; in rtw8821c_read_efuse()
45 efuse->rf_board_option = map->rf_board_option; in rtw8821c_read_efuse()
46 efuse->crystal_cap = map->xtal_k; in rtw8821c_read_efuse()
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/media/i2c/
Dtda1997x.txt1 Device-Tree bindings for the NXP TDA1997x HDMI receiver
6 - RGB 8bit per color (24 bits total): R[11:4] B[11:4] G[11:4]
7 - YUV444 8bit per color (24 bits total): Y[11:4] Cr[11:4] Cb[11:4]
8 - YUV422 semi-planar 8bit per component (16 bits total): Y[11:4] CbCr[11:4]
9 - YUV422 semi-planar 10bit per component (20 bits total): Y[11:2] CbCr[11:2]
10 - YUV422 semi-planar 12bit per component (24 bits total): - Y[11:0] CbCr[11:0]
11 - YUV422 BT656 8bit per component (8 bits total): YCbCr[11:4] (2-cycles)
12 - YUV422 BT656 10bit per component (10 bits total): YCbCr[11:2] (2-cycles)
13 - YUV422 BT656 12bit per component (12 bits total): YCbCr[11:0] (2-cycles)
16 - RGB 12bit per color (36 bits total): R[11:0] B[11:0] G[11:0]
[all …]
/Linux-v6.1/drivers/gpu/drm/tve200/
Dtve200_drm.h1 /* SPDX-License-Identifier: GPL-2.0-only */
6 * Copyright (C) 2006-2008 Intel Corporation
28 /* Bits 2-31 are valid physical base addresses */
36 #define TVE200_INT_BUS_ERR BIT(7)
37 #define TVE200_INT_V_STATUS BIT(6) /* vertical blank */
38 #define TVE200_INT_V_NEXT_FRAME BIT(5)
39 #define TVE200_INT_U_NEXT_FRAME BIT(4)
40 #define TVE200_INT_Y_NEXT_FRAME BIT(3)
41 #define TVE200_INT_V_FIFO_UNDERRUN BIT(2)
42 #define TVE200_INT_U_FIFO_UNDERRUN BIT(1)
[all …]
/Linux-v6.1/drivers/comedi/drivers/
Dni_stc.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Register descriptions for NI DAQ-STC chip
5 * COMEDI - Linux Control and Measurement Device Interface
6 * Copyright (C) 1998-9 David A. Schleef <ds@schleef.org>
11 * DAQ-STC Technical Reference Manual
21 * Registers in the National Instruments DAQ-STC chip
25 #define NISTC_INTA_ACK_G0_GATE BIT(15)
26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
28 #define NISTC_INTA_ACK_AI_STOP BIT(12)
[all …]
/Linux-v6.1/include/linux/mfd/
Dwl1273-core.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * include/linux/mfd/wl1273-core.h
17 #define WL1273_FM_DRIVER_NAME "wl1273-fm"
28 #define WL1273_MOST_MODE_SET 12
125 #define WL1273_MODE_RX BIT(0)
126 #define WL1273_MODE_TX BIT(1)
127 #define WL1273_MODE_OFF BIT(2)
128 #define WL1273_MODE_SUSPENDED BIT(3)
130 #define WL1273_RADIO_CHILD BIT(0)
131 #define WL1273_CODEC_CHILD BIT(1)
[all …]
/Linux-v6.1/drivers/gpu/drm/vc4/
Dvc4_regs.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright © 2014-2015 Broadcom
35 # define V3D_IDENT1_TUPS_MASK VC4_MASK(15, 12)
36 # define V3D_IDENT1_TUPS_SHIFT 12
47 # define V3D_L2CACTL_L2CCLR BIT(2)
48 # define V3D_L2CACTL_L2CDIS BIT(1)
49 # define V3D_L2CACTL_L2CENA BIT(0)
64 # define V3D_INT_SPILLUSE BIT(3)
65 # define V3D_INT_OUTOMEM BIT(2)
66 # define V3D_INT_FLDONE BIT(1)
[all …]
Dvc4_packet.h78 /* Not an actual hardware packet -- this is what we use to put
145 #define VC4_LOADSTORE_FULL_RES_EOF BIT(3)
146 #define VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL BIT(2)
147 #define VC4_LOADSTORE_FULL_RES_DISABLE_ZS BIT(1)
148 #define VC4_LOADSTORE_FULL_RES_DISABLE_COLOR BIT(0)
155 #define VC4_LOADSTORE_FULL_RES_EOF BIT(3)
156 #define VC4_LOADSTORE_FULL_RES_DISABLE_CLEAR_ALL BIT(2)
157 #define VC4_LOADSTORE_FULL_RES_DISABLE_ZS BIT(1)
158 #define VC4_LOADSTORE_FULL_RES_DISABLE_COLOR BIT(0)
166 #define VC4_LOADSTORE_TILE_BUFFER_EOF BIT(3)
[all …]
/Linux-v6.1/include/linux/soc/mediatek/
Dinfracfg.h1 /* SPDX-License-Identifier: GPL-2.0 */
33 #define MT8195_TOP_AXI_PROT_EN_VDOSYS0 BIT(6)
34 #define MT8195_TOP_AXI_PROT_EN_VPPSYS0 BIT(10)
35 #define MT8195_TOP_AXI_PROT_EN_MFG1 BIT(11)
37 #define MT8195_TOP_AXI_PROT_EN_VPPSYS0_2ND BIT(23)
39 #define MT8195_TOP_AXI_PROT_EN_1_CAM BIT(22)
40 #define MT8195_TOP_AXI_PROT_EN_2_CAM BIT(0)
42 #define MT8195_TOP_AXI_PROT_EN_2_MFG1 BIT(7)
43 #define MT8195_TOP_AXI_PROT_EN_2_AUDIO (BIT(9) | BIT(11))
44 #define MT8195_TOP_AXI_PROT_EN_2_ADSP (BIT(12) | GENMASK(16, 14))
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtw89/
Dreg.h1 /* SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause */
2 /* Copyright(c) 2019-2020 Realtek Corporation
9 #define B_AX_AUTOLOAD_SUS BIT(5)
13 #define B_AX_PWC_EV2EF_B15 BIT(15)
14 #define B_AX_PWC_EV2EF_B14 BIT(14)
15 #define B_AX_ISO_EB2CORE BIT(8)
18 #define B_AX_FEN_BB_GLB_RSTN BIT(1)
19 #define B_AX_FEN_BBRSTB BIT(0)
22 #define B_AX_XTAL_OFF_A_DIE BIT(22)
23 #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18)
[all …]
/Linux-v6.1/drivers/net/wireless/mediatek/mt76/mt7603/
Dmac.h1 /* SPDX-License-Identifier: ISC */
10 #define MT_RXD0_NORMAL_IP_SUM BIT(23)
11 #define MT_RXD0_NORMAL_UDP_TCP_SUM BIT(24)
12 #define MT_RXD0_NORMAL_GROUP_1 BIT(25)
13 #define MT_RXD0_NORMAL_GROUP_2 BIT(26)
14 #define MT_RXD0_NORMAL_GROUP_3 BIT(27)
15 #define MT_RXD0_NORMAL_GROUP_4 BIT(28)
29 #define MT_RXD1_NORMAL_HDR_TRANS BIT(23)
30 #define MT_RXD1_NORMAL_HDR_OFFSET BIT(22)
34 #define MT_RXD1_NORMAL_BEACON_UC BIT(5)
[all …]
/Linux-v6.1/drivers/net/ethernet/sunplus/
Dspl2sw_define.h1 /* SPDX-License-Identifier: GPL-2.0 */
9 #define MAX_NETDEV_NUM 2 /* Maximum # of net-device */
12 #define MAC_INT_DAISY_MODE_CHG BIT(31) /* Daisy Mode Change */
13 #define MAC_INT_IP_CHKSUM_ERR BIT(23) /* IP Checksum Append Error */
14 #define MAC_INT_WDOG_TIMER1_EXP BIT(22) /* Watchdog Timer1 Expired */
15 #define MAC_INT_WDOG_TIMER0_EXP BIT(21) /* Watchdog Timer0 Expired */
16 #define MAC_INT_INTRUDER_ALERT BIT(20) /* Atruder Alert */
17 #define MAC_INT_PORT_ST_CHG BIT(19) /* Port Status Change */
18 #define MAC_INT_BC_STORM BIT(18) /* Broad Cast Storm */
19 #define MAC_INT_MUST_DROP_LAN BIT(17) /* Global Queue Exhausted */
[all …]

12345678910>>...44