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12

/Linux-v6.1/Documentation/devicetree/bindings/remoteproc/
Dti,k3-dsp-rproc.yaml145 mailbox0_cluster3: mailbox-0 {
157 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
158 <0x00 0x64800000 0x00 0x64800000 0x00 0x00800000>, /* C71_0 */
159 <0x4d 0x80800000 0x4d 0x80800000 0x00 0x00800000>, /* C66_0 */
160 <0x4d 0x81800000 0x4d 0x81800000 0x00 0x00800000>; /* C66_1 */
165 reg = <0x4d 0x80800000 0x00 0x00048000>,
166 <0x4d 0x80e00000 0x00 0x00008000>,
167 <0x4d 0x80f00000 0x00 0x00008000>;
171 ti,sci-proc-ids = <0x03 0xFF>;
182 reg = <0x00 0x64800000 0x00 0x00080000>,
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pci/
Drockchip-dw-pcie.yaml104 reg = <0x3 0xc0800000 0x0 0x390000>,
105 <0x0 0xfe280000 0x0 0x10000>,
106 <0x3 0x80000000 0x0 0x100000>;
108 bus-range = <0x20 0x2f>;
118 msi-map = <0x2000 &its 0x2000 0x1000>;
123 ranges = <0x81000000 0x0 0x80800000 0x3 0x80800000 0x0 0x100000>,
124 <0x83000000 0x0 0x80900000 0x3 0x80900000 0x0 0x3f700000>;
/Linux-v6.1/arch/arm/mach-ep93xx/
Dep93xx-regs.h14 #define EP93XX_AHB_PHYS_BASE 0x80000000
15 #define EP93XX_AHB_VIRT_BASE 0xfef00000
16 #define EP93XX_AHB_SIZE 0x00100000
21 #define EP93XX_APB_PHYS_BASE 0x80800000
22 #define EP93XX_APB_VIRT_BASE 0xfed00000
23 #define EP93XX_APB_SIZE 0x00200000
29 #define EP93XX_UART1_PHYS_BASE EP93XX_APB_PHYS(0x000c0000)
30 #define EP93XX_UART1_BASE EP93XX_APB_IOMEM(0x000c0000)
32 #define EP93XX_UART2_PHYS_BASE EP93XX_APB_PHYS(0x000d0000)
33 #define EP93XX_UART2_BASE EP93XX_APB_IOMEM(0x000d0000)
[all …]
/Linux-v6.1/arch/s390/kernel/
Duprobes.c42 return 0; in arch_uprobe_pre_xol()
58 return 0; in check_per_event()
60 if (control == 0) in check_per_event()
63 if ((control & 0x20200000) && (cause & 0x2000)) in check_per_event()
65 if (cause & 0x8000) { in check_per_event()
67 if ((control & 0x80800000) == 0x80000000) in check_per_event()
70 if (((control & 0x80800000) == 0x80800000) && in check_per_event()
75 return 0; in check_per_event()
91 int reg = (auprobe->insn[0] & 0xf0) >> 4; in arch_uprobe_post_xol()
96 int ilen = insn_length(auprobe->insn[0] >> 8); in arch_uprobe_post_xol()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/ti/
Dk3-j721e.dtsi43 #size-cells = <0>;
57 cpu0: cpu@0 {
59 reg = <0x000>;
62 i-cache-size = <0xC000>;
65 d-cache-size = <0x8000>;
73 reg = <0x001>;
76 i-cache-size = <0xC000>;
79 d-cache-size = <0x8000>;
89 cache-size = <0x100000>;
130 ranges = <0x00 0x00100000 0x00 0x00100000 0x00 0x00020000>, /* ctrl mmr */
[all …]
Dk3-j721e-main.dtsi14 #clock-cells = <0>;
16 clock-frequency = <0>;
20 #clock-cells = <0>;
22 clock-frequency = <0>;
29 reg = <0x0 0x70000000 0x0 0x800000>;
32 ranges = <0x0 0x0 0x70000000 0x800000>;
34 atf-sram@0 {
35 reg = <0x0 0x20000>;
41 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
44 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_8192e.c36 {0x011, 0xeb}, {0x012, 0x07}, {0x014, 0x75}, {0x303, 0xa7},
37 {0x428, 0x0a}, {0x429, 0x10}, {0x430, 0x00}, {0x431, 0x00},
38 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
39 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
40 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
41 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
42 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
43 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
44 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
45 {0x453, 0x00}, {0x456, 0x5e}, {0x460, 0x66}, {0x461, 0x66},
[all …]
Drtl8xxxu_8723b.c36 {0x02f, 0x30}, {0x035, 0x00}, {0x039, 0x08}, {0x04e, 0xe0},
37 {0x064, 0x00}, {0x067, 0x20}, {0x428, 0x0a}, {0x429, 0x10},
38 {0x430, 0x00}, {0x431, 0x00},
39 {0x432, 0x00}, {0x433, 0x01}, {0x434, 0x04}, {0x435, 0x05},
40 {0x436, 0x07}, {0x437, 0x08}, {0x43c, 0x04}, {0x43d, 0x05},
41 {0x43e, 0x07}, {0x43f, 0x08}, {0x440, 0x5d}, {0x441, 0x01},
42 {0x442, 0x00}, {0x444, 0x10}, {0x445, 0x00}, {0x446, 0x00},
43 {0x447, 0x00}, {0x448, 0x00}, {0x449, 0xf0}, {0x44a, 0x0f},
44 {0x44b, 0x3e}, {0x44c, 0x10}, {0x44d, 0x00}, {0x44e, 0x00},
45 {0x44f, 0x00}, {0x450, 0x00}, {0x451, 0xf0}, {0x452, 0x0f},
[all …]
Drtl8xxxu_core.c65 MODULE_PARM_DESC(dma_agg_pages, "Set DMA aggregation pages (range 1-127, 0 to disable)");
67 #define USB_VENDOR_ID_REALTEK 0x0bda
78 { .bitrate = 10, .hw_value = DESC_RATE_1M, .flags = 0 },
79 { .bitrate = 20, .hw_value = DESC_RATE_2M, .flags = 0 },
80 { .bitrate = 55, .hw_value = DESC_RATE_5_5M, .flags = 0 },
81 { .bitrate = 110, .hw_value = DESC_RATE_11M, .flags = 0 },
82 { .bitrate = 60, .hw_value = DESC_RATE_6M, .flags = 0 },
83 { .bitrate = 90, .hw_value = DESC_RATE_9M, .flags = 0 },
84 { .bitrate = 120, .hw_value = DESC_RATE_12M, .flags = 0 },
85 { .bitrate = 180, .hw_value = DESC_RATE_18M, .flags = 0 },
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8192ee/
Dphy.c53 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", in rtl92ee_phy_query_bb_reg()
143 u8 rfpi_enable = 0; in _rtl92ee_phy_rf_serial_read()
146 offset &= 0xff; in _rtl92ee_phy_rf_serial_read()
150 return 0xFFFFFFFF; in _rtl92ee_phy_rf_serial_read()
176 "RFR-%d Addr[0x%x]=0x%x\n", in _rtl92ee_phy_rf_serial_read()
195 offset &= 0xff; in _rtl92ee_phy_rf_serial_write()
197 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl92ee_phy_rf_serial_write()
200 "RFW-%d Addr[0x%x]=0x%x\n", rfpath, in _rtl92ee_phy_rf_serial_write()
227 regval | BIT(13) | BIT(0) | BIT(1)); in rtl92ee_phy_bb_config()
234 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl92ee_phy_bb_config()
[all …]
/Linux-v6.1/arch/m68k/fpsp040/
Dstanh.S69 BOUNDS1: .long 0x3FD78000,0x3FFFDDCE | ... 2^(-40), (5/2)LOG2
90 andl #0x7FFFFFFF,%d0
99 andl #0x7FFF0000,%d0
100 addl #0x00010000,%d0 | ...EXPONENT OF 2|X|
102 andl #0x80000000,SGN(%a6)
112 fadds #0x40000000,%fp1 | ...Z+2
122 cmpl #0x3FFF8000,%d0
125 cmpl #0x40048AA1,%d0
134 andl #0x7FFF0000,%d0
135 addl #0x00010000,%d0 | ...EXPO OF 2|X|
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8723be/
Dphy.c91 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl8723be_phy_mac_config()
106 regval | BIT(13) | BIT(0) | BIT(1)); in rtl8723be_phy_bb_config()
112 tmp = rtl_read_dword(rtlpriv, 0x4c); in rtl8723be_phy_bb_config()
113 rtl_write_dword(rtlpriv, 0x4c, tmp | BIT(23)); in rtl8723be_phy_bb_config()
115 rtl_write_byte(rtlpriv, REG_AFE_XTAL_CTRL + 1, 0x80); in rtl8723be_phy_bb_config()
120 crystalcap = crystalcap & 0x3F; in rtl8723be_phy_bb_config()
121 rtl_set_bbreg(hw, REG_MAC_PHY_CTRL, 0xFFF000, in rtl8723be_phy_bb_config()
140 u32 intf = (rtlhal->interface == INTF_USB ? BIT(1) : BIT(0)); in _rtl8723be_check_positive()
142 u8 board_type = ((rtlhal->board_type & BIT(4)) >> 4) << 0 | /* _GLNA */ in _rtl8723be_check_positive()
150 0 << 20 | /* interface 2/2 */ in _rtl8723be_check_positive()
[all …]
/Linux-v6.1/drivers/staging/r8188eu/hal/
DHalPhyRf_8188e.c18 * Overview: 88E we can not write 0xc80/c94/c4c/ 0xa2x. Instead of write TX agc.
29 * 04/23/2012 MHC Create Version 0.
33 void ODM_TxPwrTrackAdjust88E(struct odm_dm_struct *dm_odm, u8 Type,/* 0 = OFDM, 1 = CCK */ in ODM_TxPwrTrackAdjust88E()
38 u8 pwr_value = 0; in ODM_TxPwrTrackAdjust88E()
41 if (Type == 0) { /* For OFDM afjust */ in ODM_TxPwrTrackAdjust88E()
83 * 04/23/2012 MHC Create Version 0.
102 u8 ThermalValue = 0, delta, delta_LCK, delta_IQK, offset; in odm_TXPowerTrackingCallback_ThermalMeter_8188E()
103 u8 ThermalValue_AVG_count = 0; in odm_TXPowerTrackingCallback_ThermalMeter_8188E()
104 u32 ThermalValue_AVG = 0; in odm_TXPowerTrackingCallback_ThermalMeter_8188E()
106 s8 OFDM_index, CCK_index = 0; in odm_TXPowerTrackingCallback_ThermalMeter_8188E()
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8723com/
Dphy_common.c24 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask, in rtl8723_phy_query_bb_reg()
70 u8 rfpi_enable = 0; in rtl8723_phy_rf_serial_read()
73 offset &= 0xff; in rtl8723_phy_rf_serial_read()
77 return 0xFFFFFFFF; in rtl8723_phy_rf_serial_read()
105 "RFR-%d Addr[0x%x]=0x%x\n", in rtl8723_phy_rf_serial_read()
125 offset &= 0xff; in rtl8723_phy_rf_serial_write()
127 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in rtl8723_phy_rf_serial_write()
130 "RFW-%d Addr[0x%x]=0x%x\n", in rtl8723_phy_rf_serial_write()
283 if (final_candidate == 0xFF) { in rtl8723_phy_path_a_fill_iqk_matrix()
287 MASKDWORD) >> 22) & 0x3FF; in rtl8723_phy_path_a_fill_iqk_matrix()
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8188ee/
Dphy.c58 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask, in rtl88e_phy_query_bb_reg()
154 u8 rfpi_enable = 0; in _rtl88e_phy_rf_serial_read()
157 offset &= 0xff; in _rtl88e_phy_rf_serial_read()
161 return 0xFFFFFFFF; in _rtl88e_phy_rf_serial_read()
188 "RFR-%d Addr[0x%x]=0x%x\n", in _rtl88e_phy_rf_serial_read()
207 offset &= 0xff; in _rtl88e_phy_rf_serial_write()
209 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl88e_phy_rf_serial_write()
212 "RFW-%d Addr[0x%x]=0x%x\n", in _rtl88e_phy_rf_serial_write()
221 rtl_write_byte(rtlpriv, 0x04CA, 0x0B); in rtl88e_phy_mac_config()
235 regval | BIT(13) | BIT(0) | BIT(1)); in rtl88e_phy_bb_config()
[all …]
/Linux-v6.1/drivers/net/ethernet/broadcom/
Db44.h8 #define B44_DEVCTRL 0x0000UL /* Device Control */
9 #define DEVCTRL_MPM 0x00000040 /* Magic Packet PME Enable (B0 only) */
10 #define DEVCTRL_PFE 0x00000080 /* Pattern Filtering Enable */
11 #define DEVCTRL_IPP 0x00000400 /* Internal EPHY Present */
12 #define DEVCTRL_EPR 0x00008000 /* EPHY Reset */
13 #define DEVCTRL_PME 0x00001000 /* PHY Mode Enable */
14 #define DEVCTRL_PMCE 0x00002000 /* PHY Mode Clocks Enable */
15 #define DEVCTRL_PADDR 0x0007c000 /* PHY Address */
17 #define B44_BIST_STAT 0x000CUL /* Built-In Self-Test Status */
18 #define B44_WKUP_LEN 0x0010UL /* Wakeup Length */
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8192c/
Dphy_common.c24 "BBR MASK=0x%x Addr[0x%x]=0x%x\n", in rtl92c_phy_query_bb_reg()
59 return 0; in _rtl92c_phy_fw_rf_serial_read()
79 u8 rfpi_enable = 0; in _rtl92c_phy_rf_serial_read()
82 offset &= 0x3f; in _rtl92c_phy_rf_serial_read()
86 return 0xFFFFFFFF; in _rtl92c_phy_rf_serial_read()
115 rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "RFR-%d Addr[0x%x]=0x%x\n", in _rtl92c_phy_rf_serial_read()
136 offset &= 0x3f; in _rtl92c_phy_rf_serial_write()
138 data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff; in _rtl92c_phy_rf_serial_write()
140 rtl_dbg(rtlpriv, COMP_RF, DBG_TRACE, "RFW-%d Addr[0x%x]=0x%x\n", in _rtl92c_phy_rf_serial_write()
156 rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2); in _rtl92c_phy_bb_config_1t()
[all …]
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/engine/ce/fuc/
Dcom.fuc32 ctx_object: .b32 0
35 ctx_dma_query: .b32 0
36 ctx_dma_src: .b32 0
37 ctx_dma_dst: .b32 0
40 ctx_query_address_high: .b32 0
41 ctx_query_address_low: .b32 0
42 ctx_query_counter: .b32 0
43 ctx_src_address_high: .b32 0
44 ctx_src_address_low: .b32 0
45 ctx_src_pitch: .b32 0
[all …]
/Linux-v6.1/drivers/remoteproc/
Dqcom_q6v5_wcss.c28 #define Q6SS_RESET_REG 0x014
29 #define Q6SS_GFMUX_CTL_REG 0x020
30 #define Q6SS_PWR_CTL_REG 0x030
31 #define Q6SS_MEM_PWR_CTL 0x0B0
32 #define Q6SS_STRAP_ACC 0x110
33 #define Q6SS_CGC_OVERRIDE 0x034
34 #define Q6SS_BCR_REG 0x6000
37 #define AXI_HALTREQ_REG 0x0
38 #define AXI_HALTACK_REG 0x4
39 #define AXI_IDLE_REG 0x8
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8192de/
Dphy.c29 0, 0x2f, 0x30, 0x31, 0x32, 0x33, 0x34, 0x35, 0x36, 0x37, 0x38, 0x39, 0x0
41 0x0B, 0x48, 0x49, 0x4B, 0x03, 0x04, 0x0E
62 {0xE43BE, 0xFC638, 0x77C0A, 0xDE471, 0xd7110, 0x8EB04},
63 {0xE43BE, 0xFC078, 0xF7C1A, 0xE0C71, 0xD7550, 0xAEB04},
64 {0xE43BF, 0xFF038, 0xF7C0A, 0xDE471, 0xE5550, 0xAEB04},
65 {0xE43BF, 0xFF079, 0xF7C1A, 0xDE471, 0xE5550, 0xAEB04},
66 {0xE43BF, 0xFF038, 0xF7C1A, 0xDE471, 0xd7550, 0xAEB04}
70 {0x643BC, 0xFC038, 0x77C1A, 0x41289, 0x01840},
71 {0x643BC, 0xFC038, 0x07C1A, 0x41289, 0x01840},
72 {0x243BC, 0xFC438, 0x07C1A, 0x4128B, 0x0FC41}
[all …]
/Linux-v6.1/drivers/net/wireless/realtek/rtlwifi/rtl8723ae/
Dphy.c38 u32 original_value = 0, readback_value, bitshift; in rtl8723e_phy_query_rf_reg()
70 u32 original_value = 0, bitshift; in rtl8723e_phy_set_rf_reg()
117 rtl_set_bbreg(hw, RFPGA0_TXINFO, 0x3, 0x2); in _rtl8723e_phy_bb_config_1t()
118 rtl_set_bbreg(hw, RFPGA1_TXINFO, 0x300033, 0x200022); in _rtl8723e_phy_bb_config_1t()
119 rtl_set_bbreg(hw, RCCK0_AFESETTING, MASKBYTE3, 0x45); in _rtl8723e_phy_bb_config_1t()
120 rtl_set_bbreg(hw, ROFDM0_TRXPATHENABLE, MASKBYTE0, 0x23); in _rtl8723e_phy_bb_config_1t()
121 rtl_set_bbreg(hw, ROFDM0_AGCPARAMETER1, 0x30, 0x1); in _rtl8723e_phy_bb_config_1t()
122 rtl_set_bbreg(hw, 0xe74, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
123 rtl_set_bbreg(hw, 0xe78, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
124 rtl_set_bbreg(hw, 0xe7c, 0x0c000000, 0x2); in _rtl8723e_phy_bb_config_1t()
[all …]
/Linux-v6.1/arch/powerpc/platforms/4xx/
Dpci.c40 #define U64_TO_U32_LOW(val) ((u32)((val) & 0x00000000ffffffffULL))
46 ((sizeof(resource_size_t) > sizeof(u32)) ? U64_TO_U32_HIGH(val) : (0))
51 if ((mfspr(SPRN_PVR) & 0xffefffff) == 0x53421890) in ppc440spe_revA()
54 return 0; in ppc440spe_revA()
62 if (dev->devfn != 0 || dev->bus->self != NULL) in fixup_ppc4xx_pci_bridge()
82 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { in fixup_ppc4xx_pci_bridge()
83 dev->resource[i].start = dev->resource[i].end = 0; in fixup_ppc4xx_pci_bridge()
84 dev->resource[i].flags = 0; in fixup_ppc4xx_pci_bridge()
103 res->start = 0; in ppc4xx_parse_dma_ranges()
104 size = 0x80000000; in ppc4xx_parse_dma_ranges()
[all …]
/Linux-v6.1/arch/m68k/ifpsp060/
Dfpsp.sa1 .long 0x60ff0000,0x17400000,0x60ff0000,0x15f40000
2 .long 0x60ff0000,0x02b60000,0x60ff0000,0x04700000
3 .long 0x60ff0000,0x1b100000,0x60ff0000,0x19aa0000
4 .long 0x60ff0000,0x1b5a0000,0x60ff0000,0x062e0000
5 .long 0x60ff0000,0x102c0000,0x51fc51fc,0x51fc51fc
6 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
7 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
8 .long 0x51fc51fc,0x51fc51fc,0x51fc51fc,0x51fc51fc
9 .long 0x2f00203a,0xff2c487b,0x0930ffff,0xfef8202f
10 .long 0x00044e74,0x00042f00,0x203afef2,0x487b0930
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi29 #clock-cells = <0>;
35 #clock-cells = <0>;
42 #size-cells = <0>;
44 CPU0: cpu@0 {
47 reg = <0x0 0x0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
66 reg = <0x0 0x100>;
71 qcom,freq-domain = <&cpufreq_hw 0>;
82 reg = <0x0 0x200>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsc7180.dtsi61 #clock-cells = <0>;
67 #clock-cells = <0>;
77 reg = <0x0 0x80000000 0x0 0x600000>;
82 reg = <0x0 0x80600000 0x0 0x200000>;
87 reg = <0x0 0x80800000 0x0 0x20000>;
92 reg = <0x0 0x80820000 0x0 0x20000>;
98 reg = <0x0 0x808ff000 0x0 0x1000>;
103 reg = <0x0 0x80900000 0x0 0x200000>;
108 reg = <0x0 0x80b00000 0x0 0x3900000>;
113 reg = <0 0x8b700000 0 0x10000>;
[all …]

12