24 		"BBR MASK=0x%x Addr[0x%x]=0x%x\n", bitmask,  in rtl8723_phy_query_bb_reg()
70 	u8 rfpi_enable = 0;  in rtl8723_phy_rf_serial_read()
73 	offset &= 0xff;  in rtl8723_phy_rf_serial_read()
77 		return 0xFFFFFFFF;  in rtl8723_phy_rf_serial_read()
105 		"RFR-%d Addr[0x%x]=0x%x\n",  in rtl8723_phy_rf_serial_read()
125 	offset &= 0xff;  in rtl8723_phy_rf_serial_write()
127 	data_and_addr = ((newoffset << 20) | (data & 0x000fffff)) & 0x0fffffff;  in rtl8723_phy_rf_serial_write()
130 		"RFW-%d Addr[0x%x]=0x%x\n",  in rtl8723_phy_rf_serial_write()
283 	if (final_candidate == 0xFF) {  in rtl8723_phy_path_a_fill_iqk_matrix()
287 					  MASKDWORD) >> 22) & 0x3FF;  in rtl8723_phy_path_a_fill_iqk_matrix()
288 		x = result[final_candidate][0];  in rtl8723_phy_path_a_fill_iqk_matrix()
289 		if ((x & 0x00000200) != 0)  in rtl8723_phy_path_a_fill_iqk_matrix()
290 			x = x | 0xFFFFFC00;  in rtl8723_phy_path_a_fill_iqk_matrix()
292 		rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x3FF, tx0_a);  in rtl8723_phy_path_a_fill_iqk_matrix()
294 			      ((x * oldval_0 >> 7) & 0x1));  in rtl8723_phy_path_a_fill_iqk_matrix()
296 		if ((y & 0x00000200) != 0)  in rtl8723_phy_path_a_fill_iqk_matrix()
297 			y = y | 0xFFFFFC00;  in rtl8723_phy_path_a_fill_iqk_matrix()
299 		rtl_set_bbreg(hw, ROFDM0_XCTXAFE, 0xF0000000,  in rtl8723_phy_path_a_fill_iqk_matrix()
300 			      ((tx0_c & 0x3C0) >> 6));  in rtl8723_phy_path_a_fill_iqk_matrix()
301 		rtl_set_bbreg(hw, ROFDM0_XATXIQIMBALANCE, 0x003F0000,  in rtl8723_phy_path_a_fill_iqk_matrix()
302 			      (tx0_c & 0x3F));  in rtl8723_phy_path_a_fill_iqk_matrix()
304 			      ((y * oldval_0 >> 7) & 0x1));  in rtl8723_phy_path_a_fill_iqk_matrix()
308 		rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0x3FF, reg);  in rtl8723_phy_path_a_fill_iqk_matrix()
309 		reg = result[final_candidate][3] & 0x3F;  in rtl8723_phy_path_a_fill_iqk_matrix()
310 		rtl_set_bbreg(hw, ROFDM0_XARXIQIMBALANCE, 0xFC00, reg);  in rtl8723_phy_path_a_fill_iqk_matrix()
311 		reg = (result[final_candidate][3] >> 6) & 0xF;  in rtl8723_phy_path_a_fill_iqk_matrix()
312 		rtl_set_bbreg(hw, 0xca0, 0xF0000000, reg);  in rtl8723_phy_path_a_fill_iqk_matrix()
322 	for (i = 0; i < registernum; i++)  in rtl8723_save_adda_registers()
333 	for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)  in rtl8723_phy_save_mac_registers()
345 	for (i = 0; i < regiesternum; i++)  in rtl8723_phy_reload_adda_registers()
356 	for (i = 0; i < (IQK_MAC_REG_NUM - 1); i++)  in rtl8723_phy_reload_mac_registers()
370 		pathon = is_patha_on ? 0x04db25a4 : 0x0b1b25a4;  in rtl8723_phy_path_adda_on()
372 			pathon = 0x0bdb25a0;  in rtl8723_phy_path_adda_on()
373 			rtl_set_bbreg(hw, addareg[0], MASKDWORD, 0x0b1b25a0);  in rtl8723_phy_path_adda_on()
375 			rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon);  in rtl8723_phy_path_adda_on()
379 		pathon = 0x01c00014;  in rtl8723_phy_path_adda_on()
380 		rtl_set_bbreg(hw, addareg[0], MASKDWORD, pathon);  in rtl8723_phy_path_adda_on()
392 	u32 i = 0;  in rtl8723_phy_mac_setting_calibration()
394 	rtl_write_byte(rtlpriv, macreg[i], 0x3F);  in rtl8723_phy_mac_setting_calibration()
405 	rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x0);  in rtl8723_phy_path_a_standby()
406 	rtl_set_bbreg(hw, 0x840, MASKDWORD, 0x00010000);  in rtl8723_phy_path_a_standby()
407 	rtl_set_bbreg(hw, 0xe28, MASKDWORD, 0x80800000);  in rtl8723_phy_path_a_standby()
415 	mode = pi_mode ? 0x01000100 : 0x01000000;  in rtl8723_phy_pi_mode_switch()
416 	rtl_set_bbreg(hw, 0x820, MASKDWORD, mode);  in rtl8723_phy_pi_mode_switch()
417 	rtl_set_bbreg(hw, 0x828, MASKDWORD, mode);  in rtl8723_phy_pi_mode_switch()