/Linux-v6.1/arch/arm64/boot/dts/freescale/ |
D | imx8-ss-dma.dtsi | 14 ranges = <0x5a000000 0x0 0x5a000000 0x1000000>; 18 #clock-cells = <0>; 24 reg = <0x5a060000 0x1000>; 34 reg = <0x5a070000 0x1000>; 44 reg = <0x5a080000 0x1000>; 54 reg = <0x5a090000 0x1000>; 65 reg = <0x5a460000 0x10000>; 77 reg = <0x5a470000 0x10000>; 89 reg = <0x5a480000 0x10000>; 101 reg = <0x5a490000 0x10000>; [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | stm32mp157.dtsi | 13 reg = <0x59000000 0x800>; 22 reg = <0x5a000000 0x800>; 28 #size-cells = <0>; 33 #size-cells = <0>;
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D | omap4.dtsi | 40 #size-cells = <0>; 42 cpu@0 { 46 reg = <0x0>; 57 reg = <0x1>; 67 reg = <0x40304000 0xa000>; /* 40k */ 74 reg = <0x48241000 0x1000>, 75 <0x48240100 0x0100>; 81 reg = <0x48242000 0x1000>; 89 reg = <0x48240600 0x20>; 98 reg = <0x48281000 0x1000>; [all …]
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D | uniphier-sld8.dtsi | 18 #size-cells = <0>; 20 cpu@0 { 23 reg = <0>; 37 #clock-cells = <0>; 42 #clock-cells = <0>; 57 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 58 <0x506c0000 0x400>; 71 reg = <0x54006000 0x100>; 73 #size-cells = <0>; 76 pinctrl-0 = <&pinctrl_spi0>; [all …]
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D | uniphier-ld4.dtsi | 18 #size-cells = <0>; 20 cpu@0 { 23 reg = <0>; 37 #clock-cells = <0>; 42 #clock-cells = <0>; 57 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 58 <0x506c0000 0x400>; 71 reg = <0x54006000 0x100>; 73 #size-cells = <0>; 76 pinctrl-0 = <&pinctrl_spi0>; [all …]
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D | dra7.dtsi | 61 reg = <0x0 0x48211000 0x0 0x1000>, 62 <0x0 0x48212000 0x0 0x2000>, 63 <0x0 0x48214000 0x0 0x2000>, 64 <0x0 0x48216000 0x0 0x2000>; 73 reg = <0x0 0x48281000 0x0 0x1000>; 79 #size-cells = <0>; 81 cpu0: cpu@0 { 84 reg = <0>; 108 opp-supported-hw = <0xFF 0x01>; 117 opp-supported-hw = <0xFF 0x02>; [all …]
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D | uniphier-pro4.dtsi | 18 #size-cells = <0>; 20 cpu@0 { 23 reg = <0>; 45 #clock-cells = <0>; 50 #clock-cells = <0>; 65 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, 66 <0x506c0000 0x400>; 79 reg = <0x54006000 0x100>; 81 #size-cells = <0>; 84 pinctrl-0 = <&pinctrl_spi0>; [all …]
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D | uniphier-pxs2.dtsi | 19 #size-cells = <0>; 21 cpu0: cpu@0 { 24 reg = <0>; 112 #clock-cells = <0>; 117 #clock-cells = <0>; 163 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>, 164 <0x506c0000 0x400>; 179 reg = <0x54006000 0x100>; 181 #size-cells = <0>; 184 pinctrl-0 = <&pinctrl_spi0>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/ |
D | samsung,s3cmci.txt | 21 - pinctrl-0: Should specify pin control groups used for this controller. 34 pinctrl-0 = <&sdi_pins>; 35 reg = <0x5a000000 0x100000>; 36 interrupts = <0 0 21 3>;
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D | cdns,sdhci.yaml | 34 # sampling clock. The delay starts from 5ns (for delay parameter equal to 0) 40 minimum: 0 41 maximum: 0x1f 46 minimum: 0 47 maximum: 0x1f 52 minimum: 0 53 maximum: 0x1f 58 minimum: 0 59 maximum: 0x1f 64 minimum: 0 [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/dma/ |
D | socionext,uniphier-mio-dmac.yaml | 52 // In the example below, "interrupts = <0 68 4>, <0 68 4>, ..." is not a 57 reg = <0x5a000000 0x1000>; 58 interrupts = <0 68 4>, <0 68 4>, <0 69 4>, <0 70 4>, 59 <0 71 4>, <0 72 4>, <0 73 4>, <0 74 4>;
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/Linux-v6.1/arch/arm/mach-s3c/ |
D | map-s3c24xx.h | 19 #define S3C2410_PA_IRQ (0x4A000000) 23 #define S3C2410_PA_MEMCTRL (0x48000000) 27 #define S3C2410_PA_TIMER (0x51000000) 34 #define S3C2410_PA_USBDEV (0x52000000) 38 #define S3C2410_PA_WATCHDOG (0x53000000) 52 #define S3C2410_PA_USBHOST (0x49000000) 55 #define S3C2416_PA_HSUDC (0x49800000) 59 #define S3C2410_PA_DMA (0x4B000000) 63 #define S3C2410_PA_CLKPWR (0x4C000000) 66 #define S3C2410_PA_LCD (0x4D000000) [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/display/ |
D | st,stm32-dsi.yaml | 55 port@0: 95 reg = <0x5a000000 0x800>; 103 #size-cells = <0>; 107 #size-cells = <0>; 109 port@0 { 110 reg = <0>; 124 panel@0 { 126 reg = <0>;
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/Linux-v6.1/sound/soc/codecs/ |
D | cs35l45.h | 18 #define CS35L45_DEVID 0x00000000 19 #define CS35L45_REVID 0x00000004 20 #define CS35L45_RELID 0x0000000C 21 #define CS35L45_OTPID 0x00000010 22 #define CS35L45_SFT_RESET 0x00000020 23 #define CS35L45_GLOBAL_ENABLES 0x00002014 24 #define CS35L45_BLOCK_ENABLES 0x00002018 25 #define CS35L45_BLOCK_ENABLES2 0x0000201C 26 #define CS35L45_ERROR_RELEASE 0x00002034 27 #define CS35L45_REFCLK_INPUT 0x00002C04 [all …]
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/Linux-v6.1/crypto/ |
D | michael_mic.c | 30 return ((val & 0x00ff00ff) << 8) | ((val & 0xff00ff00) >> 8); in xswap() 44 } while (0) 51 mctx->pending_len = 0; in michael_init() 55 return 0; in michael_init() 74 return 0; in michael_update() 78 mctx->pending_len = 0; in michael_update() 88 if (len > 0) { in michael_update() 93 return 0; in michael_update() 102 /* Last block and padding (0x5a, 4..7 x 0) */ in michael_final() 104 case 0: in michael_final() [all …]
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D | aes_generic.c | 67 0xa56363c6, 0x847c7cf8, 0x997777ee, 0x8d7b7bf6, 68 0x0df2f2ff, 0xbd6b6bd6, 0xb16f6fde, 0x54c5c591, 69 0x50303060, 0x03010102, 0xa96767ce, 0x7d2b2b56, 70 0x19fefee7, 0x62d7d7b5, 0xe6abab4d, 0x9a7676ec, 71 0x45caca8f, 0x9d82821f, 0x40c9c989, 0x877d7dfa, 72 0x15fafaef, 0xeb5959b2, 0xc947478e, 0x0bf0f0fb, 73 0xecadad41, 0x67d4d4b3, 0xfda2a25f, 0xeaafaf45, 74 0xbf9c9c23, 0xf7a4a453, 0x967272e4, 0x5bc0c09b, 75 0xc2b7b775, 0x1cfdfde1, 0xae93933d, 0x6a26264c, 76 0x5a36366c, 0x413f3f7e, 0x02f7f7f5, 0x4fcccc83, [all …]
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/Linux-v6.1/drivers/watchdog/ |
D | bcm2835_wdt.c | 23 #define PM_RSTC 0x1c 24 #define PM_RSTS 0x20 25 #define PM_WDOG 0x24 27 #define PM_PASSWORD 0x5a000000 29 #define PM_WDOG_TIME_SET 0x000fffff 30 #define PM_RSTC_WRCFG_CLR 0xffffffcf 31 #define PM_RSTS_HADWRH_SET 0x00000040 32 #define PM_RSTC_WRCFG_SET 0x00000030 33 #define PM_RSTC_WRCFG_FULL_RESET 0x00000020 34 #define PM_RSTC_RESET 0x00000102 [all …]
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/Linux-v6.1/arch/arm/mach-omap2/ |
D | iomap.h | 33 #define OMAP2_L3_IO_OFFSET 0x90000000 36 #define OMAP2_L4_IO_OFFSET 0xb2000000 39 #define OMAP4_L3_IO_OFFSET 0xb4000000 42 #define AM33XX_L4_WK_IO_OFFSET 0xb5000000 45 #define OMAP4_L3_PER_IO_OFFSET 0xb1100000 48 #define OMAP2_EMU_IO_OFFSET 0xaa800000 /* Emulation */ 58 #define L3_24XX_PHYS L3_24XX_BASE /* 0x68000000 --> 0xf8000000*/ 61 #define L4_24XX_PHYS L4_24XX_BASE /* 0x48000000 --> 0xfa000000 */ 65 #define L4_WK_243X_PHYS L4_WK_243X_BASE /* 0x49000000 --> 0xfb000000 */ 70 /* 0x6e000000 --> 0xfe000000 */ [all …]
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/Linux-v6.1/drivers/soc/bcm/ |
D | bcm2835-power.c | 19 #define PM_GNRIC 0x00 20 #define PM_AUDIO 0x04 21 #define PM_STATUS 0x18 22 #define PM_RSTC 0x1c 23 #define PM_RSTS 0x20 24 #define PM_WDOG 0x24 25 #define PM_PADS0 0x28 26 #define PM_PADS2 0x2c 27 #define PM_PADS3 0x30 28 #define PM_PADS4 0x34 [all …]
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/Linux-v6.1/arch/arm64/boot/dts/socionext/ |
D | uniphier-ld11.dtsi | 20 #size-cells = <0>; 33 cpu0: cpu@0 { 36 reg = <0 0x000>; 46 reg = <0 0x001>; 100 #clock-cells = <0>; 124 reg = <0x0 0x81000000 0x0 0x01000000>; 129 soc@0 { 133 ranges = <0 0 0 0xffffffff>; 138 reg = <0x54006000 0x100>; 140 #size-cells = <0>; [all …]
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D | uniphier-pxs3.dtsi | 21 #size-cells = <0>; 40 cpu0: cpu@0 { 43 reg = <0 0x000>; 54 reg = <0 0x001>; 65 reg = <0 0x002>; 76 reg = <0 0x003>; 135 #clock-cells = <0>; 190 reg = <0x0 0x81000000 0x0 0x01000000>; 195 soc@0 { 199 ranges = <0 0 0 0xffffffff>; [all …]
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D | uniphier-ld20.dtsi | 21 #size-cells = <0>; 43 cpu0: cpu@0 { 46 reg = <0 0x000>; 57 reg = <0 0x001>; 68 reg = <0 0x100>; 79 reg = <0 0x101>; 96 cluster0_opp: opp-table-0 { 180 #clock-cells = <0>; 235 reg = <0x0 0x81000000 0x0 0x01000000>; 240 soc@0 { [all …]
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/Linux-v6.1/drivers/clk/bcm/ |
D | clk-bcm2835.c | 40 #define CM_PASSWORD 0x5a000000 42 #define CM_GNRICCTL 0x000 43 #define CM_GNRICDIV 0x004 45 # define CM_DIV_FRAC_MASK GENMASK(CM_DIV_FRAC_BITS - 1, 0) 47 #define CM_VPUCTL 0x008 48 #define CM_VPUDIV 0x00c 49 #define CM_SYSCTL 0x010 50 #define CM_SYSDIV 0x014 51 #define CM_PERIACTL 0x018 52 #define CM_PERIADIV 0x01c [all …]
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/Linux-v6.1/drivers/net/wireless/realtek/rtw88/ |
D | rtw8822c_table.c | 16 0x83000000, 0x00000000, 0x40000000, 0x00000000, 17 0x1D90, 0x300001FF, 18 0x1D90, 0x300101FE, 19 0x1D90, 0x300201FD, 20 0x1D90, 0x300301FC, 21 0x1D90, 0x300401FB, 22 0x1D90, 0x300501FA, 23 0x1D90, 0x300601F9, 24 0x1D90, 0x300701F8, 25 0x1D90, 0x300801F7, [all …]
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