Lines Matching +full:0 +full:x5a000000
19 #size-cells = <0>;
21 cpu0: cpu@0 {
24 reg = <0>;
112 #clock-cells = <0>;
117 #clock-cells = <0>;
163 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
164 <0x506c0000 0x400>;
179 reg = <0x54006000 0x100>;
181 #size-cells = <0>;
184 pinctrl-0 = <&pinctrl_spi0>;
192 reg = <0x54006100 0x100>;
194 #size-cells = <0>;
197 pinctrl-0 = <&pinctrl_spi1>;
205 reg = <0x54006800 0x40>;
208 pinctrl-0 = <&pinctrl_uart0>;
209 clocks = <&peri_clk 0>;
210 resets = <&peri_rst 0>;
216 reg = <0x54006900 0x40>;
219 pinctrl-0 = <&pinctrl_uart1>;
227 reg = <0x54006a00 0x40>;
230 pinctrl-0 = <&pinctrl_uart2>;
238 reg = <0x54006b00 0x40>;
241 pinctrl-0 = <&pinctrl_uart3>;
248 reg = <0x55000000 0x200>;
254 gpio-ranges = <&pinctrl 0 0 0>,
255 <&pinctrl 96 0 0>;
259 socionext,interrupt-ranges = <0 48 16>, <16 154 5>,
265 reg = <0x56000000 0x80000>;
268 pinctrl-0 = <&pinctrl_ain1>,
282 i2s_port0: port@0 {
321 reg = <0x58780000 0x80>;
323 #size-cells = <0>;
326 pinctrl-0 = <&pinctrl_i2c0>;
335 reg = <0x58781000 0x80>;
337 #size-cells = <0>;
340 pinctrl-0 = <&pinctrl_i2c1>;
349 reg = <0x58782000 0x80>;
351 #size-cells = <0>;
354 pinctrl-0 = <&pinctrl_i2c2>;
363 reg = <0x58783000 0x80>;
365 #size-cells = <0>;
368 pinctrl-0 = <&pinctrl_i2c3>;
377 reg = <0x58784000 0x80>;
379 #size-cells = <0>;
389 reg = <0x58785000 0x80>;
391 #size-cells = <0>;
401 reg = <0x58786000 0x80>;
403 #size-cells = <0>;
413 reg = <0x58c00000 0x400>;
417 pinctrl-0 = <&pinctrl_system_bus>;
422 reg = <0x59801000 0x400>;
428 reg = <0x59810000 0x400>;
444 reg = <0x59820000 0x200>;
460 reg = <0x5a000000 0x800>;
463 pinctrl-0 = <&pinctrl_emmc>;
476 reg = <0x5a400000 0x800>;
479 pinctrl-0 = <&pinctrl_sd>;
481 clocks = <&sd_clk 0>;
483 resets = <&sd_rst 0>;
494 reg = <0x5f800000 0x2000>;
506 ranges = <0 0x5f900000 0x2000>;
510 reg = <0x100 0x28>;
515 reg = <0x200 0x58>;
521 reg = <0x5fc10000 0x5300>;
529 reg = <0x5fc20000 0x200>;
536 reg = <0x60000200 0x20>;
538 (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_HIGH)>;
544 reg = <0x60000600 0x20>;
546 (GIC_CPU_MASK_RAW(0xf) | IRQ_TYPE_LEVEL_HIGH)>;
552 reg = <0x60001000 0x1000>,
553 <0x60000100 0x100>;
561 reg = <0x61840000 0x10000>;
576 #thermal-sensor-cells = <0>;
577 socionext,tmod-calibration = <0x0f86 0x6844>;
584 reg = <0x65000000 0x8500>;
587 pinctrl-0 = <&pinctrl_ether_rgmii>;
594 socionext,syscon-phy-mode = <&soc_glue 0>;
598 #size-cells = <0>;
606 reg = <0x65600000 0x10000>;
609 resets = <&sys_rst 28>, <&ahci_rst 0>;
619 ranges = <0 0x65700000 0x100>;
621 ahci_rst: reset-controller@0 {
623 reg = <0x0 0x4>;
633 reg = <0x10 0x10>;
638 #phy-cells = <0>;
645 reg = <0x65a00000 0xcd00>;
649 pinctrl-0 = <&pinctrl_usb0>, <&pinctrl_usb2>;
663 ranges = <0 0x65b00000 0x400>;
665 usb0_rst: reset@0 {
667 reg = <0x0 0x4>;
677 reg = <0x100 0x10>;
686 reg = <0x110 0x10>;
695 reg = <0x200 0x10>;
696 #phy-cells = <0>;
706 reg = <0x210 0x10>;
707 #phy-cells = <0>;
717 reg = <0x300 0x10>;
718 #phy-cells = <0>;
728 reg = <0x310 0x10>;
729 #phy-cells = <0>;
741 reg = <0x65c00000 0xcd00>;
745 pinctrl-0 = <&pinctrl_usb1>, <&pinctrl_usb3>;
758 ranges = <0 0x65d00000 0x400>;
760 usb1_rst: reset@0 {
762 reg = <0x0 0x4>;
772 reg = <0x100 0x10>;
781 reg = <0x110 0x10>;
790 reg = <0x200 0x10>;
791 #phy-cells = <0>;
801 reg = <0x210 0x10>;
802 #phy-cells = <0>;
812 reg = <0x300 0x10>;
813 #phy-cells = <0>;
826 reg = <0x68000000 0x20>, <0x68100000 0x1000>;
828 #size-cells = <0>;
831 pinctrl-0 = <&pinctrl_nand>;