Home
last modified time | relevance | path

Searched +full:0 +full:x5000000 (Results 1 – 13 of 13) sorted by relevance

/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dti,phy-j721e-wiz.yaml71 If GPIO is active, lane 0 and lane 1 of SERDES will be swapped to
100 const: 0
120 "^pll[0|1]-refclk$":
133 const: 0
161 const: 0
167 "^serdes@[0-9a-f]+$":
211 assigned-clocks = <&k3_clks 292 11>, <&k3_clks 292 0>;
215 ranges = <0x5000000 0x5000000 0x10000>;
219 #clock-cells = <0>;
225 clocks = <&k3_clks 293 0>, <&dummy_cmn_refclk1>;
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Darmada-385-linksys-rango.dts20 wan_amber@0 {
22 reg = <0x0>;
27 reg = <0x1>;
32 reg = <0x5>;
37 reg = <0x6>;
42 reg = <0x7>;
47 reg = <0x8>;
52 reg = <0x9>;
89 partition@0 {
91 reg = <0x0000000 0x200000>; /* 2MiB */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mtd/
Dhisi504-nand.txt31 reg = <0x4020000 0x10000>, <0x5000000 0x1000>;
32 interrupts = <0 379 4>;
40 partition@0 {
42 reg = <0x00000000 0x00400000>;
/Linux-v6.1/Documentation/devicetree/bindings/display/msm/
Dgpu.yaml20 - pattern: '^qcom,adreno-[3-6][0-9][0-9]\.[0-9]$'
26 - pattern: '^amd,imageon-200\.[0-1]$'
127 pattern: '^qcom,adreno-[3-5][0-9][0-9]\.[0-9]$'
162 pattern: '^qcom,adreno-6[0-9][0-9]\.[0-9]$'
182 reg = <0xfdb00000 0x10000>;
196 iommus = <&gpu_iommu 0>;
203 reg = <0xfdd00000 0x2000>,
204 <0xfec00000 0x180000>;
213 ranges = <0 0xfec00000 0x100000>;
215 gpu_sram: gpu-sram@0 {
[all …]
/Linux-v6.1/arch/arm64/boot/dts/ti/
Dk3-j721e-main.dtsi14 #clock-cells = <0>;
16 clock-frequency = <0>;
20 #clock-cells = <0>;
22 clock-frequency = <0>;
29 reg = <0x0 0x70000000 0x0 0x800000>;
32 ranges = <0x0 0x0 0x70000000 0x800000>;
34 atf-sram@0 {
35 reg = <0x0 0x20000>;
41 reg = <0 0x00100000 0 0x1c000>; /* excludes pinctrl region */
44 ranges = <0x0 0x0 0x00100000 0x1c000>;
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dfsl-ls1088a.dtsi27 #size-cells = <0>;
30 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
42 reg = <0x1>;
43 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
51 reg = <0x2>;
52 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
60 reg = <0x3>;
61 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
[all …]
Dfsl-ls208xa.dtsi33 #size-cells = <0>;
38 reg = <0x00000000 0x80000000 0 0x80000000>;
44 #clock-cells = <0>;
51 reg = <0x0 0x06000000 0 0x10000>, /* GIC Dist */
52 <0x0 0x06100000 0 0x100000>, /* GICR (RD_base + SGI_base) */
53 <0x0 0x0c0c0000 0 0x2000>, /* GICC */
54 <0x0 0x0c0d0000 0 0x1000>, /* GICH */
55 <0x0 0x0c0e0000 0 0x20000>; /* GICV */
61 interrupts = <1 9 0x4>;
66 reg = <0x0 0x6020000 0 0x20000>;
[all …]
Dfsl-ls1028a.dtsi23 #size-cells = <0>;
25 cpu0: cpu@0 {
28 reg = <0x0>;
30 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
39 reg = <0x1>;
41 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
62 arm,psci-suspend-param = <0x0>;
71 #clock-cells = <0>;
78 #clock-cells = <0>;
85 #clock-cells = <0>;
[all …]
Dfsl-lx2160a.dtsi12 /memreserve/ 0x80000000 0x00010000;
26 #size-cells = <0>;
29 cpu0: cpu@0 {
33 reg = <0x0>;
34 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
35 d-cache-size = <0x8000>;
38 i-cache-size = <0xC000>;
50 reg = <0x1>;
51 clocks = <&clockgen QORIQ_CLK_CMUX 0>;
52 d-cache-size = <0x8000>;
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/include/asic_reg/bif/
Dbif_5_1_d.h27 #define mmMM_INDEX 0x0
28 #define mmMM_INDEX_HI 0x6
29 #define mmMM_DATA 0x1
30 #define mmBIF_MM_INDACCESS_CNTL 0x1500
31 #define mmBUS_CNTL 0x1508
32 #define mmCONFIG_CNTL 0x1509
33 #define mmCONFIG_MEMSIZE 0x150a
34 #define mmCONFIG_F0_BASE 0x150b
35 #define mmCONFIG_APER_SIZE 0x150c
36 #define mmCONFIG_REG_APER_SIZE 0x150d
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsm8450.dtsi29 #clock-cells = <0>;
35 #clock-cells = <0>;
42 #size-cells = <0>;
44 CPU0: cpu@0 {
47 reg = <0x0 0x0>;
52 qcom,freq-domain = <&cpufreq_hw 0>;
66 reg = <0x0 0x100>;
71 qcom,freq-domain = <&cpufreq_hw 0>;
82 reg = <0x0 0x200>;
87 qcom,freq-domain = <&cpufreq_hw 0>;
[all …]
Dsdm845.dtsi75 reg = <0 0x80000000 0 0>;
84 reg = <0 0x85700000 0 0x600000>;
89 reg = <0 0x85e00000 0 0x100000>;
94 reg = <0 0x85fc0000 0 0x20000>;
100 reg = <0x0 0x85fe0000 0 0x20000>;
106 reg = <0x0 0x86000000 0 0x200000>;
112 reg = <0 0x86200000 0 0x2d00000>;
118 reg = <0 0x88f00000 0 0x200000>;
126 reg = <0 0x8ab00000 0 0x1400000>;
131 reg = <0 0x8bf00000 0 0x500000>;
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega10_hwmgr.c57 #define smnPCIE_LC_SPEED_CNTL 0x11140290
58 #define smnPCIE_LC_LINK_WIDTH_CNTL 0x11140288
62 static const uint32_t channel_number[] = {1, 2, 0, 4, 0, 8, 0, 16, 2};
64 …DF_CS_AON0_DramBaseAddress0 0x0044
65 …ne mmDF_CS_AON0_DramBaseAddress0_BASE_IDX 0
68 …AON0_DramBaseAddress0__AddrRngVal__SHIFT 0x0
69 …AON0_DramBaseAddress0__LgcyMmioHoleEn__SHIFT 0x1
70 …AON0_DramBaseAddress0__IntLvNumChan__SHIFT 0x4
71 …AON0_DramBaseAddress0__IntLvAddrSel__SHIFT 0x8
72 …AON0_DramBaseAddress0__DramBaseAddr__SHIFT 0xc
[all …]