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/Linux-v6.1/Documentation/devicetree/bindings/serial/
Dst,stm32-uart.yaml122 reg = <0x40011000 0x400>;
124 clocks = <&rcc 0 164>;
125 dmas = <&dma2 2 4 0x414 0x0>,
126 <&dma2 7 4 0x414 0x0>;
/Linux-v6.1/arch/arm/mach-omap2/
Domap-wakeupgen.h12 #define OMAP_WKUPGEN_BASE 0x48281000
14 #define OMAP_WKG_CONTROL_0 0x00
15 #define OMAP_WKG_ENB_A_0 0x10
16 #define OMAP_WKG_ENB_B_0 0x14
17 #define OMAP_WKG_ENB_C_0 0x18
18 #define OMAP_WKG_ENB_D_0 0x1c
19 #define OMAP_WKG_ENB_E_0 0x20
20 #define OMAP_WKG_ENB_A_1 0x410
21 #define OMAP_WKG_ENB_B_1 0x414
22 #define OMAP_WKG_ENB_C_1 0x418
[all …]
/Linux-v6.1/drivers/gpu/drm/msm/disp/dpu1/
Ddpu_hwio.h13 #define DISP_INTF_SEL 0x004
14 #define INTR_EN 0x010
15 #define INTR_STATUS 0x014
16 #define INTR_CLEAR 0x018
17 #define INTR2_EN 0x008
18 #define INTR2_STATUS 0x00c
19 #define INTR2_CLEAR 0x02c
20 #define HIST_INTR_EN 0x01c
21 #define HIST_INTR_STATUS 0x020
22 #define HIST_INTR_CLEAR 0x024
[all …]
/Linux-v6.1/drivers/usb/musb/
Domap2430.h15 #define OTG_REVISION 0x400
17 #define OTG_SYSCONFIG 0x404
19 # define FORCESTDBY (0 << MIDLEMODE)
24 # define FORCEIDLE (0 << SIDLEMODE)
30 # define AUTOIDLE (1 << 0)
32 #define OTG_SYSSTATUS 0x408
33 # define RESETDONE (1 << 0)
35 #define OTG_INTERFSEL 0x40c
37 # define PHYSEL 0 /* bit position */
38 # define UTMI_8BIT (0 << PHYSEL)
[all …]
/Linux-v6.1/sound/soc/sof/amd/
Dacp-dsp-offset.h15 #define ACP_DMA_CNTL_0 0x00
16 #define ACP_DMA_DSCR_STRT_IDX_0 0x20
17 #define ACP_DMA_DSCR_CNT_0 0x40
18 #define ACP_DMA_PRIO_0 0x60
19 #define ACP_DMA_CUR_DSCR_0 0x80
20 #define ACP_DMA_ERR_STS_0 0xC0
21 #define ACP_DMA_DESC_BASE_ADDR 0xE0
22 #define ACP_DMA_DESC_MAX_NUM_DSCR 0xE4
23 #define ACP_DMA_CH_STS 0xE8
24 #define ACP_DMA_CH_GROUP 0xEC
[all …]
/Linux-v6.1/sound/soc/tegra/
Dtegra210_mixer.h13 #define TEGRA210_MIXER_RX1_SOFT_RESET 0x04
14 #define TEGRA210_MIXER_RX1_STATUS 0x10
15 #define TEGRA210_MIXER_RX1_CIF_CTRL 0x24
16 #define TEGRA210_MIXER_RX1_CTRL 0x28
17 #define TEGRA210_MIXER_RX1_PEAK_CTRL 0x2c
18 #define TEGRA210_MIXER_RX1_SAMPLE_COUNT 0x30
21 #define TEGRA210_MIXER_TX1_ENABLE 0x280
22 #define TEGRA210_MIXER_TX1_SOFT_RESET 0x284
23 #define TEGRA210_MIXER_TX1_STATUS 0x290
24 #define TEGRA210_MIXER_TX1_INT_STATUS 0x294
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mp-pinfunc.h13 #define MX8MP_IOMUXC_GPIO1_IO00__GPIO1_IO00 0x014 0x274 0x000 0x0 0x0
14 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_ENET_PHY_REF_CLK_ROOT 0x014 0x274 0x000 0x1 0x0
15 #define MX8MP_IOMUXC_GPIO1_IO00__ISP_FL_TRIG_0 0x014 0x274 0x5D4 0x3 0x0
16 #define MX8MP_IOMUXC_GPIO1_IO00__CCM_EXT_CLK1 0x014 0x274 0x000 0x6 0x0
17 #define MX8MP_IOMUXC_GPIO1_IO01__GPIO1_IO01 0x018 0x278 0x000 0x0 0x0
18 #define MX8MP_IOMUXC_GPIO1_IO01__PWM1_OUT 0x018 0x278 0x000 0x1 0x0
19 #define MX8MP_IOMUXC_GPIO1_IO01__ISP_SHUTTER_TRIG_0 0x018 0x278 0x5DC 0x3 0x0
20 #define MX8MP_IOMUXC_GPIO1_IO01__CCM_EXT_CLK2 0x018 0x278 0x000 0x6 0x0
21 #define MX8MP_IOMUXC_GPIO1_IO02__GPIO1_IO02 0x01C 0x27C 0x000 0x0 0x0
22 #define MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x01C 0x27C 0x000 0x1 0x0
[all …]
Dimx8mm-pinfunc.h14 #define MX8MM_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0…
15 #define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0…
16 #define MX8MM_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0…
17 #define MX8MM_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0…
18 #define MX8MM_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0…
19 #define MX8MM_IOMUXC_GPIO1_IO01_GPIO1_IO1 0x02C 0x294 0x000 0x0 0…
20 #define MX8MM_IOMUXC_GPIO1_IO01_PWM1_OUT 0x02C 0x294 0x000 0x1 0…
21 #define MX8MM_IOMUXC_GPIO1_IO01_ANAMIX_REF_CLK_24M 0x02C 0x294 0x4BC 0x5 0…
22 #define MX8MM_IOMUXC_GPIO1_IO01_CCMSRCGPCMIX_EXT_CLK2 0x02C 0x294 0x000 0x6 0…
23 #define MX8MM_IOMUXC_GPIO1_IO01_SJC_ACTIVE 0x02C 0x294 0x000 0x7 0…
[all …]
Dimx8mq-pinfunc.h15 #define MX8MQ_IOMUXC_PMIC_STBY_REQ_CCMSRCGPCMIX_PMIC_STBY_REQ 0x014 0x27C 0x000 0x0 0…
16 #define MX8MQ_IOMUXC_PMIC_ON_REQ_SNVSMIX_PMIC_ON_REQ 0x018 0x280 0x000 0x0 0…
17 #define MX8MQ_IOMUXC_ONOFF_SNVSMIX_ONOFF 0x01C 0x284 0x000 0x0 0…
18 #define MX8MQ_IOMUXC_POR_B_SNVSMIX_POR_B 0x020 0x288 0x000 0x0 0…
19 #define MX8MQ_IOMUXC_RTC_RESET_B_SNVSMIX_RTC_RESET_B 0x024 0x28C 0x000 0x0 0…
20 #define MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0 0x028 0x290 0x000 0x0 0…
21 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_ENET_PHY_REF_CLK_ROOT 0x028 0x290 0x4C0 0x1 0…
22 #define MX8MQ_IOMUXC_GPIO1_IO00_ANAMIX_REF_CLK_32K 0x028 0x290 0x000 0x5 0…
23 #define MX8MQ_IOMUXC_GPIO1_IO00_CCMSRCGPCMIX_EXT_CLK1 0x028 0x290 0x000 0x6 0…
24 #define MX8MQ_IOMUXC_GPIO1_IO00_SJC_FAIL 0x028 0x290 0x000 0x7 0…
[all …]
/Linux-v6.1/drivers/media/pci/cx18/
Dcx18-av-core.h32 CX18_AV_SVIDEO_LUMA1 = 0x10,
33 CX18_AV_SVIDEO_LUMA2 = 0x20,
34 CX18_AV_SVIDEO_LUMA3 = 0x30,
35 CX18_AV_SVIDEO_LUMA4 = 0x40,
36 CX18_AV_SVIDEO_LUMA5 = 0x50,
37 CX18_AV_SVIDEO_LUMA6 = 0x60,
38 CX18_AV_SVIDEO_LUMA7 = 0x70,
39 CX18_AV_SVIDEO_LUMA8 = 0x80,
40 CX18_AV_SVIDEO_CHROMA4 = 0x400,
41 CX18_AV_SVIDEO_CHROMA5 = 0x500,
[all …]
/Linux-v6.1/drivers/misc/habanalabs/include/goya/asic_reg/
Dpci_nrtr_regs.h22 #define mmPCI_NRTR_HBW_MAX_CRED 0x100
24 #define mmPCI_NRTR_LBW_MAX_CRED 0x120
26 #define mmPCI_NRTR_DBG_E_ARB 0x300
28 #define mmPCI_NRTR_DBG_W_ARB 0x304
30 #define mmPCI_NRTR_DBG_N_ARB 0x308
32 #define mmPCI_NRTR_DBG_S_ARB 0x30C
34 #define mmPCI_NRTR_DBG_L_ARB 0x310
36 #define mmPCI_NRTR_DBG_E_ARB_MAX 0x320
38 #define mmPCI_NRTR_DBG_W_ARB_MAX 0x324
40 #define mmPCI_NRTR_DBG_N_ARB_MAX 0x328
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dimxrt1170-pinfunc.h10 #define IMX_PAD_SION 0x40000000
17 #define IOMUXC_GPIO_LPSR_00_FLEXCAN3_TX 0x000 0x040 0x0 0x0 0x0
18 #define IOMUXC_GPIO_LPSR_00_MIC_CLK 0x000 0x040 0x0 0x1 0x0
19 #define IOMUXC_GPIO_LPSR_00_MQS_RIGHT 0x000 0x040 0x0 0x2 0x0
20 #define IOMUXC_GPIO_LPSR_00_ARM_CM4_EVENTO 0x000 0x040 0x0 0x3 0x0
21 #define IOMUXC_GPIO_LPSR_00_GPIO_MUX6_IO00 0x000 0x040 0x0 0x5 0x0
22 #define IOMUXC_GPIO_LPSR_00_LPUART12_TXD 0x000 0x040 0x0B0 0x6 0x0
23 #define IOMUXC_GPIO_LPSR_00_SAI4_MCLK 0x000 0x040 0x0C8 0x7 0x0
24 #define IOMUXC_GPIO_LPSR_00_GPIO12_IO00 0x000 0x040 0x0 0xA 0x0
26 #define IOMUXC_GPIO_LPSR_01_FLEXCAN3_RX 0x004 0x044 0x080 0x0 0x0
[all …]
Dimx6sl-pinfunc.h13 #define MX6SL_PAD_AUD_MCLK__AUDIO_CLK_OUT 0x04c 0x2a4 0x000 0x0 0x0
14 #define MX6SL_PAD_AUD_MCLK__PWM4_OUT 0x04c 0x2a4 0x000 0x1 0x0
15 #define MX6SL_PAD_AUD_MCLK__ECSPI3_RDY 0x04c 0x2a4 0x6b4 0x2 0x0
16 #define MX6SL_PAD_AUD_MCLK__FEC_MDC 0x04c 0x2a4 0x000 0x3 0x0
17 #define MX6SL_PAD_AUD_MCLK__WDOG2_RESET_B_DEB 0x04c 0x2a4 0x000 0x4 0x0
18 #define MX6SL_PAD_AUD_MCLK__GPIO1_IO06 0x04c 0x2a4 0x000 0x5 0x0
19 #define MX6SL_PAD_AUD_MCLK__SPDIF_EXT_CLK 0x04c 0x2a4 0x7f4 0x6 0x0
20 #define MX6SL_PAD_AUD_RXC__AUD3_RXC 0x050 0x2a8 0x000 0x0 0x0
21 #define MX6SL_PAD_AUD_RXC__I2C1_SDA 0x050 0x2a8 0x720 0x1 0x0
22 #define MX6SL_PAD_AUD_RXC__UART3_TX_DATA 0x050 0x2a8 0x000 0x2 0x0
[all …]
Dimx53-pinfunc.h13 #define MX53_PAD_GPIO_19__KPP_COL_5 0x020 0x348 0x840 0x0 0x0
14 #define MX53_PAD_GPIO_19__GPIO4_5 0x020 0x348 0x000 0x1 0x0
15 #define MX53_PAD_GPIO_19__CCM_CLKO 0x020 0x348 0x000 0x2 0x0
16 #define MX53_PAD_GPIO_19__SPDIF_OUT1 0x020 0x348 0x000 0x3 0x0
17 #define MX53_PAD_GPIO_19__RTC_CE_RTC_EXT_TRIG2 0x020 0x348 0x000 0x4 0x0
18 #define MX53_PAD_GPIO_19__ECSPI1_RDY 0x020 0x348 0x000 0x5 0x0
19 #define MX53_PAD_GPIO_19__FEC_TDATA_3 0x020 0x348 0x000 0x6 0x0
20 #define MX53_PAD_GPIO_19__SRC_INT_BOOT 0x020 0x348 0x000 0x7 0x0
21 #define MX53_PAD_KEY_COL0__KPP_COL_0 0x024 0x34c 0x000 0x0 0x0
22 #define MX53_PAD_KEY_COL0__GPIO4_6 0x024 0x34c 0x000 0x1 0x0
[all …]
Dimx51-pinfunc.h13 #define MX51_PAD_EIM_D16__AUD4_RXFS 0x05c 0x3f0 0x000 0x5 0x0
14 #define MX51_PAD_EIM_D16__AUD5_TXD 0x05c 0x3f0 0x8d8 0x7 0x0
15 #define MX51_PAD_EIM_D16__EIM_D16 0x05c 0x3f0 0x000 0x0 0x0
16 #define MX51_PAD_EIM_D16__GPIO2_0 0x05c 0x3f0 0x000 0x1 0x0
17 #define MX51_PAD_EIM_D16__I2C1_SDA 0x05c 0x3f0 0x9b4 0x4 0x0
18 #define MX51_PAD_EIM_D16__UART2_CTS 0x05c 0x3f0 0x000 0x3 0x0
19 #define MX51_PAD_EIM_D16__USBH2_DATA0 0x05c 0x3f0 0x000 0x2 0x0
20 #define MX51_PAD_EIM_D17__AUD5_RXD 0x060 0x3f4 0x8d4 0x7 0x0
21 #define MX51_PAD_EIM_D17__EIM_D17 0x060 0x3f4 0x000 0x0 0x0
22 #define MX51_PAD_EIM_D17__GPIO2_1 0x060 0x3f4 0x000 0x1 0x0
[all …]
Dimx50-pinfunc.h13 #define MX50_PAD_KEY_COL0__KPP_COL_0 0x020 0x2cc 0x000 0x0 0x0
14 #define MX50_PAD_KEY_COL0__GPIO4_0 0x020 0x2cc 0x000 0x1 0x0
15 #define MX50_PAD_KEY_COL0__EIM_NANDF_CLE 0x020 0x2cc 0x000 0x2 0x0
16 #define MX50_PAD_KEY_COL0__CTI_TRIGIN7 0x020 0x2cc 0x000 0x6 0x0
17 #define MX50_PAD_KEY_COL0__USBPHY1_TXREADY 0x020 0x2cc 0x000 0x7 0x0
18 #define MX50_PAD_KEY_ROW0__KPP_ROW_0 0x024 0x2d0 0x000 0x0 0x0
19 #define MX50_PAD_KEY_ROW0__GPIO4_1 0x024 0x2d0 0x000 0x1 0x0
20 #define MX50_PAD_KEY_ROW0__EIM_NANDF_ALE 0x024 0x2d0 0x000 0x2 0x0
21 #define MX50_PAD_KEY_ROW0__CTI_TRIGIN_ACK7 0x024 0x2d0 0x000 0x6 0x0
22 #define MX50_PAD_KEY_ROW0__USBPHY1_RXVALID 0x024 0x2d0 0x000 0x7 0x0
[all …]
/Linux-v6.1/arch/sh/include/asm/
Dsh7760fb.h17 #define SH7760FB_PALETTE_MASK 0x00f8fcf8
20 #define SH7760FB_DMA_MASK 0x0C000000
26 #define LDICKR 0x400
27 #define LDMTR 0x402
29 #define LDDFR 0x404
31 #define LDDFR_COLOR_MASK 0x7F
32 #define LDSMR 0x406
34 #define LDSARU 0x408
35 #define LDSARL 0x40c
36 #define LDLAOR 0x410
[all …]
/Linux-v6.1/drivers/ntb/hw/amd/
Dntb_hw_amd.h56 #define NTB_LNK_STA_SPEED_MASK 0x000F0000
57 #define NTB_LNK_STA_WIDTH_MASK 0x03F00000
97 AMD_CNTL_OFFSET = 0x200,
106 AMD_STA_OFFSET = 0x204,
107 AMD_PGSLV_OFFSET = 0x208,
108 AMD_SPAD_MUX_OFFSET = 0x20C,
109 AMD_SPAD_OFFSET = 0x210,
110 AMD_RSMU_HCID = 0x250,
111 AMD_RSMU_SIID = 0x254,
112 AMD_PSION_OFFSET = 0x300,
[all …]
/Linux-v6.1/drivers/net/ethernet/
Ddnet.h19 #define DNET_RX_LEN_FIFO 0x000 /* RX_LEN_FIFO */
20 #define DNET_RX_DATA_FIFO 0x004 /* RX_DATA_FIFO */
21 #define DNET_TX_LEN_FIFO 0x008 /* TX_LEN_FIFO */
22 #define DNET_TX_DATA_FIFO 0x00C /* TX_DATA_FIFO */
25 #define DNET_VERCAPS 0x100 /* VERCAPS */
26 #define DNET_INTR_SRC 0x104 /* INTR_SRC */
27 #define DNET_INTR_ENB 0x108 /* INTR_ENB */
28 #define DNET_RX_STATUS 0x10C /* RX_STATUS */
29 #define DNET_TX_STATUS 0x110 /* TX_STATUS */
30 #define DNET_RX_FRAMES_CNT 0x114 /* RX_FRAMES_CNT */
[all …]
/Linux-v6.1/include/video/
Dsh_mobile_lcdc.h8 #define _LDDCKR 0x410
9 #define LDDCKR_ICKSEL_BUS (0 << 16)
15 #define _LDDCKSTPR 0x414
16 #define _LDINTR 0x468
22 #define LDINTR_VES (1 << 0)
23 #define LDINTR_STATUS_MASK (0xff << 0)
24 #define _LDSR 0x46c
28 #define _LDCNT1R 0x470
29 #define LDCNT1R_DE (1 << 0)
30 #define _LDCNT2R 0x474
[all …]
/Linux-v6.1/arch/arm/mach-hisi/
Dhotplug.c17 #define SCISOEN 0xc0
18 #define SCISODIS 0xc4
19 #define SCPERPWREN 0xd0
20 #define SCPERPWRDIS 0xd4
21 #define SCCPUCOREEN 0xf4
22 #define SCCPUCOREDIS 0xf8
23 #define SCPERCTRL0 0x200
24 #define SCCPURSTEN 0x410
25 #define SCCPURSTDIS 0x414
48 * CPU0_SRST_REQ_EN (1 << 0)
[all …]
/Linux-v6.1/drivers/phy/freescale/
Dphy-fsl-imx8m-pcie.c21 #define IMX8MM_PCIE_PHY_CMN_REG061 0x184
22 #define ANA_PLL_CLK_OUT_TO_EXT_IO_EN BIT(0)
23 #define IMX8MM_PCIE_PHY_CMN_REG062 0x188
25 #define IMX8MM_PCIE_PHY_CMN_REG063 0x18C
27 #define IMX8MM_PCIE_PHY_CMN_REG064 0x190
31 #define IMX8MM_PCIE_PHY_CMN_REG065 0x194
33 #define ANA_AUX_TX_LVL GENMASK(3, 0)
34 #define IMX8MM_PCIE_PHY_CMN_REG75 0x1D4
35 #define PCIE_PHY_CMN_REG75_PLL_DONE 0x3
36 #define PCIE_PHY_TRSV_REG5 0x414
[all …]
/Linux-v6.1/arch/powerpc/platforms/embedded6xx/
Dholly.c43 #define HOLLY_PCI_CFG_PHYS 0x7c000000
48 if (bus == 0 && PCI_SLOT(devfn) == 0) in holly_exclude_device()
64 lut_addr = 0x900; in holly_remap_bridge()
65 for (i = 0; i < 31; i++) { in holly_remap_bridge()
66 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000201); in holly_remap_bridge()
68 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0); in holly_remap_bridge()
73 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x00000241); in holly_remap_bridge()
75 tsi108_write_reg(TSI108_PB_OFFSET + lut_addr, 0x0); in holly_remap_bridge()
78 tsi108_write_reg(TSI108_PCI_PFAB_IO_UPPER, 0x0); in holly_remap_bridge()
79 tsi108_write_reg(TSI108_PCI_PFAB_IO, 0x1); in holly_remap_bridge()
[all …]
/Linux-v6.1/drivers/clk/renesas/
Drzg2l-cpg.h12 #define CPG_SIPLL5_STBY (0x140)
13 #define CPG_SIPLL5_CLK1 (0x144)
14 #define CPG_SIPLL5_CLK3 (0x14C)
15 #define CPG_SIPLL5_CLK4 (0x150)
16 #define CPG_SIPLL5_CLK5 (0x154)
17 #define CPG_SIPLL5_MON (0x15C)
18 #define CPG_PL1_DDIV (0x200)
19 #define CPG_PL2_DDIV (0x204)
20 #define CPG_PL3A_DDIV (0x208)
21 #define CPG_PL6_DDIV (0x210)
[all …]
/Linux-v6.1/drivers/rtc/
Drtc-st-lpc.c28 #define LPC_LPT_LSB_OFF 0x400
29 #define LPC_LPT_MSB_OFF 0x404
30 #define LPC_LPT_START_OFF 0x408
33 #define LPC_LPA_LSB_OFF 0x410
34 #define LPC_LPA_MSB_OFF 0x414
35 #define LPC_LPA_START_OFF 0x418
38 #define LPC_WDT_OFF 0x510
39 #define LPC_WDT_FLAG_OFF 0x514
65 writel_relaxed(0, rtc->ioaddr + LPC_WDT_OFF); in st_rtc_set_hw_alarm()
99 return 0; in st_rtc_read_time()
[all …]

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