17 #define SCISOEN				0xc0
18 #define SCISODIS			0xc4
19 #define SCPERPWREN			0xd0
20 #define SCPERPWRDIS			0xd4
21 #define SCCPUCOREEN			0xf4
22 #define SCCPUCOREDIS			0xf8
23 #define SCPERCTRL0			0x200
24 #define SCCPURSTEN			0x410
25 #define SCCPURSTDIS			0x414
48  * CPU0_SRST_REQ_EN	(1 << 0)
55 #define CPU0_SRST_REQ_EN		(1 << 0)
57 #define HIX5HD2_PERI_CRG20		0x50
60 #define HIX5HD2_PERI_PMC0		0x1000
65 #define HIP01_PERI9                    0x50
78 	u32 val = 0;  in set_cpu_hi3620()
88 		writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREEN);  in set_cpu_hi3620()
120 		writel_relaxed(0x01 << cpu, ctrl_base + SCCPUCOREDIS);  in set_cpu_hi3620()
153 	ctrl_base = of_iomap(node, 0);  in hi3xxx_hotplug_init()
161 	return 0;  in hi3xxx_hotplug_init()
167 		if (hi3xxx_hotplug_init() < 0)  in hi3xxx_set_cpu()
183 	ctrl_base = of_iomap(np, 0);  in hix5hd2_hotplug_init()
193 	u32 val = 0;  in hix5hd2_set_cpu()
231 		ctrl_base = of_iomap(np, 0);  in hip01_set_cpu()
261 	"	mrc	p15, 0, %0, c1, c0, 1\n"  in cpu_enter_lowpower()
262 	"	bic	%0, %0, #0x40\n"  in cpu_enter_lowpower()
263 	"	mcr	p15, 0, %0, c1, c0, 1\n"  in cpu_enter_lowpower()
264 	"	mrc	p15, 0, %0, c1, c0, 0\n"  in cpu_enter_lowpower()
265 	"	bic	%0, %0, #0x04\n"  in cpu_enter_lowpower()
266 	"	mcr	p15, 0, %0, c1, c0, 0\n"  in cpu_enter_lowpower()
268 	  : "r" (0)  in cpu_enter_lowpower()
276 	hi3xxx_set_cpu_jump(cpu, phys_to_virt(0));  in hi3xxx_cpu_die()
289 			return 0;  in hi3xxx_cpu_kill()